2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
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34 * Floating Point Data Structures and Constants
41 /* Environment information of floating point unit. */
43 int32_t en_cw; /* control word (16bits) */
44 int32_t en_sw; /* status word (16bits) */
45 int32_t en_tw; /* tag word (16bits) */
46 int32_t en_fip; /* fp instruction pointer */
47 uint16_t en_fcs; /* fp code segment selector */
48 uint16_t en_opcode; /* opcode last executed (11 bits) */
49 int32_t en_foo; /* fp operand offset */
50 int32_t en_fos; /* fp operand segment selector */
53 /* Contents of each x87 floating point accumulator. */
58 /* Floating point context. (i386 fnsave/frstor) */
60 struct env87 sv_env; /* floating point control/status */
61 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
62 uint8_t sv_pad0[4]; /* saved status word (now unused) */
66 /* Contents of each SSE extended accumulator. */
68 uint8_t xmm_bytes[16];
71 /* Contents of the upper 16 bytes of each AVX extended accumulator. */
73 uint8_t ymm_bytes[16];
76 /* Rename structs below depending on machine architecture. */
78 #define __envxmm32 envxmm
80 #define __envxmm32 envxmm32
81 #define __envxmm64 envxmm
85 uint16_t en_cw; /* control word (16bits) */
86 uint16_t en_sw; /* status word (16bits) */
87 uint16_t en_tw; /* tag word (16bits) */
88 uint16_t en_opcode; /* opcode last executed (11 bits) */
89 uint32_t en_fip; /* fp instruction pointer */
90 uint16_t en_fcs; /* fp code segment selector */
91 uint16_t en_pad0; /* padding */
92 uint32_t en_foo; /* fp operand offset */
93 uint16_t en_fos; /* fp operand segment selector */
94 uint16_t en_pad1; /* padding */
95 uint32_t en_mxcsr; /* SSE control/status register */
96 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
100 uint16_t en_cw; /* control word (16bits) */
101 uint16_t en_sw; /* status word (16bits) */
102 uint8_t en_tw; /* tag word (8bits) */
104 uint16_t en_opcode; /* opcode last executed (11 bits ) */
105 uint64_t en_rip; /* fp instruction pointer */
106 uint64_t en_rdp; /* fp operand pointer */
107 uint32_t en_mxcsr; /* SSE control/status register */
108 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
111 /* Floating point context. (i386 fxsave/fxrstor) */
113 struct __envxmm32 sv_env;
115 struct fpacc87 fp_acc;
116 uint8_t fp_pad[6]; /* padding */
118 struct xmmacc sv_xmm[8];
125 struct savexmm sv_xmm;
128 /* Floating point context. (amd64 fxsave/fxrstor) */
130 struct __envxmm64 sv_env;
132 struct fpacc87 fp_acc;
133 uint8_t fp_pad[6]; /* padding */
135 struct xmmacc sv_xmm[16];
142 uint64_t xstate_xcomp_bv;
143 uint8_t xstate_rsrv0[8];
144 uint8_t xstate_rsrv[40];
146 #define XSTATE_XCOMP_BV_COMPACT (1ULL << 63)
148 struct savexmm_xstate {
149 struct xstate_hdr sx_hd;
150 struct ymmacc sx_ymm[16];
154 struct __envxmm32 sv_env;
156 struct fpacc87 fp_acc;
157 int8_t fp_pad[6]; /* padding */
159 struct xmmacc sv_xmm[16];
161 struct savexmm_xstate sv_xstate;
164 struct savefpu_xstate {
165 struct xstate_hdr sx_hd;
166 struct ymmacc sx_ymm[16];
170 struct __envxmm64 sv_env;
172 struct fpacc87 fp_acc;
173 int8_t fp_pad[6]; /* padding */
175 struct xmmacc sv_xmm[16];
177 struct savefpu_xstate sv_xstate;
184 * The hardware default control word for i387's and later coprocessors is
189 * all exceptions masked.
191 * FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
192 * because of the difference between memory and fpu register stack arguments.
193 * If its using an intermediate fpu register, it has 80/64 bits to work
194 * with. If it uses memory, it has 64/53 bits to work with. However,
195 * gcc is aware of this and goes to a fair bit of trouble to make the
198 * This is mostly academic for AMD64, because the ABI prefers the use
199 * SSE2 based math. For FreeBSD/amd64, we go with the default settings.
201 #define __INITIAL_FPUCW__ 0x037F
202 #define __INITIAL_FPUCW_I386__ 0x127F
203 #define __INITIAL_NPXCW__ __INITIAL_FPUCW_I386__
204 #define __INITIAL_MXCSR__ 0x1F80
205 #define __INITIAL_MXCSR_MASK__ 0xFFBF
208 * The current value of %xcr0 is saved in the sv_pad[] field of the FPU
209 * state in the NT_X86_XSTATE note in core dumps. This offset is chosen
210 * to match the offset used by NT_X86_XSTATE in other systems.
212 #define X86_XSTATE_XCR0_OFFSET 464
216 * CR0_MP and CR0_EM are always set. Use CR0_TS to force traps when
217 * FPU access is disabled.
219 #define fpu_enable() clts()
220 #define fpu_disable() load_cr0(rcr0() | CR0_TS)
223 #endif /* !_X86_FPU_H_ */