2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)npx.h 5.3 (Berkeley) 1/18/91
37 * Floating Point Data Structures and Constants
44 /* Environment information of floating point unit. */
46 int32_t en_cw; /* control word (16bits) */
47 int32_t en_sw; /* status word (16bits) */
48 int32_t en_tw; /* tag word (16bits) */
49 int32_t en_fip; /* fp instruction pointer */
50 uint16_t en_fcs; /* fp code segment selector */
51 uint16_t en_opcode; /* opcode last executed (11 bits) */
52 int32_t en_foo; /* fp operand offset */
53 int32_t en_fos; /* fp operand segment selector */
56 /* Contents of each x87 floating point accumulator. */
61 /* Floating point context. (i386 fnsave/frstor) */
63 struct env87 sv_env; /* floating point control/status */
64 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
65 uint8_t sv_pad0[4]; /* saved status word (now unused) */
69 /* Contents of each SSE extended accumulator. */
71 uint8_t xmm_bytes[16];
74 /* Contents of the upper 16 bytes of each AVX extended accumulator. */
76 uint8_t ymm_bytes[16];
79 /* Rename structs below depending on machine architecture. */
81 #define __envxmm32 envxmm
83 #define __envxmm32 envxmm32
84 #define __envxmm64 envxmm
88 uint16_t en_cw; /* control word (16bits) */
89 uint16_t en_sw; /* status word (16bits) */
90 uint16_t en_tw; /* tag word (16bits) */
91 uint16_t en_opcode; /* opcode last executed (11 bits) */
92 uint32_t en_fip; /* fp instruction pointer */
93 uint16_t en_fcs; /* fp code segment selector */
94 uint16_t en_pad0; /* padding */
95 uint32_t en_foo; /* fp operand offset */
96 uint16_t en_fos; /* fp operand segment selector */
97 uint16_t en_pad1; /* padding */
98 uint32_t en_mxcsr; /* SSE control/status register */
99 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
103 uint16_t en_cw; /* control word (16bits) */
104 uint16_t en_sw; /* status word (16bits) */
105 uint8_t en_tw; /* tag word (8bits) */
107 uint16_t en_opcode; /* opcode last executed (11 bits ) */
108 uint64_t en_rip; /* fp instruction pointer */
109 uint64_t en_rdp; /* fp operand pointer */
110 uint32_t en_mxcsr; /* SSE control/status register */
111 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
114 /* Floating point context. (i386 fxsave/fxrstor) */
116 struct __envxmm32 sv_env;
118 struct fpacc87 fp_acc;
119 uint8_t fp_pad[6]; /* padding */
121 struct xmmacc sv_xmm[8];
128 struct savexmm sv_xmm;
131 /* Floating point context. (amd64 fxsave/fxrstor) */
133 struct __envxmm64 sv_env;
135 struct fpacc87 fp_acc;
136 uint8_t fp_pad[6]; /* padding */
138 struct xmmacc sv_xmm[16];
145 uint64_t xstate_xcomp_bv;
146 uint8_t xstate_rsrv0[8];
147 uint8_t xstate_rsrv[40];
149 #define XSTATE_XCOMP_BV_COMPACT (1ULL << 63)
151 struct savexmm_xstate {
152 struct xstate_hdr sx_hd;
153 struct ymmacc sx_ymm[16];
157 struct __envxmm32 sv_env;
159 struct fpacc87 fp_acc;
160 int8_t fp_pad[6]; /* padding */
162 struct xmmacc sv_xmm[16];
164 struct savexmm_xstate sv_xstate;
167 struct savefpu_xstate {
168 struct xstate_hdr sx_hd;
169 struct ymmacc sx_ymm[16];
173 struct __envxmm64 sv_env;
175 struct fpacc87 fp_acc;
176 int8_t fp_pad[6]; /* padding */
178 struct xmmacc sv_xmm[16];
180 struct savefpu_xstate sv_xstate;
187 * The hardware default control word for i387's and later coprocessors is
192 * all exceptions masked.
194 * FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
195 * because of the difference between memory and fpu register stack arguments.
196 * If its using an intermediate fpu register, it has 80/64 bits to work
197 * with. If it uses memory, it has 64/53 bits to work with. However,
198 * gcc is aware of this and goes to a fair bit of trouble to make the
201 * This is mostly academic for AMD64, because the ABI prefers the use
202 * SSE2 based math. For FreeBSD/amd64, we go with the default settings.
204 #define __INITIAL_FPUCW__ 0x037F
205 #define __INITIAL_FPUCW_I386__ 0x127F
206 #define __INITIAL_NPXCW__ __INITIAL_FPUCW_I386__
207 #define __INITIAL_MXCSR__ 0x1F80
208 #define __INITIAL_MXCSR_MASK__ 0xFFBF
211 * The current value of %xcr0 is saved in the sv_pad[] field of the FPU
212 * state in the NT_X86_XSTATE note in core dumps. This offset is chosen
213 * to match the offset used by NT_X86_XSTATE in other systems.
215 #define X86_XSTATE_XCR0_OFFSET 464
217 #endif /* !_X86_FPU_H_ */