2 * Copyright (c) 1995 Bruce D. Evans.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #ifndef _X86_X86_VAR_H_
33 #define _X86_X86_VAR_H_
36 * Miscellaneous machine-dependent declarations.
41 extern int busdma_swi_pending;
42 extern u_int cpu_exthigh;
43 extern u_int cpu_feature;
44 extern u_int cpu_feature2;
45 extern u_int amd_feature;
46 extern u_int amd_feature2;
47 extern u_int amd_pminfo;
48 extern u_int amd_extended_feature_extensions;
49 extern u_int via_feature_rng;
50 extern u_int via_feature_xcrypt;
51 extern u_int cpu_clflush_line_size;
52 extern u_int cpu_stdext_feature;
53 extern u_int cpu_stdext_feature2;
54 extern u_int cpu_stdext_feature3;
55 extern uint64_t cpu_ia32_arch_caps;
56 extern u_int cpu_fxsr;
57 extern u_int cpu_high;
59 extern u_int cpu_max_ext_state_size;
60 extern u_int cpu_mxcsr_mask;
61 extern u_int cpu_procinfo;
62 extern u_int cpu_procinfo2;
63 extern char cpu_vendor[];
64 extern u_int cpu_vendor_id;
65 extern u_int cpu_mon_mwait_flags;
66 extern u_int cpu_mon_min_size;
67 extern u_int cpu_mon_max_size;
68 extern u_int cpu_maxphyaddr;
69 extern char ctx_switch_xsave[];
71 extern char hv_vendor[];
73 extern char sigcode[];
75 extern int vm_page_dump_size;
76 extern int workaround_erratum383;
79 extern int _ucode32sel;
83 extern uint64_t xsave_mask;
94 * The interface type of the interrupt handler entry point cannot be
95 * expressed in C. Use simplest non-variadic function type as an
98 typedef void alias_for_inthand_t(void);
101 * Returns the maximum physical address that can be used with the
104 static __inline vm_paddr_t
105 cpu_getmaxphyaddr(void)
107 #if defined(__i386__) && !defined(PAE)
110 return ((1ULL << cpu_maxphyaddr) - 1);
114 void *alloc_fpusave(int flags);
115 void busdma_swi(void);
116 bool cpu_mwait_usable(void);
117 void cpu_probe_amdc1e(void);
118 void cpu_setregs(void);
119 void dump_add_page(vm_paddr_t);
120 void dump_drop_page(vm_paddr_t);
121 void finishidentcpu(void);
122 void identify_cpu1(void);
123 void identify_cpu2(void);
124 void identify_hypervisor(void);
125 void initializecpu(void);
126 void initializecpucache(void);
127 bool fix_cpuid(void);
128 void fillw(int /*u_short*/ pat, void *base, size_t cnt);
129 int is_physical_memory(vm_paddr_t addr);
131 void nmi_call_kdb(u_int cpu, u_int type, struct trapframe *frame);
132 void nmi_call_kdb_smp(u_int type, struct trapframe *frame);
133 void nmi_handle_intr(u_int type, struct trapframe *frame);
134 void pagecopy(void *from, void *to);
135 void printcpuinfo(void);
136 int user_dbreg_trap(void);
137 int minidumpsys(struct dumperinfo *);
138 struct pcb *get_pcb_td(struct thread *td);