sys/x86/iommu/intel_drv.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2013-2015 The FreeBSD Foundation
   5  * All rights reserved.
   6  *
   7  * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
   8  * under sponsorship from the FreeBSD Foundation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 #include "opt_acpi.h"
  36 #if defined(__amd64__)
  37 #define DEV_APIC
  38 #else
  39 #include "opt_apic.h"
  40 #endif
  41 #include "opt_ddb.h"
  42
  43 #include <sys/param.h>
  44 #include <sys/bus.h>
  45 #include <sys/kernel.h>
  46 #include <sys/lock.h>
  47 #include <sys/malloc.h>
  48 #include <sys/memdesc.h>
  49 #include <sys/module.h>
  50 #include <sys/mutex.h>
  51 #include <sys/rman.h>
  52 #include <sys/rwlock.h>
  53 #include <sys/smp.h>
  54 #include <sys/taskqueue.h>
  55 #include <sys/tree.h>
  56 #include <sys/vmem.h>
  57 #include <machine/bus.h>
  58 #include <machine/pci_cfgreg.h>
  59 #include <contrib/dev/acpica/include/acpi.h>
  60 #include <contrib/dev/acpica/include/accommon.h>
  61 #include <dev/acpica/acpivar.h>
  62 #include <vm/vm.h>
  63 #include <vm/vm_extern.h>
  64 #include <vm/vm_kern.h>
  65 #include <vm/vm_object.h>
  66 #include <vm/vm_page.h>
  67 #include <vm/vm_pager.h>
  68 #include <vm/vm_map.h>
  69 #include <x86/include/busdma_impl.h>
  70 #include <x86/iommu/intel_reg.h>
  71 #include <x86/iommu/busdma_dmar.h>
  72 #include <x86/iommu/intel_dmar.h>
  73 #include <dev/pci/pcireg.h>
  74 #include <dev/pci/pcivar.h>
  75
  76 #ifdef DEV_APIC
  77 #include "pcib_if.h"
  78 #include <machine/intr_machdep.h>
  79 #include <x86/apicreg.h>
  80 #include <x86/apicvar.h>
  81 #endif
  82
  83 #define DMAR_FAULT_IRQ_RID      0
  84 #define DMAR_QI_IRQ_RID         1
  85 #define DMAR_REG_RID            2
  86
  87 static devclass_t dmar_devclass;
  88 static device_t *dmar_devs;
  89 static int dmar_devcnt;
  90
  91 typedef int (*dmar_iter_t)(ACPI_DMAR_HEADER *, void *);
  92
  93 static void
  94 dmar_iterate_tbl(dmar_iter_t iter, void *arg)
  95 {
  96         ACPI_TABLE_DMAR *dmartbl;
  97         ACPI_DMAR_HEADER *dmarh;
  98         char *ptr, *ptrend;
  99         ACPI_STATUS status;
 100
 101         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
 102         if (ACPI_FAILURE(status))
 103                 return;
 104         ptr = (char *)dmartbl + sizeof(*dmartbl);
 105         ptrend = (char *)dmartbl + dmartbl->Header.Length;
 106         for (;;) {
 107                 if (ptr >= ptrend)
 108                         break;
 109                 dmarh = (ACPI_DMAR_HEADER *)ptr;
 110                 if (dmarh->Length <= 0) {
 111                         printf("dmar_identify: corrupted DMAR table, l %d\n",
 112                             dmarh->Length);
 113                         break;
 114                 }
 115                 ptr += dmarh->Length;
 116                 if (!iter(dmarh, arg))
 117                         break;
 118         }
 119         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
 120 }
 121
 122 struct find_iter_args {
 123         int i;
 124         ACPI_DMAR_HARDWARE_UNIT *res;
 125 };
 126
 127 static int
 128 dmar_find_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 129 {
 130         struct find_iter_args *fia;
 131
 132         if (dmarh->Type != ACPI_DMAR_TYPE_HARDWARE_UNIT)
 133                 return (1);
 134
 135         fia = arg;
 136         if (fia->i == 0) {
 137                 fia->res = (ACPI_DMAR_HARDWARE_UNIT *)dmarh;
 138                 return (0);
 139         }
 140         fia->i--;
 141         return (1);
 142 }
 143
 144 static ACPI_DMAR_HARDWARE_UNIT *
 145 dmar_find_by_index(int idx)
 146 {
 147         struct find_iter_args fia;
 148
 149         fia.i = idx;
 150         fia.res = NULL;
 151         dmar_iterate_tbl(dmar_find_iter, &fia);
 152         return (fia.res);
 153 }
 154
 155 static int
 156 dmar_count_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 157 {
 158
 159         if (dmarh->Type == ACPI_DMAR_TYPE_HARDWARE_UNIT)
 160                 dmar_devcnt++;
 161         return (1);
 162 }
 163
 164 static int dmar_enable = 0;
 165 static void
 166 dmar_identify(driver_t *driver, device_t parent)
 167 {
 168         ACPI_TABLE_DMAR *dmartbl;
 169         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 170         ACPI_STATUS status;
 171         int i, error;
 172
 173         if (acpi_disabled("dmar"))
 174                 return;
 175         TUNABLE_INT_FETCH("hw.dmar.enable", &dmar_enable);
 176         if (!dmar_enable)
 177                 return;
 178 #ifdef INVARIANTS
 179         TUNABLE_INT_FETCH("hw.dmar.check_free", &dmar_check_free);
 180 #endif
 181         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
 182         if (ACPI_FAILURE(status))
 183                 return;
 184         haw = dmartbl->Width + 1;
 185         if ((1ULL << (haw + 1)) > BUS_SPACE_MAXADDR)
 186                 dmar_high = BUS_SPACE_MAXADDR;
 187         else
 188                 dmar_high = 1ULL << (haw + 1);
 189         if (bootverbose) {
 190                 printf("DMAR HAW=%d flags=<%b>\n", dmartbl->Width,
 191                     (unsigned)dmartbl->Flags,
 192                     "\020\001INTR_REMAP\002X2APIC_OPT_OUT");
 193         }
 194         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
 195
 196         dmar_iterate_tbl(dmar_count_iter, NULL);
 197         if (dmar_devcnt == 0)
 198                 return;
 199         dmar_devs = malloc(sizeof(device_t) * dmar_devcnt, M_DEVBUF,
 200             M_WAITOK | M_ZERO);
 201         for (i = 0; i < dmar_devcnt; i++) {
 202                 dmarh = dmar_find_by_index(i);
 203                 if (dmarh == NULL) {
 204                         printf("dmar_identify: cannot find HWUNIT %d\n", i);
 205                         continue;
 206                 }
 207                 dmar_devs[i] = BUS_ADD_CHILD(parent, 1, "dmar", i);
 208                 if (dmar_devs[i] == NULL) {
 209                         printf("dmar_identify: cannot create instance %d\n", i);
 210                         continue;
 211                 }
 212                 error = bus_set_resource(dmar_devs[i], SYS_RES_MEMORY,
 213                     DMAR_REG_RID, dmarh->Address, PAGE_SIZE);
 214                 if (error != 0) {
 215                         printf(
 216         "dmar%d: unable to alloc register window at 0x%08jx: error %d\n",
 217                             i, (uintmax_t)dmarh->Address, error);
 218                         device_delete_child(parent, dmar_devs[i]);
 219                         dmar_devs[i] = NULL;
 220                 }
 221         }
 222 }
 223
 224 static int
 225 dmar_probe(device_t dev)
 226 {
 227
 228         if (acpi_get_handle(dev) != NULL)
 229                 return (ENXIO);
 230         device_set_desc(dev, "DMA remap");
 231         return (BUS_PROBE_NOWILDCARD);
 232 }
 233
 234 static void
 235 dmar_release_intr(device_t dev, struct dmar_unit *unit, int idx)
 236 {
 237         struct dmar_msi_data *dmd;
 238
 239         dmd = &unit->intrs[idx];
 240         if (dmd->irq == -1)
 241                 return;
 242         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
 243         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
 244         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
 245         PCIB_RELEASE_MSIX(device_get_parent(device_get_parent(dev)),
 246             dev, dmd->irq);
 247         dmd->irq = -1;
 248 }
 249
 250 static void
 251 dmar_release_resources(device_t dev, struct dmar_unit *unit)
 252 {
 253         int i;
 254
 255         dmar_fini_busdma(unit);
 256         dmar_fini_irt(unit);
 257         dmar_fini_qi(unit);
 258         dmar_fini_fault_log(unit);
 259         for (i = 0; i < DMAR_INTR_TOTAL; i++)
 260                 dmar_release_intr(dev, unit, i);
 261         if (unit->regs != NULL) {
 262                 bus_deactivate_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
 263                     unit->regs);
 264                 bus_release_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
 265                     unit->regs);
 266                 unit->regs = NULL;
 267         }
 268         if (unit->domids != NULL) {
 269                 delete_unrhdr(unit->domids);
 270                 unit->domids = NULL;
 271         }
 272         if (unit->ctx_obj != NULL) {
 273                 vm_object_deallocate(unit->ctx_obj);
 274                 unit->ctx_obj = NULL;
 275         }
 276 }
 277
 278 static int
 279 dmar_alloc_irq(device_t dev, struct dmar_unit *unit, int idx)
 280 {
 281         device_t pcib;
 282         struct dmar_msi_data *dmd;
 283         uint64_t msi_addr;
 284         uint32_t msi_data;
 285         int error;
 286
 287         dmd = &unit->intrs[idx];
 288         pcib = device_get_parent(device_get_parent(dev)); /* Really not pcib */
 289         error = PCIB_ALLOC_MSIX(pcib, dev, &dmd->irq);
 290         if (error != 0) {
 291                 device_printf(dev, "cannot allocate %s interrupt, %d\n",
 292                     dmd->name, error);
 293                 goto err1;
 294         }
 295         error = bus_set_resource(dev, SYS_RES_IRQ, dmd->irq_rid,
 296             dmd->irq, 1);
 297         if (error != 0) {
 298                 device_printf(dev, "cannot set %s interrupt resource, %d\n",
 299                     dmd->name, error);
 300                 goto err2;
 301         }
 302         dmd->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 303             &dmd->irq_rid, RF_ACTIVE);
 304         if (dmd->irq_res == NULL) {
 305                 device_printf(dev,
 306                     "cannot allocate resource for %s interrupt\n", dmd->name);
 307                 error = ENXIO;
 308                 goto err3;
 309         }
 310         error = bus_setup_intr(dev, dmd->irq_res, INTR_TYPE_MISC,
 311             dmd->handler, NULL, unit, &dmd->intr_handle);
 312         if (error != 0) {
 313                 device_printf(dev, "cannot setup %s interrupt, %d\n",
 314                     dmd->name, error);
 315                 goto err4;
 316         }
 317         bus_describe_intr(dev, dmd->irq_res, dmd->intr_handle, "%s", dmd->name);
 318         error = PCIB_MAP_MSI(pcib, dev, dmd->irq, &msi_addr, &msi_data);
 319         if (error != 0) {
 320                 device_printf(dev, "cannot map %s interrupt, %d\n",
 321                     dmd->name, error);
 322                 goto err5;
 323         }
 324         dmar_write4(unit, dmd->msi_data_reg, msi_data);
 325         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
 326         /* Only for xAPIC mode */
 327         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
 328         return (0);
 329
 330 err5:
 331         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
 332 err4:
 333         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
 334 err3:
 335         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
 336 err2:
 337         PCIB_RELEASE_MSIX(pcib, dev, dmd->irq);
 338         dmd->irq = -1;
 339 err1:
 340         return (error);
 341 }
 342
 343 #ifdef DEV_APIC
 344 static int
 345 dmar_remap_intr(device_t dev, device_t child, u_int irq)
 346 {
 347         struct dmar_unit *unit;
 348         struct dmar_msi_data *dmd;
 349         uint64_t msi_addr;
 350         uint32_t msi_data;
 351         int i, error;
 352
 353         unit = device_get_softc(dev);
 354         for (i = 0; i < DMAR_INTR_TOTAL; i++) {
 355                 dmd = &unit->intrs[i];
 356                 if (irq == dmd->irq) {
 357                         error = PCIB_MAP_MSI(device_get_parent(
 358                             device_get_parent(dev)),
 359                             dev, irq, &msi_addr, &msi_data);
 360                         if (error != 0)
 361                                 return (error);
 362                         DMAR_LOCK(unit);
 363                         (dmd->disable_intr)(unit);
 364                         dmar_write4(unit, dmd->msi_data_reg, msi_data);
 365                         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
 366                         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
 367                         (dmd->enable_intr)(unit);
 368                         DMAR_UNLOCK(unit);
 369                         return (0);
 370                 }
 371         }
 372         return (ENOENT);
 373 }
 374 #endif
 375
 376 static void
 377 dmar_print_caps(device_t dev, struct dmar_unit *unit,
 378     ACPI_DMAR_HARDWARE_UNIT *dmaru)
 379 {
 380         uint32_t caphi, ecaphi;
 381
 382         device_printf(dev, "regs@0x%08jx, ver=%d.%d, seg=%d, flags=<%b>\n",
 383             (uintmax_t)dmaru->Address, DMAR_MAJOR_VER(unit->hw_ver),
 384             DMAR_MINOR_VER(unit->hw_ver), dmaru->Segment,
 385             dmaru->Flags, "\020\001INCLUDE_ALL_PCI");
 386         caphi = unit->hw_cap >> 32;
 387         device_printf(dev, "cap=%b,", (u_int)unit->hw_cap,
 388             "\020\004AFL\005WBF\006PLMR\007PHMR\010CM\027ZLR\030ISOCH");
 389         printf("%b, ", caphi, "\020\010PSI\027DWD\030DRD\031FL1GP\034PSI");
 390         printf("ndoms=%d, sagaw=%d, mgaw=%d, fro=%d, nfr=%d, superp=%d",
 391             DMAR_CAP_ND(unit->hw_cap), DMAR_CAP_SAGAW(unit->hw_cap),
 392             DMAR_CAP_MGAW(unit->hw_cap), DMAR_CAP_FRO(unit->hw_cap),
 393             DMAR_CAP_NFR(unit->hw_cap), DMAR_CAP_SPS(unit->hw_cap));
 394         if ((unit->hw_cap & DMAR_CAP_PSI) != 0)
 395                 printf(", mamv=%d", DMAR_CAP_MAMV(unit->hw_cap));
 396         printf("\n");
 397         ecaphi = unit->hw_ecap >> 32;
 398         device_printf(dev, "ecap=%b,", (u_int)unit->hw_ecap,
 399             "\020\001C\002QI\003DI\004IR\005EIM\007PT\010SC\031ECS\032MTS"
 400             "\033NEST\034DIS\035PASID\036PRS\037ERS\040SRS");
 401         printf("%b, ", ecaphi, "\020\002NWFS\003EAFS");
 402         printf("mhmw=%d, iro=%d\n", DMAR_ECAP_MHMV(unit->hw_ecap),
 403             DMAR_ECAP_IRO(unit->hw_ecap));
 404 }
 405
 406 static int
 407 dmar_attach(device_t dev)
 408 {
 409         struct dmar_unit *unit;
 410         ACPI_DMAR_HARDWARE_UNIT *dmaru;
 411         uint64_t timeout;
 412         int i, error;
 413
 414         unit = device_get_softc(dev);
 415         unit->dev = dev;
 416         unit->unit = device_get_unit(dev);
 417         dmaru = dmar_find_by_index(unit->unit);
 418         if (dmaru == NULL)
 419                 return (EINVAL);
 420         unit->segment = dmaru->Segment;
 421         unit->base = dmaru->Address;
 422         unit->reg_rid = DMAR_REG_RID;
 423         unit->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 424             &unit->reg_rid, RF_ACTIVE);
 425         if (unit->regs == NULL) {
 426                 device_printf(dev, "cannot allocate register window\n");
 427                 return (ENOMEM);
 428         }
 429         unit->hw_ver = dmar_read4(unit, DMAR_VER_REG);
 430         unit->hw_cap = dmar_read8(unit, DMAR_CAP_REG);
 431         unit->hw_ecap = dmar_read8(unit, DMAR_ECAP_REG);
 432         if (bootverbose)
 433                 dmar_print_caps(dev, unit, dmaru);
 434         dmar_quirks_post_ident(unit);
 435
 436         timeout = dmar_get_timeout();
 437         TUNABLE_UINT64_FETCH("hw.dmar.timeout", &timeout);
 438         dmar_update_timeout(timeout);
 439
 440         for (i = 0; i < DMAR_INTR_TOTAL; i++)
 441                 unit->intrs[i].irq = -1;
 442
 443         unit->intrs[DMAR_INTR_FAULT].name = "fault";
 444         unit->intrs[DMAR_INTR_FAULT].irq_rid = DMAR_FAULT_IRQ_RID;
 445         unit->intrs[DMAR_INTR_FAULT].handler = dmar_fault_intr;
 446         unit->intrs[DMAR_INTR_FAULT].msi_data_reg = DMAR_FEDATA_REG;
 447         unit->intrs[DMAR_INTR_FAULT].msi_addr_reg = DMAR_FEADDR_REG;
 448         unit->intrs[DMAR_INTR_FAULT].msi_uaddr_reg = DMAR_FEUADDR_REG;
 449         unit->intrs[DMAR_INTR_FAULT].enable_intr = dmar_enable_fault_intr;
 450         unit->intrs[DMAR_INTR_FAULT].disable_intr = dmar_disable_fault_intr;
 451         error = dmar_alloc_irq(dev, unit, DMAR_INTR_FAULT);
 452         if (error != 0) {
 453                 dmar_release_resources(dev, unit);
 454                 return (error);
 455         }
 456         if (DMAR_HAS_QI(unit)) {
 457                 unit->intrs[DMAR_INTR_QI].name = "qi";
 458                 unit->intrs[DMAR_INTR_QI].irq_rid = DMAR_QI_IRQ_RID;
 459                 unit->intrs[DMAR_INTR_QI].handler = dmar_qi_intr;
 460                 unit->intrs[DMAR_INTR_QI].msi_data_reg = DMAR_IEDATA_REG;
 461                 unit->intrs[DMAR_INTR_QI].msi_addr_reg = DMAR_IEADDR_REG;
 462                 unit->intrs[DMAR_INTR_QI].msi_uaddr_reg = DMAR_IEUADDR_REG;
 463                 unit->intrs[DMAR_INTR_QI].enable_intr = dmar_enable_qi_intr;
 464                 unit->intrs[DMAR_INTR_QI].disable_intr = dmar_disable_qi_intr;
 465                 error = dmar_alloc_irq(dev, unit, DMAR_INTR_QI);
 466                 if (error != 0) {
 467                         dmar_release_resources(dev, unit);
 468                         return (error);
 469                 }
 470         }
 471
 472         mtx_init(&unit->lock, "dmarhw", NULL, MTX_DEF);
 473         unit->domids = new_unrhdr(0, dmar_nd2mask(DMAR_CAP_ND(unit->hw_cap)),
 474             &unit->lock);
 475         LIST_INIT(&unit->domains);
 476
 477         /*
 478          * 9.2 "Context Entry":
 479          * When Caching Mode (CM) field is reported as Set, the
 480          * domain-id value of zero is architecturally reserved.
 481          * Software must not use domain-id value of zero
 482          * when CM is Set.
 483          */
 484         if ((unit->hw_cap & DMAR_CAP_CM) != 0)
 485                 alloc_unr_specific(unit->domids, 0);
 486
 487         unit->ctx_obj = vm_pager_allocate(OBJT_PHYS, NULL, IDX_TO_OFF(1 +
 488             DMAR_CTX_CNT), 0, 0, NULL);
 489
 490         /*
 491          * Allocate and load the root entry table pointer.  Enable the
 492          * address translation after the required invalidations are
 493          * done.
 494          */
 495         dmar_pgalloc(unit->ctx_obj, 0, DMAR_PGF_WAITOK | DMAR_PGF_ZERO);
 496         DMAR_LOCK(unit);
 497         error = dmar_load_root_entry_ptr(unit);
 498         if (error != 0) {
 499                 DMAR_UNLOCK(unit);
 500                 dmar_release_resources(dev, unit);
 501                 return (error);
 502         }
 503         error = dmar_inv_ctx_glob(unit);
 504         if (error != 0) {
 505                 DMAR_UNLOCK(unit);
 506                 dmar_release_resources(dev, unit);
 507                 return (error);
 508         }
 509         if ((unit->hw_ecap & DMAR_ECAP_DI) != 0) {
 510                 error = dmar_inv_iotlb_glob(unit);
 511                 if (error != 0) {
 512                         DMAR_UNLOCK(unit);
 513                         dmar_release_resources(dev, unit);
 514                         return (error);
 515                 }
 516         }
 517
 518         DMAR_UNLOCK(unit);
 519         error = dmar_init_fault_log(unit);
 520         if (error != 0) {
 521                 dmar_release_resources(dev, unit);
 522                 return (error);
 523         }
 524         error = dmar_init_qi(unit);
 525         if (error != 0) {
 526                 dmar_release_resources(dev, unit);
 527                 return (error);
 528         }
 529         error = dmar_init_irt(unit);
 530         if (error != 0) {
 531                 dmar_release_resources(dev, unit);
 532                 return (error);
 533         }
 534         error = dmar_init_busdma(unit);
 535         if (error != 0) {
 536                 dmar_release_resources(dev, unit);
 537                 return (error);
 538         }
 539
 540 #ifdef NOTYET
 541         DMAR_LOCK(unit);
 542         error = dmar_enable_translation(unit);
 543         if (error != 0) {
 544                 DMAR_UNLOCK(unit);
 545                 dmar_release_resources(dev, unit);
 546                 return (error);
 547         }
 548         DMAR_UNLOCK(unit);
 549 #endif
 550
 551         return (0);
 552 }
 553
 554 static int
 555 dmar_detach(device_t dev)
 556 {
 557
 558         return (EBUSY);
 559 }
 560
 561 static int
 562 dmar_suspend(device_t dev)
 563 {
 564
 565         return (0);
 566 }
 567
 568 static int
 569 dmar_resume(device_t dev)
 570 {
 571
 572         /* XXXKIB */
 573         return (0);
 574 }
 575
 576 static device_method_t dmar_methods[] = {
 577         DEVMETHOD(device_identify, dmar_identify),
 578         DEVMETHOD(device_probe, dmar_probe),
 579         DEVMETHOD(device_attach, dmar_attach),
 580         DEVMETHOD(device_detach, dmar_detach),
 581         DEVMETHOD(device_suspend, dmar_suspend),
 582         DEVMETHOD(device_resume, dmar_resume),
 583 #ifdef DEV_APIC
 584         DEVMETHOD(bus_remap_intr, dmar_remap_intr),
 585 #endif
 586         DEVMETHOD_END
 587 };
 588
 589 static driver_t dmar_driver = {
 590         "dmar",
 591         dmar_methods,
 592         sizeof(struct dmar_unit),
 593 };
 594
 595 DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
 596 MODULE_DEPEND(dmar, acpi, 1, 1, 1);
 597
 598 static void
 599 dmar_print_path(int busno, int depth, const ACPI_DMAR_PCI_PATH *path)
 600 {
 601         int i;
 602
 603         printf("[%d, ", busno);
 604         for (i = 0; i < depth; i++) {
 605                 if (i != 0)
 606                         printf(", ");
 607                 printf("(%d, %d)", path[i].Device, path[i].Function);
 608         }
 609         printf("]");
 610 }
 611
 612 int
 613 dmar_dev_depth(device_t child)
 614 {
 615         devclass_t pci_class;
 616         device_t bus, pcib;
 617         int depth;
 618
 619         pci_class = devclass_find("pci");
 620         for (depth = 1; ; depth++) {
 621                 bus = device_get_parent(child);
 622                 pcib = device_get_parent(bus);
 623                 if (device_get_devclass(device_get_parent(pcib)) !=
 624                     pci_class)
 625                         return (depth);
 626                 child = pcib;
 627         }
 628 }
 629
 630 void
 631 dmar_dev_path(device_t child, int *busno, void *path1, int depth)
 632 {
 633         devclass_t pci_class;
 634         device_t bus, pcib;
 635         ACPI_DMAR_PCI_PATH *path;
 636
 637         pci_class = devclass_find("pci");
 638         path = path1;
 639         for (depth--; depth != -1; depth--) {
 640                 path[depth].Device = pci_get_slot(child);
 641                 path[depth].Function = pci_get_function(child);
 642                 bus = device_get_parent(child);
 643                 pcib = device_get_parent(bus);
 644                 if (device_get_devclass(device_get_parent(pcib)) !=
 645                     pci_class) {
 646                         /* reached a host bridge */
 647                         *busno = pcib_get_bus(bus);
 648                         return;
 649                 }
 650                 child = pcib;
 651         }
 652         panic("wrong depth");
 653 }
 654
 655 static int
 656 dmar_match_pathes(int busno1, const ACPI_DMAR_PCI_PATH *path1, int depth1,
 657     int busno2, const ACPI_DMAR_PCI_PATH *path2, int depth2,
 658     enum AcpiDmarScopeType scope_type)
 659 {
 660         int i, depth;
 661
 662         if (busno1 != busno2)
 663                 return (0);
 664         if (scope_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT && depth1 != depth2)
 665                 return (0);
 666         depth = depth1;
 667         if (depth2 < depth)
 668                 depth = depth2;
 669         for (i = 0; i < depth; i++) {
 670                 if (path1[i].Device != path2[i].Device ||
 671                     path1[i].Function != path2[i].Function)
 672                         return (0);
 673         }
 674         return (1);
 675 }
 676
 677 static int
 678 dmar_match_devscope(ACPI_DMAR_DEVICE_SCOPE *devscope, int dev_busno,
 679     const ACPI_DMAR_PCI_PATH *dev_path, int dev_path_len)
 680 {
 681         ACPI_DMAR_PCI_PATH *path;
 682         int path_len;
 683
 684         if (devscope->Length < sizeof(*devscope)) {
 685                 printf("dmar_match_devscope: corrupted DMAR table, dl %d\n",
 686                     devscope->Length);
 687                 return (-1);
 688         }
 689         if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT &&
 690             devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_BRIDGE)
 691                 return (0);
 692         path_len = devscope->Length - sizeof(*devscope);
 693         if (path_len % 2 != 0) {
 694                 printf("dmar_match_devscope: corrupted DMAR table, dl %d\n",
 695                     devscope->Length);
 696                 return (-1);
 697         }
 698         path_len /= 2;
 699         path = (ACPI_DMAR_PCI_PATH *)(devscope + 1);
 700         if (path_len == 0) {
 701                 printf("dmar_match_devscope: corrupted DMAR table, dl %d\n",
 702                     devscope->Length);
 703                 return (-1);
 704         }
 705
 706         return (dmar_match_pathes(devscope->Bus, path, path_len, dev_busno,
 707             dev_path, dev_path_len, devscope->EntryType));
 708 }
 709
 710 static bool
 711 dmar_match_by_path(struct dmar_unit *unit, int dev_domain, int dev_busno,
 712     const ACPI_DMAR_PCI_PATH *dev_path, int dev_path_len, const char **banner)
 713 {
 714         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 715         ACPI_DMAR_DEVICE_SCOPE *devscope;
 716         char *ptr, *ptrend;
 717         int match;
 718
 719         dmarh = dmar_find_by_index(unit->unit);
 720         if (dmarh == NULL)
 721                 return (false);
 722         if (dmarh->Segment != dev_domain)
 723                 return (false);
 724         if ((dmarh->Flags & ACPI_DMAR_INCLUDE_ALL) != 0) {
 725                 if (banner != NULL)
 726                         *banner = "INCLUDE_ALL";
 727                 return (true);
 728         }
 729         ptr = (char *)dmarh + sizeof(*dmarh);
 730         ptrend = (char *)dmarh + dmarh->Header.Length;
 731         while (ptr < ptrend) {
 732                 devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 733                 ptr += devscope->Length;
 734                 match = dmar_match_devscope(devscope, dev_busno, dev_path,
 735                     dev_path_len);
 736                 if (match == -1)
 737                         return (false);
 738                 if (match == 1) {
 739                         if (banner != NULL)
 740                                 *banner = "specific match";
 741                         return (true);
 742                 }
 743         }
 744         return (false);
 745 }
 746
 747 static struct dmar_unit *
 748 dmar_find_by_scope(int dev_domain, int dev_busno,
 749     const ACPI_DMAR_PCI_PATH *dev_path, int dev_path_len)
 750 {
 751         struct dmar_unit *unit;
 752         int i;
 753
 754         for (i = 0; i < dmar_devcnt; i++) {
 755                 if (dmar_devs[i] == NULL)
 756                         continue;
 757                 unit = device_get_softc(dmar_devs[i]);
 758                 if (dmar_match_by_path(unit, dev_domain, dev_busno, dev_path,
 759                     dev_path_len, NULL))
 760                         return (unit);
 761         }
 762         return (NULL);
 763 }
 764
 765 struct dmar_unit *
 766 dmar_find(device_t dev, bool verbose)
 767 {
 768         device_t dmar_dev;
 769         struct dmar_unit *unit;
 770         const char *banner;
 771         int i, dev_domain, dev_busno, dev_path_len;
 772
 773         /*
 774          * This function can only handle PCI(e) devices.
 775          */
 776         if (device_get_devclass(device_get_parent(dev)) !=
 777             devclass_find("pci"))
 778                 return (NULL);
 779
 780         dmar_dev = NULL;
 781         dev_domain = pci_get_domain(dev);
 782         dev_path_len = dmar_dev_depth(dev);
 783         ACPI_DMAR_PCI_PATH dev_path[dev_path_len];
 784         dmar_dev_path(dev, &dev_busno, dev_path, dev_path_len);
 785         banner = "";
 786
 787         for (i = 0; i < dmar_devcnt; i++) {
 788                 if (dmar_devs[i] == NULL)
 789                         continue;
 790                 unit = device_get_softc(dmar_devs[i]);
 791                 if (dmar_match_by_path(unit, dev_domain, dev_busno,
 792                     dev_path, dev_path_len, &banner))
 793                         break;
 794         }
 795         if (i == dmar_devcnt)
 796                 return (NULL);
 797
 798         if (verbose) {
 799                 device_printf(dev, "pci%d:%d:%d:%d matched dmar%d by %s",
 800                     dev_domain, pci_get_bus(dev), pci_get_slot(dev),
 801                     pci_get_function(dev), unit->unit, banner);
 802                 printf(" scope path ");
 803                 dmar_print_path(dev_busno, dev_path_len, dev_path);
 804                 printf("\n");
 805         }
 806         return (unit);
 807 }
 808
 809 static struct dmar_unit *
 810 dmar_find_nonpci(u_int id, u_int entry_type, uint16_t *rid)
 811 {
 812         device_t dmar_dev;
 813         struct dmar_unit *unit;
 814         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 815         ACPI_DMAR_DEVICE_SCOPE *devscope;
 816         ACPI_DMAR_PCI_PATH *path;
 817         char *ptr, *ptrend;
 818 #ifdef DEV_APIC
 819         int error;
 820 #endif
 821         int i;
 822
 823         for (i = 0; i < dmar_devcnt; i++) {
 824                 dmar_dev = dmar_devs[i];
 825                 if (dmar_dev == NULL)
 826                         continue;
 827                 unit = (struct dmar_unit *)device_get_softc(dmar_dev);
 828                 dmarh = dmar_find_by_index(i);
 829                 if (dmarh == NULL)
 830                         continue;
 831                 ptr = (char *)dmarh + sizeof(*dmarh);
 832                 ptrend = (char *)dmarh + dmarh->Header.Length;
 833                 for (;;) {
 834                         if (ptr >= ptrend)
 835                                 break;
 836                         devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 837                         ptr += devscope->Length;
 838                         if (devscope->EntryType != entry_type)
 839                                 continue;
 840                         if (devscope->EnumerationId != id)
 841                                 continue;
 842 #ifdef DEV_APIC
 843                         if (entry_type == ACPI_DMAR_SCOPE_TYPE_IOAPIC) {
 844                                 error = ioapic_get_rid(id, rid);
 845                                 /*
 846                                  * If our IOAPIC has PCI bindings then
 847                                  * use the PCI device rid.
 848                                  */
 849                                 if (error == 0)
 850                                         return (unit);
 851                         }
 852 #endif
 853                         if (devscope->Length - sizeof(ACPI_DMAR_DEVICE_SCOPE)
 854                             == 2) {
 855                                 if (rid != NULL) {
 856                                         path = (ACPI_DMAR_PCI_PATH *)
 857                                             (devscope + 1);
 858                                         *rid = PCI_RID(devscope->Bus,
 859                                             path->Device, path->Function);
 860                                 }
 861                                 return (unit);
 862                         }
 863                         printf(
 864                            "dmar_find_nonpci: id %d type %d path length != 2\n",
 865                             id, entry_type);
 866                         break;
 867                 }
 868         }
 869         return (NULL);
 870 }
 871
 872
 873 struct dmar_unit *
 874 dmar_find_hpet(device_t dev, uint16_t *rid)
 875 {
 876
 877         return (dmar_find_nonpci(hpet_get_uid(dev), ACPI_DMAR_SCOPE_TYPE_HPET,
 878             rid));
 879 }
 880
 881 struct dmar_unit *
 882 dmar_find_ioapic(u_int apic_id, uint16_t *rid)
 883 {
 884
 885         return (dmar_find_nonpci(apic_id, ACPI_DMAR_SCOPE_TYPE_IOAPIC, rid));
 886 }
 887
 888 struct rmrr_iter_args {
 889         struct dmar_domain *domain;
 890         int dev_domain;
 891         int dev_busno;
 892         const ACPI_DMAR_PCI_PATH *dev_path;
 893         int dev_path_len;
 894         struct dmar_map_entries_tailq *rmrr_entries;
 895 };
 896
 897 static int
 898 dmar_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 899 {
 900         struct rmrr_iter_args *ria;
 901         ACPI_DMAR_RESERVED_MEMORY *resmem;
 902         ACPI_DMAR_DEVICE_SCOPE *devscope;
 903         struct dmar_map_entry *entry;
 904         char *ptr, *ptrend;
 905         int match;
 906
 907         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
 908                 return (1);
 909
 910         ria = arg;
 911         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
 912         if (resmem->Segment != ria->dev_domain)
 913                 return (1);
 914
 915         ptr = (char *)resmem + sizeof(*resmem);
 916         ptrend = (char *)resmem + resmem->Header.Length;
 917         for (;;) {
 918                 if (ptr >= ptrend)
 919                         break;
 920                 devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 921                 ptr += devscope->Length;
 922                 match = dmar_match_devscope(devscope, ria->dev_busno,
 923                     ria->dev_path, ria->dev_path_len);
 924                 if (match == 1) {
 925                         entry = dmar_gas_alloc_entry(ria->domain,
 926                             DMAR_PGF_WAITOK);
 927                         entry->start = resmem->BaseAddress;
 928                         /* The RMRR entry end address is inclusive. */
 929                         entry->end = resmem->EndAddress;
 930                         TAILQ_INSERT_TAIL(ria->rmrr_entries, entry,
 931                             unroll_link);
 932                 }
 933         }
 934
 935         return (1);
 936 }
 937
 938 void
 939 dmar_dev_parse_rmrr(struct dmar_domain *domain, int dev_domain, int dev_busno,
 940     const void *dev_path, int dev_path_len,
 941     struct dmar_map_entries_tailq *rmrr_entries)
 942 {
 943         struct rmrr_iter_args ria;
 944
 945         ria.domain = domain;
 946         ria.dev_domain = dev_domain;
 947         ria.dev_busno = dev_busno;
 948         ria.dev_path = (const ACPI_DMAR_PCI_PATH *)dev_path;
 949         ria.dev_path_len = dev_path_len;
 950         ria.rmrr_entries = rmrr_entries;
 951         dmar_iterate_tbl(dmar_rmrr_iter, &ria);
 952 }
 953
 954 struct inst_rmrr_iter_args {
 955         struct dmar_unit *dmar;
 956 };
 957
 958 static device_t
 959 dmar_path_dev(int segment, int path_len, int busno,
 960     const ACPI_DMAR_PCI_PATH *path, uint16_t *rid)
 961 {
 962         device_t dev;
 963         int i;
 964
 965         dev = NULL;
 966         for (i = 0; i < path_len; i++) {
 967                 dev = pci_find_dbsf(segment, busno, path->Device,
 968                     path->Function);
 969                 if (i != path_len - 1) {
 970                         busno = pci_cfgregread(busno, path->Device,
 971                             path->Function, PCIR_SECBUS_1, 1);
 972                         path++;
 973                 }
 974         }
 975         *rid = PCI_RID(busno, path->Device, path->Function);
 976         return (dev);
 977 }
 978
 979 static int
 980 dmar_inst_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 981 {
 982         const ACPI_DMAR_RESERVED_MEMORY *resmem;
 983         const ACPI_DMAR_DEVICE_SCOPE *devscope;
 984         struct inst_rmrr_iter_args *iria;
 985         const char *ptr, *ptrend;
 986         device_t dev;
 987         struct dmar_unit *unit;
 988         int dev_path_len;
 989         uint16_t rid;
 990
 991         iria = arg;
 992
 993         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
 994                 return (1);
 995
 996         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
 997         if (resmem->Segment != iria->dmar->segment)
 998                 return (1);
 999
1000         ptr = (const char *)resmem + sizeof(*resmem);
1001         ptrend = (const char *)resmem + resmem->Header.Length;
1002         for (;;) {
1003                 if (ptr >= ptrend)
1004                         break;
1005                 devscope = (const ACPI_DMAR_DEVICE_SCOPE *)ptr;
1006                 ptr += devscope->Length;
1007                 /* XXXKIB bridge */
1008                 if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT)
1009                         continue;
1010                 rid = 0;
1011                 dev_path_len = (devscope->Length -
1012                     sizeof(ACPI_DMAR_DEVICE_SCOPE)) / 2;
1013                 dev = dmar_path_dev(resmem->Segment, dev_path_len,
1014                     devscope->Bus,
1015                     (const ACPI_DMAR_PCI_PATH *)(devscope + 1), &rid);
1016                 if (dev == NULL) {
1017                         if (bootverbose) {
1018                                 printf("dmar%d no dev found for RMRR "
1019                                     "[%#jx, %#jx] rid %#x scope path ",
1020                                      iria->dmar->unit,
1021                                      (uintmax_t)resmem->BaseAddress,
1022                                      (uintmax_t)resmem->EndAddress,
1023                                      rid);
1024                                 dmar_print_path(devscope->Bus, dev_path_len,
1025                                     (const ACPI_DMAR_PCI_PATH *)(devscope + 1));
1026                                 printf("\n");
1027                         }
1028                         unit = dmar_find_by_scope(resmem->Segment,
1029                             devscope->Bus,
1030                             (const ACPI_DMAR_PCI_PATH *)(devscope + 1),
1031                             dev_path_len);
1032                         if (iria->dmar != unit)
1033                                 continue;
1034                         dmar_get_ctx_for_devpath(iria->dmar, rid,
1035                             resmem->Segment, devscope->Bus,
1036                             (const ACPI_DMAR_PCI_PATH *)(devscope + 1),
1037                             dev_path_len, false, true);
1038                 } else {
1039                         unit = dmar_find(dev, false);
1040                         if (iria->dmar != unit)
1041                                 continue;
1042                         dmar_instantiate_ctx(iria->dmar, dev, true);
1043                 }
1044         }
1045
1046         return (1);
1047
1048 }
1049
1050 /*
1051  * Pre-create all contexts for the DMAR which have RMRR entries.
1052  */
1053 int
1054 dmar_instantiate_rmrr_ctxs(struct dmar_unit *dmar)
1055 {
1056         struct inst_rmrr_iter_args iria;
1057         int error;
1058
1059         if (!dmar_barrier_enter(dmar, DMAR_BARRIER_RMRR))
1060                 return (0);
1061
1062         error = 0;
1063         iria.dmar = dmar;
1064         dmar_iterate_tbl(dmar_inst_rmrr_iter, &iria);
1065         DMAR_LOCK(dmar);
1066         if (!LIST_EMPTY(&dmar->domains)) {
1067                 KASSERT((dmar->hw_gcmd & DMAR_GCMD_TE) == 0,
1068             ("dmar%d: RMRR not handled but translation is already enabled",
1069                     dmar->unit));
1070                 error = dmar_enable_translation(dmar);
1071                 if (bootverbose) {
1072                         if (error == 0) {
1073                                 printf("dmar%d: enabled translation\n",
1074                                     dmar->unit);
1075                         } else {
1076                                 printf("dmar%d: enabling translation failed, "
1077                                     "error %d\n", dmar->unit, error);
1078                         }
1079                 }
1080         }
1081         dmar_barrier_exit(dmar, DMAR_BARRIER_RMRR);
1082         return (error);
1083 }
1084
1085 #ifdef DDB
1086 #include <ddb/ddb.h>
1087 #include <ddb/db_lex.h>
1088
1089 static void
1090 dmar_print_domain_entry(const struct dmar_map_entry *entry)
1091 {
1092         struct dmar_map_entry *l, *r;
1093
1094         db_printf(
1095             "    start %jx end %jx free_after %jx free_down %jx flags %x ",
1096             entry->start, entry->end, entry->free_after, entry->free_down,
1097             entry->flags);
1098         db_printf("left ");
1099         l = RB_LEFT(entry, rb_entry);
1100         if (l == NULL)
1101                 db_printf("NULL ");
1102         else
1103                 db_printf("%jx ", l->start);
1104         db_printf("right ");
1105         r = RB_RIGHT(entry, rb_entry);
1106         if (r == NULL)
1107                 db_printf("NULL");
1108         else
1109                 db_printf("%jx", r->start);
1110         db_printf("\n");
1111 }
1112
1113 static void
1114 dmar_print_ctx(struct dmar_ctx *ctx)
1115 {
1116
1117         db_printf(
1118             "    @%p pci%d:%d:%d refs %d flags %x loads %lu unloads %lu\n",
1119             ctx, pci_get_bus(ctx->ctx_tag.owner),
1120             pci_get_slot(ctx->ctx_tag.owner),
1121             pci_get_function(ctx->ctx_tag.owner), ctx->refs, ctx->flags,
1122             ctx->loads, ctx->unloads);
1123 }
1124
1125 static void
1126 dmar_print_domain(struct dmar_domain *domain, bool show_mappings)
1127 {
1128         struct dmar_map_entry *entry;
1129         struct dmar_ctx *ctx;
1130
1131         db_printf(
1132             "  @%p dom %d mgaw %d agaw %d pglvl %d end %jx refs %d\n"
1133             "   ctx_cnt %d flags %x pgobj %p map_ents %u\n",
1134             domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl,
1135             (uintmax_t)domain->end, domain->refs, domain->ctx_cnt,
1136             domain->flags, domain->pgtbl_obj, domain->entries_cnt);
1137         if (!LIST_EMPTY(&domain->contexts)) {
1138                 db_printf("  Contexts:\n");
1139                 LIST_FOREACH(ctx, &domain->contexts, link)
1140                         dmar_print_ctx(ctx);
1141         }
1142         if (!show_mappings)
1143                 return;
1144         db_printf("    mapped:\n");
1145         RB_FOREACH(entry, dmar_gas_entries_tree, &domain->rb_root) {
1146                 dmar_print_domain_entry(entry);
1147                 if (db_pager_quit)
1148                         break;
1149         }
1150         if (db_pager_quit)
1151                 return;
1152         db_printf("    unloading:\n");
1153         TAILQ_FOREACH(entry, &domain->unload_entries, dmamap_link) {
1154                 dmar_print_domain_entry(entry);
1155                 if (db_pager_quit)
1156                         break;
1157         }
1158 }
1159
1160 DB_FUNC(dmar_domain, db_dmar_print_domain, db_show_table, CS_OWN, NULL)
1161 {
1162         struct dmar_unit *unit;
1163         struct dmar_domain *domain;
1164         struct dmar_ctx *ctx;
1165         bool show_mappings, valid;
1166         int pci_domain, bus, device, function, i, t;
1167         db_expr_t radix;
1168
1169         valid = false;
1170         radix = db_radix;
1171         db_radix = 10;
1172         t = db_read_token();
1173         if (t == tSLASH) {
1174                 t = db_read_token();
1175                 if (t != tIDENT) {
1176                         db_printf("Bad modifier\n");
1177                         db_radix = radix;
1178                         db_skip_to_eol();
1179                         return;
1180                 }
1181                 show_mappings = strchr(db_tok_string, 'm') != NULL;
1182                 t = db_read_token();
1183         } else {
1184                 show_mappings = false;
1185         }
1186         if (t == tNUMBER) {
1187                 pci_domain = db_tok_number;
1188                 t = db_read_token();
1189                 if (t == tNUMBER) {
1190                         bus = db_tok_number;
1191                         t = db_read_token();
1192                         if (t == tNUMBER) {
1193                                 device = db_tok_number;
1194                                 t = db_read_token();
1195                                 if (t == tNUMBER) {
1196                                         function = db_tok_number;
1197                                         valid = true;
1198                                 }
1199                         }
1200                 }
1201         }
1202                         db_radix = radix;
1203         db_skip_to_eol();
1204         if (!valid) {
1205                 db_printf("usage: show dmar_domain [/m] "
1206                     "<domain> <bus> <device> <func>\n");
1207                 return;
1208         }
1209         for (i = 0; i < dmar_devcnt; i++) {
1210                 unit = device_get_softc(dmar_devs[i]);
1211                 LIST_FOREACH(domain, &unit->domains, link) {
1212                         LIST_FOREACH(ctx, &domain->contexts, link) {
1213                                 if (pci_domain == unit->segment &&
1214                                     bus == pci_get_bus(ctx->ctx_tag.owner) &&
1215                                     device ==
1216                                     pci_get_slot(ctx->ctx_tag.owner) &&
1217                                     function ==
1218                                     pci_get_function(ctx->ctx_tag.owner)) {
1219                                         dmar_print_domain(domain,
1220                                             show_mappings);
1221                                         goto out;
1222                                 }
1223                         }
1224                 }
1225         }
1226 out:;
1227 }
1228
1229 static void
1230 dmar_print_one(int idx, bool show_domains, bool show_mappings)
1231 {
1232         struct dmar_unit *unit;
1233         struct dmar_domain *domain;
1234         int i, frir;
1235
1236         unit = device_get_softc(dmar_devs[idx]);
1237         db_printf("dmar%d at %p, root at 0x%jx, ver 0x%x\n", unit->unit, unit,
1238             dmar_read8(unit, DMAR_RTADDR_REG), dmar_read4(unit, DMAR_VER_REG));
1239         db_printf("cap 0x%jx ecap 0x%jx gsts 0x%x fsts 0x%x fectl 0x%x\n",
1240             (uintmax_t)dmar_read8(unit, DMAR_CAP_REG),
1241             (uintmax_t)dmar_read8(unit, DMAR_ECAP_REG),
1242             dmar_read4(unit, DMAR_GSTS_REG),
1243             dmar_read4(unit, DMAR_FSTS_REG),
1244             dmar_read4(unit, DMAR_FECTL_REG));
1245         if (unit->ir_enabled) {
1246                 db_printf("ir is enabled; IRT @%p phys 0x%jx maxcnt %d\n",
1247                     unit->irt, (uintmax_t)unit->irt_phys, unit->irte_cnt);
1248         }
1249         db_printf("fed 0x%x fea 0x%x feua 0x%x\n",
1250             dmar_read4(unit, DMAR_FEDATA_REG),
1251             dmar_read4(unit, DMAR_FEADDR_REG),
1252             dmar_read4(unit, DMAR_FEUADDR_REG));
1253         db_printf("primary fault log:\n");
1254         for (i = 0; i < DMAR_CAP_NFR(unit->hw_cap); i++) {
1255                 frir = (DMAR_CAP_FRO(unit->hw_cap) + i) * 16;
1256                 db_printf("  %d at 0x%x: %jx %jx\n", i, frir,
1257                     (uintmax_t)dmar_read8(unit, frir),
1258                     (uintmax_t)dmar_read8(unit, frir + 8));
1259         }
1260         if (DMAR_HAS_QI(unit)) {
1261                 db_printf("ied 0x%x iea 0x%x ieua 0x%x\n",
1262                     dmar_read4(unit, DMAR_IEDATA_REG),
1263                     dmar_read4(unit, DMAR_IEADDR_REG),
1264                     dmar_read4(unit, DMAR_IEUADDR_REG));
1265                 if (unit->qi_enabled) {
1266                         db_printf("qi is enabled: queue @0x%jx (IQA 0x%jx) "
1267                             "size 0x%jx\n"
1268                     "  head 0x%x tail 0x%x avail 0x%x status 0x%x ctrl 0x%x\n"
1269                     "  hw compl 0x%x@%p/phys@%jx next seq 0x%x gen 0x%x\n",
1270                             (uintmax_t)unit->inv_queue,
1271                             (uintmax_t)dmar_read8(unit, DMAR_IQA_REG),
1272                             (uintmax_t)unit->inv_queue_size,
1273                             dmar_read4(unit, DMAR_IQH_REG),
1274                             dmar_read4(unit, DMAR_IQT_REG),
1275                             unit->inv_queue_avail,
1276                             dmar_read4(unit, DMAR_ICS_REG),
1277                             dmar_read4(unit, DMAR_IECTL_REG),
1278                             unit->inv_waitd_seq_hw,
1279                             &unit->inv_waitd_seq_hw,
1280                             (uintmax_t)unit->inv_waitd_seq_hw_phys,
1281                             unit->inv_waitd_seq,
1282                             unit->inv_waitd_gen);
1283                 } else {
1284                         db_printf("qi is disabled\n");
1285                 }
1286         }
1287         if (show_domains) {
1288                 db_printf("domains:\n");
1289                 LIST_FOREACH(domain, &unit->domains, link) {
1290                         dmar_print_domain(domain, show_mappings);
1291                         if (db_pager_quit)
1292                                 break;
1293                 }
1294         }
1295 }
1296
1297 DB_SHOW_COMMAND(dmar, db_dmar_print)
1298 {
1299         bool show_domains, show_mappings;
1300
1301         show_domains = strchr(modif, 'd') != NULL;
1302         show_mappings = strchr(modif, 'm') != NULL;
1303         if (!have_addr) {
1304                 db_printf("usage: show dmar [/d] [/m] index\n");
1305                 return;
1306         }
1307         dmar_print_one((int)addr, show_domains, show_mappings);
1308 }
1309
1310 DB_SHOW_ALL_COMMAND(dmars, db_show_all_dmars)
1311 {
1312         int i;
1313         bool show_domains, show_mappings;
1314
1315         show_domains = strchr(modif, 'd') != NULL;
1316         show_mappings = strchr(modif, 'm') != NULL;
1317
1318         for (i = 0; i < dmar_devcnt; i++) {
1319                 dmar_print_one(i, show_domains, show_mappings);
1320                 if (db_pager_quit)
1321                         break;
1322         }
1323 }
1324 #endif