sys/x86/iommu/intel_drv.c

   1 /*-
   2  * Copyright (c) 2013-2015 The FreeBSD Foundation
   3  * All rights reserved.
   4  *
   5  * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
   6  * under sponsorship from the FreeBSD Foundation.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29
  30 #include <sys/cdefs.h>
  31 __FBSDID("$FreeBSD$");
  32
  33 #include "opt_acpi.h"
  34 #if defined(__amd64__)
  35 #define DEV_APIC
  36 #else
  37 #include "opt_apic.h"
  38 #endif
  39 #include "opt_ddb.h"
  40
  41 #include <sys/param.h>
  42 #include <sys/bus.h>
  43 #include <sys/kernel.h>
  44 #include <sys/lock.h>
  45 #include <sys/malloc.h>
  46 #include <sys/memdesc.h>
  47 #include <sys/module.h>
  48 #include <sys/rman.h>
  49 #include <sys/rwlock.h>
  50 #include <sys/smp.h>
  51 #include <sys/taskqueue.h>
  52 #include <sys/tree.h>
  53 #include <sys/vmem.h>
  54 #include <machine/bus.h>
  55 #include <contrib/dev/acpica/include/acpi.h>
  56 #include <contrib/dev/acpica/include/accommon.h>
  57 #include <dev/acpica/acpivar.h>
  58 #include <vm/vm.h>
  59 #include <vm/vm_extern.h>
  60 #include <vm/vm_kern.h>
  61 #include <vm/vm_object.h>
  62 #include <vm/vm_page.h>
  63 #include <vm/vm_pager.h>
  64 #include <vm/vm_map.h>
  65 #include <x86/include/busdma_impl.h>
  66 #include <x86/iommu/intel_reg.h>
  67 #include <x86/iommu/busdma_dmar.h>
  68 #include <x86/iommu/intel_dmar.h>
  69 #include <dev/pci/pcireg.h>
  70 #include <dev/pci/pcivar.h>
  71
  72 #ifdef DEV_APIC
  73 #include "pcib_if.h"
  74 #endif
  75
  76 #define DMAR_FAULT_IRQ_RID      0
  77 #define DMAR_QI_IRQ_RID         1
  78 #define DMAR_REG_RID            2
  79
  80 static devclass_t dmar_devclass;
  81 static device_t *dmar_devs;
  82 static int dmar_devcnt;
  83
  84 typedef int (*dmar_iter_t)(ACPI_DMAR_HEADER *, void *);
  85
  86 static void
  87 dmar_iterate_tbl(dmar_iter_t iter, void *arg)
  88 {
  89         ACPI_TABLE_DMAR *dmartbl;
  90         ACPI_DMAR_HEADER *dmarh;
  91         char *ptr, *ptrend;
  92         ACPI_STATUS status;
  93
  94         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
  95         if (ACPI_FAILURE(status))
  96                 return;
  97         ptr = (char *)dmartbl + sizeof(*dmartbl);
  98         ptrend = (char *)dmartbl + dmartbl->Header.Length;
  99         for (;;) {
 100                 if (ptr >= ptrend)
 101                         break;
 102                 dmarh = (ACPI_DMAR_HEADER *)ptr;
 103                 if (dmarh->Length <= 0) {
 104                         printf("dmar_identify: corrupted DMAR table, l %d\n",
 105                             dmarh->Length);
 106                         break;
 107                 }
 108                 ptr += dmarh->Length;
 109                 if (!iter(dmarh, arg))
 110                         break;
 111         }
 112         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
 113 }
 114
 115 struct find_iter_args {
 116         int i;
 117         ACPI_DMAR_HARDWARE_UNIT *res;
 118 };
 119
 120 static int
 121 dmar_find_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 122 {
 123         struct find_iter_args *fia;
 124
 125         if (dmarh->Type != ACPI_DMAR_TYPE_HARDWARE_UNIT)
 126                 return (1);
 127
 128         fia = arg;
 129         if (fia->i == 0) {
 130                 fia->res = (ACPI_DMAR_HARDWARE_UNIT *)dmarh;
 131                 return (0);
 132         }
 133         fia->i--;
 134         return (1);
 135 }
 136
 137 static ACPI_DMAR_HARDWARE_UNIT *
 138 dmar_find_by_index(int idx)
 139 {
 140         struct find_iter_args fia;
 141
 142         fia.i = idx;
 143         fia.res = NULL;
 144         dmar_iterate_tbl(dmar_find_iter, &fia);
 145         return (fia.res);
 146 }
 147
 148 static int
 149 dmar_count_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 150 {
 151
 152         if (dmarh->Type == ACPI_DMAR_TYPE_HARDWARE_UNIT)
 153                 dmar_devcnt++;
 154         return (1);
 155 }
 156
 157 static int dmar_enable = 0;
 158 static void
 159 dmar_identify(driver_t *driver, device_t parent)
 160 {
 161         ACPI_TABLE_DMAR *dmartbl;
 162         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 163         ACPI_STATUS status;
 164         int i, error;
 165
 166         if (acpi_disabled("dmar"))
 167                 return;
 168         TUNABLE_INT_FETCH("hw.dmar.enable", &dmar_enable);
 169         if (!dmar_enable)
 170                 return;
 171 #ifdef INVARIANTS
 172         TUNABLE_INT_FETCH("hw.dmar.check_free", &dmar_check_free);
 173 #endif
 174         TUNABLE_INT_FETCH("hw.dmar.match_verbose", &dmar_match_verbose);
 175         status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl);
 176         if (ACPI_FAILURE(status))
 177                 return;
 178         haw = dmartbl->Width + 1;
 179         if ((1ULL << (haw + 1)) > BUS_SPACE_MAXADDR)
 180                 dmar_high = BUS_SPACE_MAXADDR;
 181         else
 182                 dmar_high = 1ULL << (haw + 1);
 183         if (bootverbose) {
 184                 printf("DMAR HAW=%d flags=<%b>\n", dmartbl->Width,
 185                     (unsigned)dmartbl->Flags,
 186                     "\020\001INTR_REMAP\002X2APIC_OPT_OUT");
 187         }
 188         AcpiPutTable((ACPI_TABLE_HEADER *)dmartbl);
 189
 190         dmar_iterate_tbl(dmar_count_iter, NULL);
 191         if (dmar_devcnt == 0)
 192                 return;
 193         dmar_devs = malloc(sizeof(device_t) * dmar_devcnt, M_DEVBUF,
 194             M_WAITOK | M_ZERO);
 195         for (i = 0; i < dmar_devcnt; i++) {
 196                 dmarh = dmar_find_by_index(i);
 197                 if (dmarh == NULL) {
 198                         printf("dmar_identify: cannot find HWUNIT %d\n", i);
 199                         continue;
 200                 }
 201                 dmar_devs[i] = BUS_ADD_CHILD(parent, 1, "dmar", i);
 202                 if (dmar_devs[i] == NULL) {
 203                         printf("dmar_identify: cannot create instance %d\n", i);
 204                         continue;
 205                 }
 206                 error = bus_set_resource(dmar_devs[i], SYS_RES_MEMORY,
 207                     DMAR_REG_RID, dmarh->Address, PAGE_SIZE);
 208                 if (error != 0) {
 209                         printf(
 210         "dmar%d: unable to alloc register window at 0x%08jx: error %d\n",
 211                             i, (uintmax_t)dmarh->Address, error);
 212                         device_delete_child(parent, dmar_devs[i]);
 213                         dmar_devs[i] = NULL;
 214                 }
 215         }
 216 }
 217
 218 static int
 219 dmar_probe(device_t dev)
 220 {
 221
 222         if (acpi_get_handle(dev) != NULL)
 223                 return (ENXIO);
 224         device_set_desc(dev, "DMA remap");
 225         return (BUS_PROBE_NOWILDCARD);
 226 }
 227
 228 static void
 229 dmar_release_intr(device_t dev, struct dmar_unit *unit, int idx)
 230 {
 231         struct dmar_msi_data *dmd;
 232
 233         dmd = &unit->intrs[idx];
 234         if (dmd->irq == -1)
 235                 return;
 236         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
 237         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
 238         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
 239         PCIB_RELEASE_MSIX(device_get_parent(device_get_parent(dev)),
 240             dev, dmd->irq);
 241         dmd->irq = -1;
 242 }
 243
 244 static void
 245 dmar_release_resources(device_t dev, struct dmar_unit *unit)
 246 {
 247         int i;
 248
 249         dmar_fini_busdma(unit);
 250         dmar_fini_irt(unit);
 251         dmar_fini_qi(unit);
 252         dmar_fini_fault_log(unit);
 253         for (i = 0; i < DMAR_INTR_TOTAL; i++)
 254                 dmar_release_intr(dev, unit, i);
 255         if (unit->regs != NULL) {
 256                 bus_deactivate_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
 257                     unit->regs);
 258                 bus_release_resource(dev, SYS_RES_MEMORY, unit->reg_rid,
 259                     unit->regs);
 260                 unit->regs = NULL;
 261         }
 262         if (unit->domids != NULL) {
 263                 delete_unrhdr(unit->domids);
 264                 unit->domids = NULL;
 265         }
 266         if (unit->ctx_obj != NULL) {
 267                 vm_object_deallocate(unit->ctx_obj);
 268                 unit->ctx_obj = NULL;
 269         }
 270 }
 271
 272 static int
 273 dmar_alloc_irq(device_t dev, struct dmar_unit *unit, int idx)
 274 {
 275         device_t pcib;
 276         struct dmar_msi_data *dmd;
 277         uint64_t msi_addr;
 278         uint32_t msi_data;
 279         int error;
 280
 281         dmd = &unit->intrs[idx];
 282         pcib = device_get_parent(device_get_parent(dev)); /* Really not pcib */
 283         error = PCIB_ALLOC_MSIX(pcib, dev, &dmd->irq);
 284         if (error != 0) {
 285                 device_printf(dev, "cannot allocate %s interrupt, %d\n",
 286                     dmd->name, error);
 287                 goto err1;
 288         }
 289         error = bus_set_resource(dev, SYS_RES_IRQ, dmd->irq_rid,
 290             dmd->irq, 1);
 291         if (error != 0) {
 292                 device_printf(dev, "cannot set %s interrupt resource, %d\n",
 293                     dmd->name, error);
 294                 goto err2;
 295         }
 296         dmd->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 297             &dmd->irq_rid, RF_ACTIVE);
 298         if (dmd->irq_res == NULL) {
 299                 device_printf(dev,
 300                     "cannot allocate resource for %s interrupt\n", dmd->name);
 301                 error = ENXIO;
 302                 goto err3;
 303         }
 304         error = bus_setup_intr(dev, dmd->irq_res, INTR_TYPE_MISC,
 305             dmd->handler, NULL, unit, &dmd->intr_handle);
 306         if (error != 0) {
 307                 device_printf(dev, "cannot setup %s interrupt, %d\n",
 308                     dmd->name, error);
 309                 goto err4;
 310         }
 311         bus_describe_intr(dev, dmd->irq_res, dmd->intr_handle, "%s", dmd->name);
 312         error = PCIB_MAP_MSI(pcib, dev, dmd->irq, &msi_addr, &msi_data);
 313         if (error != 0) {
 314                 device_printf(dev, "cannot map %s interrupt, %d\n",
 315                     dmd->name, error);
 316                 goto err5;
 317         }
 318         dmar_write4(unit, dmd->msi_data_reg, msi_data);
 319         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
 320         /* Only for xAPIC mode */
 321         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
 322         return (0);
 323
 324 err5:
 325         bus_teardown_intr(dev, dmd->irq_res, dmd->intr_handle);
 326 err4:
 327         bus_release_resource(dev, SYS_RES_IRQ, dmd->irq_rid, dmd->irq_res);
 328 err3:
 329         bus_delete_resource(dev, SYS_RES_IRQ, dmd->irq_rid);
 330 err2:
 331         PCIB_RELEASE_MSIX(pcib, dev, dmd->irq);
 332         dmd->irq = -1;
 333 err1:
 334         return (error);
 335 }
 336
 337 #ifdef DEV_APIC
 338 static int
 339 dmar_remap_intr(device_t dev, device_t child, u_int irq)
 340 {
 341         struct dmar_unit *unit;
 342         struct dmar_msi_data *dmd;
 343         uint64_t msi_addr;
 344         uint32_t msi_data;
 345         int i, error;
 346
 347         unit = device_get_softc(dev);
 348         for (i = 0; i < DMAR_INTR_TOTAL; i++) {
 349                 dmd = &unit->intrs[i];
 350                 if (irq == dmd->irq) {
 351                         error = PCIB_MAP_MSI(device_get_parent(
 352                             device_get_parent(dev)),
 353                             dev, irq, &msi_addr, &msi_data);
 354                         if (error != 0)
 355                                 return (error);
 356                         DMAR_LOCK(unit);
 357                         (dmd->disable_intr)(unit);
 358                         dmar_write4(unit, dmd->msi_data_reg, msi_data);
 359                         dmar_write4(unit, dmd->msi_addr_reg, msi_addr);
 360                         dmar_write4(unit, dmd->msi_uaddr_reg, msi_addr >> 32);
 361                         (dmd->enable_intr)(unit);
 362                         DMAR_UNLOCK(unit);
 363                         return (0);
 364                 }
 365         }
 366         return (ENOENT);
 367 }
 368 #endif
 369
 370 static void
 371 dmar_print_caps(device_t dev, struct dmar_unit *unit,
 372     ACPI_DMAR_HARDWARE_UNIT *dmaru)
 373 {
 374         uint32_t caphi, ecaphi;
 375
 376         device_printf(dev, "regs@0x%08jx, ver=%d.%d, seg=%d, flags=<%b>\n",
 377             (uintmax_t)dmaru->Address, DMAR_MAJOR_VER(unit->hw_ver),
 378             DMAR_MINOR_VER(unit->hw_ver), dmaru->Segment,
 379             dmaru->Flags, "\020\001INCLUDE_ALL_PCI");
 380         caphi = unit->hw_cap >> 32;
 381         device_printf(dev, "cap=%b,", (u_int)unit->hw_cap,
 382             "\020\004AFL\005WBF\006PLMR\007PHMR\010CM\027ZLR\030ISOCH");
 383         printf("%b, ", caphi, "\020\010PSI\027DWD\030DRD\031FL1GP\034PSI");
 384         printf("ndoms=%d, sagaw=%d, mgaw=%d, fro=%d, nfr=%d, superp=%d",
 385             DMAR_CAP_ND(unit->hw_cap), DMAR_CAP_SAGAW(unit->hw_cap),
 386             DMAR_CAP_MGAW(unit->hw_cap), DMAR_CAP_FRO(unit->hw_cap),
 387             DMAR_CAP_NFR(unit->hw_cap), DMAR_CAP_SPS(unit->hw_cap));
 388         if ((unit->hw_cap & DMAR_CAP_PSI) != 0)
 389                 printf(", mamv=%d", DMAR_CAP_MAMV(unit->hw_cap));
 390         printf("\n");
 391         ecaphi = unit->hw_ecap >> 32;
 392         device_printf(dev, "ecap=%b,", (u_int)unit->hw_ecap,
 393             "\020\001C\002QI\003DI\004IR\005EIM\007PT\010SC\031ECS\032MTS"
 394             "\033NEST\034DIS\035PASID\036PRS\037ERS\040SRS");
 395         printf("%b, ", ecaphi, "\020\002NWFS\003EAFS");
 396         printf("mhmw=%d, iro=%d\n", DMAR_ECAP_MHMV(unit->hw_ecap),
 397             DMAR_ECAP_IRO(unit->hw_ecap));
 398 }
 399
 400 static int
 401 dmar_attach(device_t dev)
 402 {
 403         struct dmar_unit *unit;
 404         ACPI_DMAR_HARDWARE_UNIT *dmaru;
 405         int i, error;
 406
 407         unit = device_get_softc(dev);
 408         unit->dev = dev;
 409         unit->unit = device_get_unit(dev);
 410         dmaru = dmar_find_by_index(unit->unit);
 411         if (dmaru == NULL)
 412                 return (EINVAL);
 413         unit->segment = dmaru->Segment;
 414         unit->base = dmaru->Address;
 415         unit->reg_rid = DMAR_REG_RID;
 416         unit->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 417             &unit->reg_rid, RF_ACTIVE);
 418         if (unit->regs == NULL) {
 419                 device_printf(dev, "cannot allocate register window\n");
 420                 return (ENOMEM);
 421         }
 422         unit->hw_ver = dmar_read4(unit, DMAR_VER_REG);
 423         unit->hw_cap = dmar_read8(unit, DMAR_CAP_REG);
 424         unit->hw_ecap = dmar_read8(unit, DMAR_ECAP_REG);
 425         if (bootverbose)
 426                 dmar_print_caps(dev, unit, dmaru);
 427         dmar_quirks_post_ident(unit);
 428
 429         for (i = 0; i < DMAR_INTR_TOTAL; i++)
 430                 unit->intrs[i].irq = -1;
 431
 432         unit->intrs[DMAR_INTR_FAULT].name = "fault";
 433         unit->intrs[DMAR_INTR_FAULT].irq_rid = DMAR_FAULT_IRQ_RID;
 434         unit->intrs[DMAR_INTR_FAULT].handler = dmar_fault_intr;
 435         unit->intrs[DMAR_INTR_FAULT].msi_data_reg = DMAR_FEDATA_REG;
 436         unit->intrs[DMAR_INTR_FAULT].msi_addr_reg = DMAR_FEADDR_REG;
 437         unit->intrs[DMAR_INTR_FAULT].msi_uaddr_reg = DMAR_FEUADDR_REG;
 438         unit->intrs[DMAR_INTR_FAULT].enable_intr = dmar_enable_fault_intr;
 439         unit->intrs[DMAR_INTR_FAULT].disable_intr = dmar_disable_fault_intr;
 440         error = dmar_alloc_irq(dev, unit, DMAR_INTR_FAULT);
 441         if (error != 0) {
 442                 dmar_release_resources(dev, unit);
 443                 return (error);
 444         }
 445         if (DMAR_HAS_QI(unit)) {
 446                 unit->intrs[DMAR_INTR_QI].name = "qi";
 447                 unit->intrs[DMAR_INTR_QI].irq_rid = DMAR_QI_IRQ_RID;
 448                 unit->intrs[DMAR_INTR_QI].handler = dmar_qi_intr;
 449                 unit->intrs[DMAR_INTR_QI].msi_data_reg = DMAR_IEDATA_REG;
 450                 unit->intrs[DMAR_INTR_QI].msi_addr_reg = DMAR_IEADDR_REG;
 451                 unit->intrs[DMAR_INTR_QI].msi_uaddr_reg = DMAR_IEUADDR_REG;
 452                 unit->intrs[DMAR_INTR_QI].enable_intr = dmar_enable_qi_intr;
 453                 unit->intrs[DMAR_INTR_QI].disable_intr = dmar_disable_qi_intr;
 454                 error = dmar_alloc_irq(dev, unit, DMAR_INTR_QI);
 455                 if (error != 0) {
 456                         dmar_release_resources(dev, unit);
 457                         return (error);
 458                 }
 459         }
 460
 461         mtx_init(&unit->lock, "dmarhw", NULL, MTX_DEF);
 462         unit->domids = new_unrhdr(0, dmar_nd2mask(DMAR_CAP_ND(unit->hw_cap)),
 463             &unit->lock);
 464         LIST_INIT(&unit->domains);
 465
 466         /*
 467          * 9.2 "Context Entry":
 468          * When Caching Mode (CM) field is reported as Set, the
 469          * domain-id value of zero is architecturally reserved.
 470          * Software must not use domain-id value of zero
 471          * when CM is Set.
 472          */
 473         if ((unit->hw_cap & DMAR_CAP_CM) != 0)
 474                 alloc_unr_specific(unit->domids, 0);
 475
 476         unit->ctx_obj = vm_pager_allocate(OBJT_PHYS, NULL, IDX_TO_OFF(1 +
 477             DMAR_CTX_CNT), 0, 0, NULL);
 478
 479         /*
 480          * Allocate and load the root entry table pointer.  Enable the
 481          * address translation after the required invalidations are
 482          * done.
 483          */
 484         dmar_pgalloc(unit->ctx_obj, 0, DMAR_PGF_WAITOK | DMAR_PGF_ZERO);
 485         DMAR_LOCK(unit);
 486         error = dmar_load_root_entry_ptr(unit);
 487         if (error != 0) {
 488                 DMAR_UNLOCK(unit);
 489                 dmar_release_resources(dev, unit);
 490                 return (error);
 491         }
 492         error = dmar_inv_ctx_glob(unit);
 493         if (error != 0) {
 494                 DMAR_UNLOCK(unit);
 495                 dmar_release_resources(dev, unit);
 496                 return (error);
 497         }
 498         if ((unit->hw_ecap & DMAR_ECAP_DI) != 0) {
 499                 error = dmar_inv_iotlb_glob(unit);
 500                 if (error != 0) {
 501                         DMAR_UNLOCK(unit);
 502                         dmar_release_resources(dev, unit);
 503                         return (error);
 504                 }
 505         }
 506
 507         DMAR_UNLOCK(unit);
 508         error = dmar_init_fault_log(unit);
 509         if (error != 0) {
 510                 dmar_release_resources(dev, unit);
 511                 return (error);
 512         }
 513         error = dmar_init_qi(unit);
 514         if (error != 0) {
 515                 dmar_release_resources(dev, unit);
 516                 return (error);
 517         }
 518         error = dmar_init_irt(unit);
 519         if (error != 0) {
 520                 dmar_release_resources(dev, unit);
 521                 return (error);
 522         }
 523         error = dmar_init_busdma(unit);
 524         if (error != 0) {
 525                 dmar_release_resources(dev, unit);
 526                 return (error);
 527         }
 528
 529 #ifdef NOTYET
 530         DMAR_LOCK(unit);
 531         error = dmar_enable_translation(unit);
 532         if (error != 0) {
 533                 DMAR_UNLOCK(unit);
 534                 dmar_release_resources(dev, unit);
 535                 return (error);
 536         }
 537         DMAR_UNLOCK(unit);
 538 #endif
 539
 540         return (0);
 541 }
 542
 543 static int
 544 dmar_detach(device_t dev)
 545 {
 546
 547         return (EBUSY);
 548 }
 549
 550 static int
 551 dmar_suspend(device_t dev)
 552 {
 553
 554         return (0);
 555 }
 556
 557 static int
 558 dmar_resume(device_t dev)
 559 {
 560
 561         /* XXXKIB */
 562         return (0);
 563 }
 564
 565 static device_method_t dmar_methods[] = {
 566         DEVMETHOD(device_identify, dmar_identify),
 567         DEVMETHOD(device_probe, dmar_probe),
 568         DEVMETHOD(device_attach, dmar_attach),
 569         DEVMETHOD(device_detach, dmar_detach),
 570         DEVMETHOD(device_suspend, dmar_suspend),
 571         DEVMETHOD(device_resume, dmar_resume),
 572 #ifdef DEV_APIC
 573         DEVMETHOD(bus_remap_intr, dmar_remap_intr),
 574 #endif
 575         DEVMETHOD_END
 576 };
 577
 578 static driver_t dmar_driver = {
 579         "dmar",
 580         dmar_methods,
 581         sizeof(struct dmar_unit),
 582 };
 583
 584 DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
 585 MODULE_DEPEND(dmar, acpi, 1, 1, 1);
 586
 587 static void
 588 dmar_print_path(device_t dev, const char *banner, int busno, int depth,
 589     const ACPI_DMAR_PCI_PATH *path)
 590 {
 591         int i;
 592
 593         device_printf(dev, "%s [%d, ", banner, busno);
 594         for (i = 0; i < depth; i++) {
 595                 if (i != 0)
 596                         printf(", ");
 597                 printf("(%d, %d)", path[i].Device, path[i].Function);
 598         }
 599         printf("]\n");
 600 }
 601
 602 static int
 603 dmar_dev_depth(device_t child)
 604 {
 605         devclass_t pci_class;
 606         device_t bus, pcib;
 607         int depth;
 608
 609         pci_class = devclass_find("pci");
 610         for (depth = 1; ; depth++) {
 611                 bus = device_get_parent(child);
 612                 pcib = device_get_parent(bus);
 613                 if (device_get_devclass(device_get_parent(pcib)) !=
 614                     pci_class)
 615                         return (depth);
 616                 child = pcib;
 617         }
 618 }
 619
 620 static void
 621 dmar_dev_path(device_t child, int *busno, ACPI_DMAR_PCI_PATH *path, int depth)
 622 {
 623         devclass_t pci_class;
 624         device_t bus, pcib;
 625
 626         pci_class = devclass_find("pci");
 627         for (depth--; depth != -1; depth--) {
 628                 path[depth].Device = pci_get_slot(child);
 629                 path[depth].Function = pci_get_function(child);
 630                 bus = device_get_parent(child);
 631                 pcib = device_get_parent(bus);
 632                 if (device_get_devclass(device_get_parent(pcib)) !=
 633                     pci_class) {
 634                         /* reached a host bridge */
 635                         *busno = pcib_get_bus(bus);
 636                         return;
 637                 }
 638                 child = pcib;
 639         }
 640         panic("wrong depth");
 641 }
 642
 643 static int
 644 dmar_match_pathes(int busno1, const ACPI_DMAR_PCI_PATH *path1, int depth1,
 645     int busno2, const ACPI_DMAR_PCI_PATH *path2, int depth2,
 646     enum AcpiDmarScopeType scope_type)
 647 {
 648         int i, depth;
 649
 650         if (busno1 != busno2)
 651                 return (0);
 652         if (scope_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT && depth1 != depth2)
 653                 return (0);
 654         depth = depth1;
 655         if (depth2 < depth)
 656                 depth = depth2;
 657         for (i = 0; i < depth; i++) {
 658                 if (path1[i].Device != path2[i].Device ||
 659                     path1[i].Function != path2[i].Function)
 660                         return (0);
 661         }
 662         return (1);
 663 }
 664
 665 static int
 666 dmar_match_devscope(ACPI_DMAR_DEVICE_SCOPE *devscope, device_t dev,
 667     int dev_busno, const ACPI_DMAR_PCI_PATH *dev_path, int dev_path_len)
 668 {
 669         ACPI_DMAR_PCI_PATH *path;
 670         int path_len;
 671
 672         if (devscope->Length < sizeof(*devscope)) {
 673                 printf("dmar_find: corrupted DMAR table, dl %d\n",
 674                     devscope->Length);
 675                 return (-1);
 676         }
 677         if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT &&
 678             devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_BRIDGE)
 679                 return (0);
 680         path_len = devscope->Length - sizeof(*devscope);
 681         if (path_len % 2 != 0) {
 682                 printf("dmar_find_bsf: corrupted DMAR table, dl %d\n",
 683                     devscope->Length);
 684                 return (-1);
 685         }
 686         path_len /= 2;
 687         path = (ACPI_DMAR_PCI_PATH *)(devscope + 1);
 688         if (path_len == 0) {
 689                 printf("dmar_find: corrupted DMAR table, dl %d\n",
 690                     devscope->Length);
 691                 return (-1);
 692         }
 693         if (dmar_match_verbose)
 694                 dmar_print_path(dev, "DMAR", devscope->Bus, path_len, path);
 695
 696         return (dmar_match_pathes(devscope->Bus, path, path_len, dev_busno,
 697             dev_path, dev_path_len, devscope->EntryType));
 698 }
 699
 700 struct dmar_unit *
 701 dmar_find(device_t dev)
 702 {
 703         device_t dmar_dev;
 704         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 705         ACPI_DMAR_DEVICE_SCOPE *devscope;
 706         char *ptr, *ptrend;
 707         int i, match, dev_domain, dev_busno, dev_path_len;
 708
 709         dmar_dev = NULL;
 710         dev_domain = pci_get_domain(dev);
 711         dev_path_len = dmar_dev_depth(dev);
 712         ACPI_DMAR_PCI_PATH dev_path[dev_path_len];
 713         dmar_dev_path(dev, &dev_busno, dev_path, dev_path_len);
 714         if (dmar_match_verbose)
 715                 dmar_print_path(dev, "PCI", dev_busno, dev_path_len, dev_path);
 716
 717         for (i = 0; i < dmar_devcnt; i++) {
 718                 if (dmar_devs[i] == NULL)
 719                         continue;
 720                 dmarh = dmar_find_by_index(i);
 721                 if (dmarh == NULL)
 722                         continue;
 723                 if (dmarh->Segment != dev_domain)
 724                         continue;
 725                 if ((dmarh->Flags & ACPI_DMAR_INCLUDE_ALL) != 0) {
 726                         dmar_dev = dmar_devs[i];
 727                         if (dmar_match_verbose) {
 728                                 device_printf(dev,
 729                                     "pci%d:%d:%d:%d matched dmar%d INCLUDE_ALL\n",
 730                                     dev_domain, pci_get_bus(dev),
 731                                     pci_get_slot(dev),
 732                                     pci_get_function(dev),
 733                                     ((struct dmar_unit *)device_get_softc(
 734                                     dmar_dev))->unit);
 735                         }
 736                         goto found;
 737                 }
 738                 ptr = (char *)dmarh + sizeof(*dmarh);
 739                 ptrend = (char *)dmarh + dmarh->Header.Length;
 740                 for (;;) {
 741                         if (ptr >= ptrend)
 742                                 break;
 743                         devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 744                         ptr += devscope->Length;
 745                         if (dmar_match_verbose) {
 746                                 device_printf(dev,
 747                                     "pci%d:%d:%d:%d matching dmar%d\n",
 748                                     dev_domain, pci_get_bus(dev),
 749                                     pci_get_slot(dev),
 750                                     pci_get_function(dev),
 751                                     ((struct dmar_unit *)device_get_softc(
 752                                     dmar_devs[i]))->unit);
 753                         }
 754                         match = dmar_match_devscope(devscope, dev, dev_busno,
 755                             dev_path, dev_path_len);
 756                         if (dmar_match_verbose) {
 757                                 if (match == -1)
 758                                         printf("table error\n");
 759                                 else if (match == 0)
 760                                         printf("not matched\n");
 761                                 else
 762                                         printf("matched\n");
 763                         }
 764                         if (match == -1)
 765                                 return (NULL);
 766                         else if (match == 1) {
 767                                 dmar_dev = dmar_devs[i];
 768                                 goto found;
 769                         }
 770                 }
 771         }
 772         return (NULL);
 773 found:
 774         return (device_get_softc(dmar_dev));
 775 }
 776
 777 static struct dmar_unit *
 778 dmar_find_nonpci(u_int id, u_int entry_type, uint16_t *rid)
 779 {
 780         device_t dmar_dev;
 781         struct dmar_unit *unit;
 782         ACPI_DMAR_HARDWARE_UNIT *dmarh;
 783         ACPI_DMAR_DEVICE_SCOPE *devscope;
 784         ACPI_DMAR_PCI_PATH *path;
 785         char *ptr, *ptrend;
 786         int i;
 787
 788         for (i = 0; i < dmar_devcnt; i++) {
 789                 dmar_dev = dmar_devs[i];
 790                 if (dmar_dev == NULL)
 791                         continue;
 792                 unit = (struct dmar_unit *)device_get_softc(dmar_dev);
 793                 dmarh = dmar_find_by_index(i);
 794                 if (dmarh == NULL)
 795                         continue;
 796                 ptr = (char *)dmarh + sizeof(*dmarh);
 797                 ptrend = (char *)dmarh + dmarh->Header.Length;
 798                 for (;;) {
 799                         if (ptr >= ptrend)
 800                                 break;
 801                         devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 802                         ptr += devscope->Length;
 803                         if (devscope->EntryType != entry_type)
 804                                 continue;
 805                         if (devscope->EnumerationId != id)
 806                                 continue;
 807                         if (devscope->Length - sizeof(ACPI_DMAR_DEVICE_SCOPE)
 808                             == 2) {
 809                                 if (rid != NULL) {
 810                                         path = (ACPI_DMAR_PCI_PATH *)
 811                                             (devscope + 1);
 812                                         *rid = PCI_RID(devscope->Bus,
 813                                             path->Device, path->Function);
 814                                 }
 815                                 return (unit);
 816                         } else {
 817                                 /* XXXKIB */
 818                                 printf(
 819                        "dmar_find_nonpci: id %d type %d path length != 2\n",
 820                                     id, entry_type);
 821                         }
 822                 }
 823         }
 824         return (NULL);
 825 }
 826
 827
 828 struct dmar_unit *
 829 dmar_find_hpet(device_t dev, uint16_t *rid)
 830 {
 831
 832         return (dmar_find_nonpci(hpet_get_uid(dev), ACPI_DMAR_SCOPE_TYPE_HPET,
 833             rid));
 834 }
 835
 836 struct dmar_unit *
 837 dmar_find_ioapic(u_int apic_id, uint16_t *rid)
 838 {
 839
 840         return (dmar_find_nonpci(apic_id, ACPI_DMAR_SCOPE_TYPE_IOAPIC, rid));
 841 }
 842
 843 struct rmrr_iter_args {
 844         struct dmar_domain *domain;
 845         device_t dev;
 846         int dev_domain;
 847         int dev_busno;
 848         ACPI_DMAR_PCI_PATH *dev_path;
 849         int dev_path_len;
 850         struct dmar_map_entries_tailq *rmrr_entries;
 851 };
 852
 853 static int
 854 dmar_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 855 {
 856         struct rmrr_iter_args *ria;
 857         ACPI_DMAR_RESERVED_MEMORY *resmem;
 858         ACPI_DMAR_DEVICE_SCOPE *devscope;
 859         struct dmar_map_entry *entry;
 860         char *ptr, *ptrend;
 861         int match;
 862
 863         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
 864                 return (1);
 865
 866         ria = arg;
 867         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
 868         if (dmar_match_verbose) {
 869                 printf("RMRR [%jx,%jx] segment %d\n",
 870                     (uintmax_t)resmem->BaseAddress,
 871                     (uintmax_t)resmem->EndAddress,
 872                     resmem->Segment);
 873         }
 874         if (resmem->Segment != ria->dev_domain)
 875                 return (1);
 876
 877         ptr = (char *)resmem + sizeof(*resmem);
 878         ptrend = (char *)resmem + resmem->Header.Length;
 879         for (;;) {
 880                 if (ptr >= ptrend)
 881                         break;
 882                 devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr;
 883                 ptr += devscope->Length;
 884                 match = dmar_match_devscope(devscope, ria->dev, ria->dev_busno,
 885                     ria->dev_path, ria->dev_path_len);
 886                 if (match == 1) {
 887                         if (dmar_match_verbose)
 888                                 printf("matched\n");
 889                         entry = dmar_gas_alloc_entry(ria->domain,
 890                             DMAR_PGF_WAITOK);
 891                         entry->start = resmem->BaseAddress;
 892                         /* The RMRR entry end address is inclusive. */
 893                         entry->end = resmem->EndAddress;
 894                         TAILQ_INSERT_TAIL(ria->rmrr_entries, entry,
 895                             unroll_link);
 896                 } else if (dmar_match_verbose) {
 897                         printf("not matched, err %d\n", match);
 898                 }
 899         }
 900
 901         return (1);
 902 }
 903
 904 void
 905 dmar_dev_parse_rmrr(struct dmar_domain *domain, device_t dev,
 906     struct dmar_map_entries_tailq *rmrr_entries)
 907 {
 908         struct rmrr_iter_args ria;
 909
 910         ria.dev_domain = pci_get_domain(dev);
 911         ria.dev_path_len = dmar_dev_depth(dev);
 912         ACPI_DMAR_PCI_PATH dev_path[ria.dev_path_len];
 913         dmar_dev_path(dev, &ria.dev_busno, dev_path, ria.dev_path_len);
 914
 915         if (dmar_match_verbose) {
 916                 device_printf(dev, "parsing RMRR entries for ");
 917                 dmar_print_path(dev, "PCI", ria.dev_busno, ria.dev_path_len,
 918                     dev_path);
 919         }
 920
 921         ria.domain = domain;
 922         ria.dev = dev;
 923         ria.dev_path = dev_path;
 924         ria.rmrr_entries = rmrr_entries;
 925         dmar_iterate_tbl(dmar_rmrr_iter, &ria);
 926 }
 927
 928 struct inst_rmrr_iter_args {
 929         struct dmar_unit *dmar;
 930 };
 931
 932 static device_t
 933 dmar_path_dev(int segment, int path_len, int busno,
 934     const ACPI_DMAR_PCI_PATH *path)
 935 {
 936         devclass_t pci_class;
 937         device_t bus, pcib, dev;
 938         int i;
 939
 940         pci_class = devclass_find("pci");
 941         dev = NULL;
 942         for (i = 0; i < path_len; i++, path++) {
 943                 dev = pci_find_dbsf(segment, busno, path->Device,
 944                     path->Function);
 945                 if (dev == NULL)
 946                         break;
 947                 if (i != path_len - 1) {
 948                         bus = device_get_parent(dev);
 949                         pcib = device_get_parent(bus);
 950                         if (device_get_devclass(device_get_parent(pcib)) !=
 951                             pci_class)
 952                                 return (NULL);
 953                 }
 954                 busno = pcib_get_bus(dev);
 955         }
 956         return (dev);
 957 }
 958
 959 static int
 960 dmar_inst_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
 961 {
 962         const ACPI_DMAR_RESERVED_MEMORY *resmem;
 963         const ACPI_DMAR_DEVICE_SCOPE *devscope;
 964         struct inst_rmrr_iter_args *iria;
 965         const char *ptr, *ptrend;
 966         struct dmar_unit *dev_dmar;
 967         device_t dev;
 968
 969         if (dmarh->Type != ACPI_DMAR_TYPE_RESERVED_MEMORY)
 970                 return (1);
 971
 972         iria = arg;
 973         resmem = (ACPI_DMAR_RESERVED_MEMORY *)dmarh;
 974         if (resmem->Segment != iria->dmar->segment)
 975                 return (1);
 976         if (dmar_match_verbose) {
 977                 printf("dmar%d: RMRR [%jx,%jx]\n", iria->dmar->unit,
 978                     (uintmax_t)resmem->BaseAddress,
 979                     (uintmax_t)resmem->EndAddress);
 980         }
 981
 982         ptr = (const char *)resmem + sizeof(*resmem);
 983         ptrend = (const char *)resmem + resmem->Header.Length;
 984         for (;;) {
 985                 if (ptr >= ptrend)
 986                         break;
 987                 devscope = (const ACPI_DMAR_DEVICE_SCOPE *)ptr;
 988                 ptr += devscope->Length;
 989                 /* XXXKIB bridge */
 990                 if (devscope->EntryType != ACPI_DMAR_SCOPE_TYPE_ENDPOINT)
 991                         continue;
 992                 if (dmar_match_verbose) {
 993                         dmar_print_path(iria->dmar->dev, "RMRR scope",
 994                             devscope->Bus, (devscope->Length -
 995                             sizeof(ACPI_DMAR_DEVICE_SCOPE)) / 2,
 996                             (const ACPI_DMAR_PCI_PATH *)(devscope + 1));
 997                 }
 998                 dev = dmar_path_dev(resmem->Segment, (devscope->Length -
 999                     sizeof(ACPI_DMAR_DEVICE_SCOPE)) / 2, devscope->Bus,
1000                     (const ACPI_DMAR_PCI_PATH *)(devscope + 1));
1001                 if (dev == NULL) {
1002                         if (dmar_match_verbose)
1003                                 printf("null dev\n");
1004                         continue;
1005                 }
1006                 dev_dmar = dmar_find(dev);
1007                 if (dev_dmar != iria->dmar) {
1008                         if (dmar_match_verbose) {
1009                                 printf("dmar%d matched, skipping\n",
1010                                     dev_dmar->unit);
1011                         }
1012                         continue;
1013                 }
1014                 if (dmar_match_verbose)
1015                         printf("matched, instantiating RMRR context\n");
1016                 dmar_instantiate_ctx(iria->dmar, dev, true);
1017         }
1018
1019         return (1);
1020
1021 }
1022
1023 /*
1024  * Pre-create all contexts for the DMAR which have RMRR entries.
1025  */
1026 int
1027 dmar_instantiate_rmrr_ctxs(struct dmar_unit *dmar)
1028 {
1029         struct inst_rmrr_iter_args iria;
1030         int error;
1031
1032         if (!dmar_barrier_enter(dmar, DMAR_BARRIER_RMRR))
1033                 return (0);
1034
1035         error = 0;
1036         iria.dmar = dmar;
1037         if (dmar_match_verbose)
1038                 printf("dmar%d: instantiating RMRR contexts\n", dmar->unit);
1039         dmar_iterate_tbl(dmar_inst_rmrr_iter, &iria);
1040         DMAR_LOCK(dmar);
1041         if (!LIST_EMPTY(&dmar->domains)) {
1042                 KASSERT((dmar->hw_gcmd & DMAR_GCMD_TE) == 0,
1043             ("dmar%d: RMRR not handled but translation is already enabled",
1044                     dmar->unit));
1045                 error = dmar_enable_translation(dmar);
1046         }
1047         dmar_barrier_exit(dmar, DMAR_BARRIER_RMRR);
1048         return (error);
1049 }
1050
1051 #ifdef DDB
1052 #include <ddb/ddb.h>
1053 #include <ddb/db_lex.h>
1054
1055 static void
1056 dmar_print_domain_entry(const struct dmar_map_entry *entry)
1057 {
1058         struct dmar_map_entry *l, *r;
1059
1060         db_printf(
1061             "    start %jx end %jx free_after %jx free_down %jx flags %x ",
1062             entry->start, entry->end, entry->free_after, entry->free_down,
1063             entry->flags);
1064         db_printf("left ");
1065         l = RB_LEFT(entry, rb_entry);
1066         if (l == NULL)
1067                 db_printf("NULL ");
1068         else
1069                 db_printf("%jx ", l->start);
1070         db_printf("right ");
1071         r = RB_RIGHT(entry, rb_entry);
1072         if (r == NULL)
1073                 db_printf("NULL");
1074         else
1075                 db_printf("%jx", r->start);
1076         db_printf("\n");
1077 }
1078
1079 static void
1080 dmar_print_ctx(struct dmar_ctx *ctx)
1081 {
1082
1083         db_printf(
1084             "    @%p pci%d:%d:%d refs %d flags %x loads %lu unloads %lu\n",
1085             ctx, pci_get_bus(ctx->ctx_tag.owner),
1086             pci_get_slot(ctx->ctx_tag.owner),
1087             pci_get_function(ctx->ctx_tag.owner), ctx->refs, ctx->flags,
1088             ctx->loads, ctx->unloads);
1089 }
1090
1091 static void
1092 dmar_print_domain(struct dmar_domain *domain, bool show_mappings)
1093 {
1094         struct dmar_map_entry *entry;
1095         struct dmar_ctx *ctx;
1096
1097         db_printf(
1098             "  @%p dom %d mgaw %d agaw %d pglvl %d end %jx refs %d\n"
1099             "   ctx_cnt %d flags %x pgobj %p map_ents %u\n",
1100             domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl,
1101             (uintmax_t)domain->end, domain->refs, domain->ctx_cnt,
1102             domain->flags, domain->pgtbl_obj, domain->entries_cnt);
1103         if (!LIST_EMPTY(&domain->contexts)) {
1104                 db_printf("  Contexts:\n");
1105                 LIST_FOREACH(ctx, &domain->contexts, link)
1106                         dmar_print_ctx(ctx);
1107         }
1108         if (!show_mappings)
1109                 return;
1110         db_printf("    mapped:\n");
1111         RB_FOREACH(entry, dmar_gas_entries_tree, &domain->rb_root) {
1112                 dmar_print_domain_entry(entry);
1113                 if (db_pager_quit)
1114                         break;
1115         }
1116         if (db_pager_quit)
1117                 return;
1118         db_printf("    unloading:\n");
1119         TAILQ_FOREACH(entry, &domain->unload_entries, dmamap_link) {
1120                 dmar_print_domain_entry(entry);
1121                 if (db_pager_quit)
1122                         break;
1123         }
1124 }
1125
1126 DB_FUNC(dmar_domain, db_dmar_print_domain, db_show_table, CS_OWN, NULL)
1127 {
1128         struct dmar_unit *unit;
1129         struct dmar_domain *domain;
1130         struct dmar_ctx *ctx;
1131         bool show_mappings, valid;
1132         int pci_domain, bus, device, function, i, t;
1133         db_expr_t radix;
1134
1135         valid = false;
1136         radix = db_radix;
1137         db_radix = 10;
1138         t = db_read_token();
1139         if (t == tSLASH) {
1140                 t = db_read_token();
1141                 if (t != tIDENT) {
1142                         db_printf("Bad modifier\n");
1143                         db_radix = radix;
1144                         db_skip_to_eol();
1145                         return;
1146                 }
1147                 show_mappings = strchr(db_tok_string, 'm') != NULL;
1148                 t = db_read_token();
1149         } else {
1150                 show_mappings = false;
1151         }
1152         if (t == tNUMBER) {
1153                 pci_domain = db_tok_number;
1154                 t = db_read_token();
1155                 if (t == tNUMBER) {
1156                         bus = db_tok_number;
1157                         t = db_read_token();
1158                         if (t == tNUMBER) {
1159                                 device = db_tok_number;
1160                                 t = db_read_token();
1161                                 if (t == tNUMBER) {
1162                                         function = db_tok_number;
1163                                         valid = true;
1164                                 }
1165                         }
1166                 }
1167         }
1168                         db_radix = radix;
1169         db_skip_to_eol();
1170         if (!valid) {
1171                 db_printf("usage: show dmar_domain [/m] "
1172                     "<domain> <bus> <device> <func>\n");
1173                 return;
1174         }
1175         for (i = 0; i < dmar_devcnt; i++) {
1176                 unit = device_get_softc(dmar_devs[i]);
1177                 LIST_FOREACH(domain, &unit->domains, link) {
1178                         LIST_FOREACH(ctx, &domain->contexts, link) {
1179                                 if (pci_domain == unit->segment &&
1180                                     bus == pci_get_bus(ctx->ctx_tag.owner) &&
1181                                     device ==
1182                                     pci_get_slot(ctx->ctx_tag.owner) &&
1183                                     function ==
1184                                     pci_get_function(ctx->ctx_tag.owner)) {
1185                                         dmar_print_domain(domain,
1186                                             show_mappings);
1187                                         goto out;
1188                                 }
1189                         }
1190                 }
1191         }
1192 out:;
1193 }
1194
1195 static void
1196 dmar_print_one(int idx, bool show_domains, bool show_mappings)
1197 {
1198         struct dmar_unit *unit;
1199         struct dmar_domain *domain;
1200         int i, frir;
1201
1202         unit = device_get_softc(dmar_devs[idx]);
1203         db_printf("dmar%d at %p, root at 0x%jx, ver 0x%x\n", unit->unit, unit,
1204             dmar_read8(unit, DMAR_RTADDR_REG), dmar_read4(unit, DMAR_VER_REG));
1205         db_printf("cap 0x%jx ecap 0x%jx gsts 0x%x fsts 0x%x fectl 0x%x\n",
1206             (uintmax_t)dmar_read8(unit, DMAR_CAP_REG),
1207             (uintmax_t)dmar_read8(unit, DMAR_ECAP_REG),
1208             dmar_read4(unit, DMAR_GSTS_REG),
1209             dmar_read4(unit, DMAR_FSTS_REG),
1210             dmar_read4(unit, DMAR_FECTL_REG));
1211         if (unit->ir_enabled) {
1212                 db_printf("ir is enabled; IRT @%p phys 0x%jx maxcnt %d\n",
1213                     unit->irt, (uintmax_t)unit->irt_phys, unit->irte_cnt);
1214         }
1215         db_printf("fed 0x%x fea 0x%x feua 0x%x\n",
1216             dmar_read4(unit, DMAR_FEDATA_REG),
1217             dmar_read4(unit, DMAR_FEADDR_REG),
1218             dmar_read4(unit, DMAR_FEUADDR_REG));
1219         db_printf("primary fault log:\n");
1220         for (i = 0; i < DMAR_CAP_NFR(unit->hw_cap); i++) {
1221                 frir = (DMAR_CAP_FRO(unit->hw_cap) + i) * 16;
1222                 db_printf("  %d at 0x%x: %jx %jx\n", i, frir,
1223                     (uintmax_t)dmar_read8(unit, frir),
1224                     (uintmax_t)dmar_read8(unit, frir + 8));
1225         }
1226         if (DMAR_HAS_QI(unit)) {
1227                 db_printf("ied 0x%x iea 0x%x ieua 0x%x\n",
1228                     dmar_read4(unit, DMAR_IEDATA_REG),
1229                     dmar_read4(unit, DMAR_IEADDR_REG),
1230                     dmar_read4(unit, DMAR_IEUADDR_REG));
1231                 if (unit->qi_enabled) {
1232                         db_printf("qi is enabled: queue @0x%jx (IQA 0x%jx) "
1233                             "size 0x%jx\n"
1234                     "  head 0x%x tail 0x%x avail 0x%x status 0x%x ctrl 0x%x\n"
1235                     "  hw compl 0x%x@%p/phys@%jx next seq 0x%x gen 0x%x\n",
1236                             (uintmax_t)unit->inv_queue,
1237                             (uintmax_t)dmar_read8(unit, DMAR_IQA_REG),
1238                             (uintmax_t)unit->inv_queue_size,
1239                             dmar_read4(unit, DMAR_IQH_REG),
1240                             dmar_read4(unit, DMAR_IQT_REG),
1241                             unit->inv_queue_avail,
1242                             dmar_read4(unit, DMAR_ICS_REG),
1243                             dmar_read4(unit, DMAR_IECTL_REG),
1244                             unit->inv_waitd_seq_hw,
1245                             &unit->inv_waitd_seq_hw,
1246                             (uintmax_t)unit->inv_waitd_seq_hw_phys,
1247                             unit->inv_waitd_seq,
1248                             unit->inv_waitd_gen);
1249                 } else {
1250                         db_printf("qi is disabled\n");
1251                 }
1252         }
1253         if (show_domains) {
1254                 db_printf("domains:\n");
1255                 LIST_FOREACH(domain, &unit->domains, link) {
1256                         dmar_print_domain(domain, show_mappings);
1257                         if (db_pager_quit)
1258                                 break;
1259                 }
1260         }
1261 }
1262
1263 DB_SHOW_COMMAND(dmar, db_dmar_print)
1264 {
1265         bool show_domains, show_mappings;
1266
1267         show_domains = strchr(modif, 'd') != NULL;
1268         show_mappings = strchr(modif, 'm') != NULL;
1269         if (!have_addr) {
1270                 db_printf("usage: show dmar [/d] [/m] index\n");
1271                 return;
1272         }
1273         dmar_print_one((int)addr, show_domains, show_mappings);
1274 }
1275
1276 DB_SHOW_ALL_COMMAND(dmars, db_show_all_dmars)
1277 {
1278         int i;
1279         bool show_domains, show_mappings;
1280
1281         show_domains = strchr(modif, 'd') != NULL;
1282         show_mappings = strchr(modif, 'm') != NULL;
1283
1284         for (i = 0; i < dmar_devcnt; i++) {
1285                 dmar_print_one(i, show_domains, show_mappings);
1286                 if (db_pager_quit)
1287                         break;
1288         }
1289 }
1290 #endif