2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Machine dependent interrupt code for x86. For x86, we have to
31 * deal with different PICs. Thus, we use the passed in vector to lookup
32 * an interrupt source associated with that vector. The interrupt source
33 * describes which PIC the source belongs to and includes methods to handle
37 #include "opt_atpic.h"
40 #include <sys/param.h>
42 #include <sys/interrupt.h>
44 #include <sys/kernel.h>
46 #include <sys/mutex.h>
50 #include <sys/syslog.h>
51 #include <sys/systm.h>
52 #include <sys/vmmeter.h>
53 #include <machine/clock.h>
54 #include <machine/intr_machdep.h>
55 #include <machine/smp.h>
61 #include <machine/segments.h>
62 #include <machine/frame.h>
63 #include <dev/ic/i8259.h>
64 #include <x86/isa/icu.h>
65 #include <isa/isareg.h>
68 #define MAX_STRAY_LOG 5
70 typedef void (*mask_fn)(void *);
72 static int intrcnt_index;
73 static struct intsrc *interrupt_sources[NUM_IO_INTS];
74 static struct sx intrsrc_lock;
75 static struct mtx intrpic_lock;
76 static struct mtx intrcnt_lock;
77 static TAILQ_HEAD(pics_head, pic) pics;
79 #if defined(SMP) && !defined(EARLY_AP_STARTUP)
80 static int assign_cpu;
83 u_long intrcnt[INTRCNT_COUNT];
84 char intrnames[INTRCNT_COUNT * (MAXCOMLEN + 1)];
85 size_t sintrcnt = sizeof(intrcnt);
86 size_t sintrnames = sizeof(intrnames);
88 static int intr_assign_cpu(void *arg, int cpu);
89 static void intr_disable_src(void *arg);
90 static void intr_init(void *__dummy);
91 static int intr_pic_registered(struct pic *pic);
92 static void intrcnt_setname(const char *name, int index);
93 static void intrcnt_updatename(struct intsrc *is);
94 static void intrcnt_register(struct intsrc *is);
97 intr_pic_registered(struct pic *pic)
101 TAILQ_FOREACH(p, &pics, pics) {
109 * Register a new interrupt controller (PIC). This is to support suspend
110 * and resume where we suspend/resume controllers rather than individual
111 * sources. This also allows controllers with no active sources (such as
112 * 8259As in a system using the APICs) to participate in suspend and resume.
115 intr_register_pic(struct pic *pic)
119 mtx_lock(&intrpic_lock);
120 if (intr_pic_registered(pic))
123 TAILQ_INSERT_TAIL(&pics, pic, pics);
126 mtx_unlock(&intrpic_lock);
131 * Register a new interrupt source with the global interrupt system.
132 * The global interrupts need to be disabled when this function is
136 intr_register_source(struct intsrc *isrc)
140 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
141 vector = isrc->is_pic->pic_vector(isrc);
142 if (interrupt_sources[vector] != NULL)
144 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
145 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
146 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
150 sx_xlock(&intrsrc_lock);
151 if (interrupt_sources[vector] != NULL) {
152 sx_xunlock(&intrsrc_lock);
153 intr_event_destroy(isrc->is_event);
156 intrcnt_register(isrc);
157 interrupt_sources[vector] = isrc;
158 isrc->is_handlers = 0;
159 sx_xunlock(&intrsrc_lock);
164 intr_lookup_source(int vector)
167 return (interrupt_sources[vector]);
171 intr_add_handler(const char *name, int vector, driver_filter_t filter,
172 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
177 isrc = intr_lookup_source(vector);
180 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
181 arg, intr_priority(flags), flags, cookiep);
183 sx_xlock(&intrsrc_lock);
184 intrcnt_updatename(isrc);
186 if (isrc->is_handlers == 1) {
187 isrc->is_pic->pic_enable_intr(isrc);
188 isrc->is_pic->pic_enable_source(isrc);
190 sx_xunlock(&intrsrc_lock);
196 intr_remove_handler(void *cookie)
201 isrc = intr_handler_source(cookie);
202 error = intr_event_remove_handler(cookie);
204 sx_xlock(&intrsrc_lock);
206 if (isrc->is_handlers == 0) {
207 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
208 isrc->is_pic->pic_disable_intr(isrc);
210 intrcnt_updatename(isrc);
211 sx_xunlock(&intrsrc_lock);
217 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
221 isrc = intr_lookup_source(vector);
224 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
228 intr_disable_src(void *arg)
233 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
237 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
239 struct intr_event *ie;
243 * We count software interrupts when we process them. The
244 * code here follows previous practice, but there's an
245 * argument for counting hardware interrupts when they're
254 * XXX: We assume that IRQ 0 is only used for the ISA timer
257 vector = isrc->is_pic->pic_vector(isrc);
262 * For stray interrupts, mask and EOI the source, bump the
263 * stray count, and log the condition.
265 if (intr_event_handle(ie, frame) != 0) {
266 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
267 (*isrc->is_straycount)++;
268 if (*isrc->is_straycount < MAX_STRAY_LOG)
269 log(LOG_ERR, "stray irq%d\n", vector);
270 else if (*isrc->is_straycount == MAX_STRAY_LOG)
272 "too many stray irq %d's: not logging anymore\n",
278 intr_resume(bool suspend_cancelled)
285 mtx_lock(&intrpic_lock);
286 TAILQ_FOREACH(pic, &pics, pics) {
287 if (pic->pic_resume != NULL)
288 pic->pic_resume(pic, suspend_cancelled);
290 mtx_unlock(&intrpic_lock);
298 mtx_lock(&intrpic_lock);
299 TAILQ_FOREACH_REVERSE(pic, &pics, pics_head, pics) {
300 if (pic->pic_suspend != NULL)
301 pic->pic_suspend(pic);
303 mtx_unlock(&intrpic_lock);
307 intr_assign_cpu(void *arg, int cpu)
313 #ifdef EARLY_AP_STARTUP
314 MPASS(mp_ncpus == 1 || smp_started);
316 /* Nothing to do if there is only a single CPU. */
317 if (mp_ncpus > 1 && cpu != NOCPU) {
320 * Don't do anything during early boot. We will pick up the
321 * assignment once the APs are started.
323 if (assign_cpu && cpu != NOCPU) {
326 sx_xlock(&intrsrc_lock);
327 error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
328 sx_xunlock(&intrsrc_lock);
338 intrcnt_setname(const char *name, int index)
341 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
346 intrcnt_updatename(struct intsrc *is)
349 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
353 intrcnt_register(struct intsrc *is)
355 char straystr[MAXCOMLEN + 1];
357 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
358 mtx_lock_spin(&intrcnt_lock);
359 is->is_index = intrcnt_index;
361 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
362 is->is_pic->pic_vector(is));
363 intrcnt_updatename(is);
364 is->is_count = &intrcnt[is->is_index];
365 intrcnt_setname(straystr, is->is_index + 1);
366 is->is_straycount = &intrcnt[is->is_index + 1];
367 mtx_unlock_spin(&intrcnt_lock);
371 intrcnt_add(const char *name, u_long **countp)
374 mtx_lock_spin(&intrcnt_lock);
375 *countp = &intrcnt[intrcnt_index];
376 intrcnt_setname(name, intrcnt_index);
378 mtx_unlock_spin(&intrcnt_lock);
382 intr_init(void *dummy __unused)
385 intrcnt_setname("???", 0);
388 mtx_init(&intrpic_lock, "intrpic", NULL, MTX_DEF);
389 sx_init(&intrsrc_lock, "intrsrc");
390 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
392 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
395 intr_init_final(void *dummy __unused)
399 * Enable interrupts on the BSP after all of the interrupt
400 * controllers are initialized. Device interrupts are still
401 * disabled in the interrupt controllers until interrupt
402 * handlers are registered. Interrupts are enabled on each AP
403 * after their first context switch.
407 SYSINIT(intr_init_final, SI_SUB_INTR, SI_ORDER_ANY, intr_init_final, NULL);
410 /* Initialize the two 8259A's to a known-good shutdown state. */
415 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
416 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
417 outb(IO_ICU1 + ICU_IMR_OFFSET, IRQ_MASK(ICU_SLAVEID));
418 outb(IO_ICU1 + ICU_IMR_OFFSET, MASTER_MODE);
419 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
420 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
422 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
423 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
424 outb(IO_ICU2 + ICU_IMR_OFFSET, ICU_SLAVEID);
425 outb(IO_ICU2 + ICU_IMR_OFFSET, SLAVE_MODE);
426 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
427 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
431 /* Add a description to an active interrupt handler. */
433 intr_describe(u_int vector, void *ih, const char *descr)
438 isrc = intr_lookup_source(vector);
441 error = intr_event_describe_handler(isrc->is_event, ih, descr);
444 intrcnt_updatename(isrc);
454 sx_xlock(&intrsrc_lock);
455 for (v = 0; v < NUM_IO_INTS; v++) {
456 is = interrupt_sources[v];
459 if (is->is_pic->pic_reprogram_pin != NULL)
460 is->is_pic->pic_reprogram_pin(is);
462 sx_xunlock(&intrsrc_lock);
467 * Dump data about interrupt handlers
469 DB_SHOW_COMMAND(irqs, db_show_irqs)
471 struct intsrc **isrc;
474 if (strcmp(modif, "v") == 0)
478 isrc = interrupt_sources;
479 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
481 db_dump_intr_event((*isrc)->is_event, verbose);
487 * Support for balancing interrupt sources across CPUs. For now we just
488 * allocate CPUs round-robin.
491 cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1);
492 static int current_cpu;
495 * Return the CPU that the next interrupt source should use. For now
496 * this just returns the next local APIC according to round-robin.
503 #ifdef EARLY_AP_STARTUP
504 MPASS(mp_ncpus == 1 || smp_started);
506 return (PCPU_GET(apic_id));
508 /* Leave all interrupts on the BSP during boot. */
510 return (PCPU_GET(apic_id));
513 mtx_lock_spin(&icu_lock);
514 apic_id = cpu_apic_ids[current_cpu];
517 if (current_cpu > mp_maxid)
519 } while (!CPU_ISSET(current_cpu, &intr_cpus));
520 mtx_unlock_spin(&icu_lock);
524 /* Attempt to bind the specified IRQ to the specified CPU. */
526 intr_bind(u_int vector, u_char cpu)
530 isrc = intr_lookup_source(vector);
533 return (intr_event_bind(isrc->is_event, cpu));
537 * Add a CPU to our mask of valid CPUs that can be destinations of
541 intr_add_cpu(u_int cpu)
545 panic("%s: Invalid CPU ID", __func__);
547 printf("INTR: Adding local APIC %d as a target\n",
550 CPU_SET(cpu, &intr_cpus);
553 #ifndef EARLY_AP_STARTUP
555 * Distribute all the interrupt sources among the available CPUs once the
556 * AP's have been launched.
559 intr_shuffle_irqs(void *arg __unused)
564 /* Don't bother on UP. */
568 /* Round-robin assign a CPU to each enabled source. */
569 sx_xlock(&intrsrc_lock);
571 for (i = 0; i < NUM_IO_INTS; i++) {
572 isrc = interrupt_sources[i];
573 if (isrc != NULL && isrc->is_handlers > 0) {
575 * If this event is already bound to a CPU,
576 * then assign the source to that CPU instead
577 * of picking one via round-robin. Note that
578 * this is careful to only advance the
579 * round-robin if the CPU assignment succeeds.
581 if (isrc->is_event->ie_cpu != NOCPU)
582 (void)isrc->is_pic->pic_assign_cpu(isrc,
583 cpu_apic_ids[isrc->is_event->ie_cpu]);
584 else if (isrc->is_pic->pic_assign_cpu(isrc,
585 cpu_apic_ids[current_cpu]) == 0)
586 (void)intr_next_cpu();
590 sx_xunlock(&intrsrc_lock);
592 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
597 * Always route interrupts to the current processor in the UP case.
603 return (PCPU_GET(apic_id));