2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Machine dependent interrupt code for x86. For x86, we have to
31 * deal with different PICs. Thus, we use the passed in vector to lookup
32 * an interrupt source associated with that vector. The interrupt source
33 * describes which PIC the source belongs to and includes methods to handle
37 #include "opt_atpic.h"
40 #include <sys/param.h>
42 #include <sys/interrupt.h>
44 #include <sys/kernel.h>
46 #include <sys/mutex.h>
50 #include <sys/syslog.h>
51 #include <sys/systm.h>
52 #include <machine/clock.h>
53 #include <machine/intr_machdep.h>
54 #include <machine/smp.h>
60 #include <machine/segments.h>
61 #include <machine/frame.h>
62 #include <dev/ic/i8259.h>
63 #include <x86/isa/icu.h>
64 #include <isa/isareg.h>
67 #define MAX_STRAY_LOG 5
69 typedef void (*mask_fn)(void *);
71 static int intrcnt_index;
72 static struct intsrc *interrupt_sources[NUM_IO_INTS];
73 static struct sx intrsrc_lock;
74 static struct mtx intrpic_lock;
75 static struct mtx intrcnt_lock;
76 static TAILQ_HEAD(pics_head, pic) pics;
78 #if defined(SMP) && !defined(EARLY_AP_STARTUP)
79 static int assign_cpu;
82 u_long intrcnt[INTRCNT_COUNT];
83 char intrnames[INTRCNT_COUNT * (MAXCOMLEN + 1)];
84 size_t sintrcnt = sizeof(intrcnt);
85 size_t sintrnames = sizeof(intrnames);
87 static int intr_assign_cpu(void *arg, int cpu);
88 static void intr_disable_src(void *arg);
89 static void intr_init(void *__dummy);
90 static int intr_pic_registered(struct pic *pic);
91 static void intrcnt_setname(const char *name, int index);
92 static void intrcnt_updatename(struct intsrc *is);
93 static void intrcnt_register(struct intsrc *is);
96 intr_pic_registered(struct pic *pic)
100 TAILQ_FOREACH(p, &pics, pics) {
108 * Register a new interrupt controller (PIC). This is to support suspend
109 * and resume where we suspend/resume controllers rather than individual
110 * sources. This also allows controllers with no active sources (such as
111 * 8259As in a system using the APICs) to participate in suspend and resume.
114 intr_register_pic(struct pic *pic)
118 mtx_lock(&intrpic_lock);
119 if (intr_pic_registered(pic))
122 TAILQ_INSERT_TAIL(&pics, pic, pics);
125 mtx_unlock(&intrpic_lock);
130 * Register a new interrupt source with the global interrupt system.
131 * The global interrupts need to be disabled when this function is
135 intr_register_source(struct intsrc *isrc)
139 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
140 vector = isrc->is_pic->pic_vector(isrc);
141 if (interrupt_sources[vector] != NULL)
143 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
144 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
145 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
149 sx_xlock(&intrsrc_lock);
150 if (interrupt_sources[vector] != NULL) {
151 sx_xunlock(&intrsrc_lock);
152 intr_event_destroy(isrc->is_event);
155 intrcnt_register(isrc);
156 interrupt_sources[vector] = isrc;
157 isrc->is_handlers = 0;
158 sx_xunlock(&intrsrc_lock);
163 intr_lookup_source(int vector)
166 return (interrupt_sources[vector]);
170 intr_add_handler(const char *name, int vector, driver_filter_t filter,
171 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
176 isrc = intr_lookup_source(vector);
179 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
180 arg, intr_priority(flags), flags, cookiep);
182 sx_xlock(&intrsrc_lock);
183 intrcnt_updatename(isrc);
185 if (isrc->is_handlers == 1) {
186 isrc->is_pic->pic_enable_intr(isrc);
187 isrc->is_pic->pic_enable_source(isrc);
189 sx_xunlock(&intrsrc_lock);
195 intr_remove_handler(void *cookie)
200 isrc = intr_handler_source(cookie);
201 error = intr_event_remove_handler(cookie);
203 sx_xlock(&intrsrc_lock);
205 if (isrc->is_handlers == 0) {
206 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
207 isrc->is_pic->pic_disable_intr(isrc);
209 intrcnt_updatename(isrc);
210 sx_xunlock(&intrsrc_lock);
216 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
220 isrc = intr_lookup_source(vector);
223 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
227 intr_disable_src(void *arg)
232 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
236 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
238 struct intr_event *ie;
242 * We count software interrupts when we process them. The
243 * code here follows previous practice, but there's an
244 * argument for counting hardware interrupts when they're
248 PCPU_INC(cnt.v_intr);
253 * XXX: We assume that IRQ 0 is only used for the ISA timer
256 vector = isrc->is_pic->pic_vector(isrc);
261 * For stray interrupts, mask and EOI the source, bump the
262 * stray count, and log the condition.
264 if (intr_event_handle(ie, frame) != 0) {
265 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
266 (*isrc->is_straycount)++;
267 if (*isrc->is_straycount < MAX_STRAY_LOG)
268 log(LOG_ERR, "stray irq%d\n", vector);
269 else if (*isrc->is_straycount == MAX_STRAY_LOG)
271 "too many stray irq %d's: not logging anymore\n",
277 intr_resume(bool suspend_cancelled)
284 mtx_lock(&intrpic_lock);
285 TAILQ_FOREACH(pic, &pics, pics) {
286 if (pic->pic_resume != NULL)
287 pic->pic_resume(pic, suspend_cancelled);
289 mtx_unlock(&intrpic_lock);
297 mtx_lock(&intrpic_lock);
298 TAILQ_FOREACH_REVERSE(pic, &pics, pics_head, pics) {
299 if (pic->pic_suspend != NULL)
300 pic->pic_suspend(pic);
302 mtx_unlock(&intrpic_lock);
306 intr_assign_cpu(void *arg, int cpu)
312 #ifdef EARLY_AP_STARTUP
313 MPASS(mp_ncpus == 1 || smp_started);
317 * Don't do anything during early boot. We will pick up the
318 * assignment once the APs are started.
320 if (assign_cpu && cpu != NOCPU) {
323 sx_xlock(&intrsrc_lock);
324 error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
325 sx_xunlock(&intrsrc_lock);
335 intrcnt_setname(const char *name, int index)
338 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
343 intrcnt_updatename(struct intsrc *is)
346 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
350 intrcnt_register(struct intsrc *is)
352 char straystr[MAXCOMLEN + 1];
354 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
355 mtx_lock_spin(&intrcnt_lock);
356 is->is_index = intrcnt_index;
358 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
359 is->is_pic->pic_vector(is));
360 intrcnt_updatename(is);
361 is->is_count = &intrcnt[is->is_index];
362 intrcnt_setname(straystr, is->is_index + 1);
363 is->is_straycount = &intrcnt[is->is_index + 1];
364 mtx_unlock_spin(&intrcnt_lock);
368 intrcnt_add(const char *name, u_long **countp)
371 mtx_lock_spin(&intrcnt_lock);
372 *countp = &intrcnt[intrcnt_index];
373 intrcnt_setname(name, intrcnt_index);
375 mtx_unlock_spin(&intrcnt_lock);
379 intr_init(void *dummy __unused)
382 intrcnt_setname("???", 0);
385 mtx_init(&intrpic_lock, "intrpic", NULL, MTX_DEF);
386 sx_init(&intrsrc_lock, "intrsrc");
387 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
389 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
392 intr_init_final(void *dummy __unused)
396 * Enable interrupts on the BSP after all of the interrupt
397 * controllers are initialized. Device interrupts are still
398 * disabled in the interrupt controllers until interrupt
399 * handlers are registered. Interrupts are enabled on each AP
400 * after their first context switch.
404 SYSINIT(intr_init_final, SI_SUB_INTR, SI_ORDER_ANY, intr_init_final, NULL);
407 /* Initialize the two 8259A's to a known-good shutdown state. */
412 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
413 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
414 outb(IO_ICU1 + ICU_IMR_OFFSET, IRQ_MASK(ICU_SLAVEID));
415 outb(IO_ICU1 + ICU_IMR_OFFSET, MASTER_MODE);
416 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
417 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
419 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
420 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
421 outb(IO_ICU2 + ICU_IMR_OFFSET, ICU_SLAVEID);
422 outb(IO_ICU2 + ICU_IMR_OFFSET, SLAVE_MODE);
423 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
424 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
428 /* Add a description to an active interrupt handler. */
430 intr_describe(u_int vector, void *ih, const char *descr)
435 isrc = intr_lookup_source(vector);
438 error = intr_event_describe_handler(isrc->is_event, ih, descr);
441 intrcnt_updatename(isrc);
451 sx_xlock(&intrsrc_lock);
452 for (v = 0; v < NUM_IO_INTS; v++) {
453 is = interrupt_sources[v];
456 if (is->is_pic->pic_reprogram_pin != NULL)
457 is->is_pic->pic_reprogram_pin(is);
459 sx_xunlock(&intrsrc_lock);
464 * Dump data about interrupt handlers
466 DB_SHOW_COMMAND(irqs, db_show_irqs)
468 struct intsrc **isrc;
471 if (strcmp(modif, "v") == 0)
475 isrc = interrupt_sources;
476 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
478 db_dump_intr_event((*isrc)->is_event, verbose);
484 * Support for balancing interrupt sources across CPUs. For now we just
485 * allocate CPUs round-robin.
488 cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1);
489 static int current_cpu;
492 * Return the CPU that the next interrupt source should use. For now
493 * this just returns the next local APIC according to round-robin.
500 #ifdef EARLY_AP_STARTUP
501 MPASS(mp_ncpus == 1 || smp_started);
503 /* Leave all interrupts on the BSP during boot. */
505 return (PCPU_GET(apic_id));
508 mtx_lock_spin(&icu_lock);
509 apic_id = cpu_apic_ids[current_cpu];
512 if (current_cpu > mp_maxid)
514 } while (!CPU_ISSET(current_cpu, &intr_cpus));
515 mtx_unlock_spin(&icu_lock);
519 /* Attempt to bind the specified IRQ to the specified CPU. */
521 intr_bind(u_int vector, u_char cpu)
525 isrc = intr_lookup_source(vector);
528 return (intr_event_bind(isrc->is_event, cpu));
532 * Add a CPU to our mask of valid CPUs that can be destinations of
536 intr_add_cpu(u_int cpu)
540 panic("%s: Invalid CPU ID", __func__);
542 printf("INTR: Adding local APIC %d as a target\n",
545 CPU_SET(cpu, &intr_cpus);
548 #ifndef EARLY_AP_STARTUP
550 * Distribute all the interrupt sources among the available CPUs once the
551 * AP's have been launched.
554 intr_shuffle_irqs(void *arg __unused)
559 /* Don't bother on UP. */
563 /* Round-robin assign a CPU to each enabled source. */
564 sx_xlock(&intrsrc_lock);
566 for (i = 0; i < NUM_IO_INTS; i++) {
567 isrc = interrupt_sources[i];
568 if (isrc != NULL && isrc->is_handlers > 0) {
570 * If this event is already bound to a CPU,
571 * then assign the source to that CPU instead
572 * of picking one via round-robin. Note that
573 * this is careful to only advance the
574 * round-robin if the CPU assignment succeeds.
576 if (isrc->is_event->ie_cpu != NOCPU)
577 (void)isrc->is_pic->pic_assign_cpu(isrc,
578 cpu_apic_ids[isrc->is_event->ie_cpu]);
579 else if (isrc->is_pic->pic_assign_cpu(isrc,
580 cpu_apic_ids[current_cpu]) == 0)
581 (void)intr_next_cpu();
585 sx_xunlock(&intrsrc_lock);
587 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
592 * Always route interrupts to the current processor in the UP case.
598 return (PCPU_GET(apic_id));