2 * Copyright 1998 Massachusetts Institute of Technology
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
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13 * purpose. It is provided "as is" without express or implied
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * This code implements a system driver for legacy systems that do not
35 * support ACPI or when ACPI support is not present in the kernel.
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <machine/bus.h>
49 #include <dev/pci/pcireg.h>
51 #include <machine/clock.h>
52 #include <machine/pci_cfgreg.h>
53 #include <machine/resource.h>
54 #include <x86/legacyvar.h>
56 static MALLOC_DEFINE(M_LEGACYDEV, "legacydrv", "legacy system device");
57 struct legacy_device {
63 #define DEVTOAT(dev) ((struct legacy_device *)device_get_ivars(dev))
65 static int legacy_probe(device_t);
66 static int legacy_attach(device_t);
67 static int legacy_print_child(device_t, device_t);
68 static device_t legacy_add_child(device_t bus, u_int order, const char *name,
70 static int legacy_read_ivar(device_t, device_t, int, uintptr_t *);
71 static int legacy_write_ivar(device_t, device_t, int, uintptr_t);
73 static device_method_t legacy_methods[] = {
74 /* Device interface */
75 DEVMETHOD(device_probe, legacy_probe),
76 DEVMETHOD(device_attach, legacy_attach),
77 DEVMETHOD(device_detach, bus_generic_detach),
78 DEVMETHOD(device_shutdown, bus_generic_shutdown),
79 DEVMETHOD(device_suspend, bus_generic_suspend),
80 DEVMETHOD(device_resume, bus_generic_resume),
83 DEVMETHOD(bus_print_child, legacy_print_child),
84 DEVMETHOD(bus_add_child, legacy_add_child),
85 DEVMETHOD(bus_read_ivar, legacy_read_ivar),
86 DEVMETHOD(bus_write_ivar, legacy_write_ivar),
87 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
88 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
89 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
90 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
91 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
92 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
93 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
98 static driver_t legacy_driver = {
103 static devclass_t legacy_devclass;
105 DRIVER_MODULE(legacy, nexus, legacy_driver, legacy_devclass, 0, 0);
108 legacy_probe(device_t dev)
111 device_set_desc(dev, "legacy system");
117 * Grope around in the PCI config space to see if this is a chipset
118 * that is capable of doing memory-mapped config cycles. This also
119 * implies that it can do PCIe extended config cycles.
122 legacy_pci_cfgregopen(device_t dev)
127 if (cfgmech == CFGMECH_NONE || cfgmech == CFGMECH_PCIE)
130 /* Check for supported chipsets */
131 vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2);
132 did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2);
138 /* Intel 7520 or 7320 */
139 pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16;
140 pcie_cfgregopen(pciebar, 0, 255);
145 /* Intel 915, 925, or 915GM */
146 pciebar = pci_cfgregread(0, 0, 0, 0x48, 4);
147 pcie_cfgregopen(pciebar, 0, 255);
152 if (bootverbose && cfgmech == CFGMECH_PCIE)
153 device_printf(dev, "Enabled ECAM PCIe accesses\n");
157 legacy_attach(device_t dev)
161 legacy_pci_cfgregopen(dev);
164 * Let our child drivers identify any child devices that they
165 * can find. Once that is done attach any devices that we
168 bus_generic_probe(dev);
169 bus_generic_attach(dev);
172 * If we didn't see ISA on a pci bridge, create some
173 * connection points now so they show up "on motherboard".
175 if (!devclass_get_device(devclass_find("isa"), 0)) {
176 child = BUS_ADD_CHILD(dev, 0, "isa", 0);
178 panic("legacy_attach isa");
179 device_probe_and_attach(child);
186 legacy_print_child(device_t bus, device_t child)
188 struct legacy_device *atdev = DEVTOAT(child);
191 retval += bus_print_child_header(bus, child);
192 if (atdev->lg_pcibus != -1)
193 retval += printf(" pcibus %d", atdev->lg_pcibus);
194 retval += printf(" on motherboard\n"); /* XXX "motherboard", ick */
200 legacy_add_child(device_t bus, u_int order, const char *name, int unit)
203 struct legacy_device *atdev;
205 atdev = malloc(sizeof(struct legacy_device), M_LEGACYDEV,
209 atdev->lg_pcibus = -1;
210 atdev->lg_pcislot = -1;
211 atdev->lg_pcifunc = -1;
213 child = device_add_child_ordered(bus, order, name, unit);
215 free(atdev, M_LEGACYDEV);
217 /* should we free this in legacy_child_detached? */
218 device_set_ivars(child, atdev);
224 legacy_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
226 struct legacy_device *atdev = DEVTOAT(child);
229 case LEGACY_IVAR_PCIDOMAIN:
232 case LEGACY_IVAR_PCIBUS:
233 *result = atdev->lg_pcibus;
235 case LEGACY_IVAR_PCISLOT:
236 *result = atdev->lg_pcislot;
238 case LEGACY_IVAR_PCIFUNC:
239 *result = atdev->lg_pcifunc;
249 legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
251 struct legacy_device *atdev = DEVTOAT(child);
254 case LEGACY_IVAR_PCIDOMAIN:
256 case LEGACY_IVAR_PCIBUS:
257 atdev->lg_pcibus = value;
259 case LEGACY_IVAR_PCISLOT:
260 atdev->lg_pcislot = value;
262 case LEGACY_IVAR_PCIFUNC:
263 atdev->lg_pcifunc = value;
272 * Legacy CPU attachment when ACPI is not available. Drivers like
273 * cpufreq(4) hang off this.
275 static void cpu_identify(driver_t *driver, device_t parent);
276 static int cpu_read_ivar(device_t dev, device_t child, int index,
278 static device_t cpu_add_child(device_t bus, u_int order, const char *name,
280 static struct resource_list *cpu_get_rlist(device_t dev, device_t child);
283 struct resource_list cd_rl;
284 struct pcpu *cd_pcpu;
287 static device_method_t cpu_methods[] = {
288 /* Device interface */
289 DEVMETHOD(device_identify, cpu_identify),
290 DEVMETHOD(device_probe, bus_generic_probe),
291 DEVMETHOD(device_attach, bus_generic_attach),
292 DEVMETHOD(device_detach, bus_generic_detach),
293 DEVMETHOD(device_shutdown, bus_generic_shutdown),
294 DEVMETHOD(device_suspend, bus_generic_suspend),
295 DEVMETHOD(device_resume, bus_generic_resume),
298 DEVMETHOD(bus_add_child, cpu_add_child),
299 DEVMETHOD(bus_read_ivar, cpu_read_ivar),
300 DEVMETHOD(bus_get_resource_list, cpu_get_rlist),
301 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
302 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
303 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
304 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
305 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
306 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
307 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
308 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
313 static driver_t cpu_driver = {
318 static devclass_t cpu_devclass;
319 DRIVER_MODULE(cpu, legacy, cpu_driver, cpu_devclass, 0, 0);
322 cpu_identify(driver_t *driver, device_t parent)
328 * Attach a cpuX device for each CPU. We use an order of 150
329 * so that these devices are attached after the Host-PCI
330 * bridges (which are added at order 100).
333 child = BUS_ADD_CHILD(parent, 150, "cpu", i);
335 panic("legacy_attach cpu");
340 cpu_add_child(device_t bus, u_int order, const char *name, int unit)
342 struct cpu_device *cd;
346 if ((cd = malloc(sizeof(*cd), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL)
349 resource_list_init(&cd->cd_rl);
350 pc = pcpu_find(device_get_unit(bus));
353 child = device_add_child_ordered(bus, order, name, unit);
355 pc->pc_device = child;
356 device_set_ivars(child, cd);
362 static struct resource_list *
363 cpu_get_rlist(device_t dev, device_t child)
365 struct cpu_device *cpdev;
367 cpdev = device_get_ivars(child);
368 return (&cpdev->cd_rl);
372 cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
374 struct cpu_device *cpdev;
378 cpdev = device_get_ivars(child);
379 *result = (uintptr_t)cpdev->cd_pcpu;
381 case CPU_IVAR_NOMINAL_MHZ:
382 if (tsc_is_invariant) {
383 *result = (uintptr_t)(atomic_load_acq_64(&tsc_freq) /