2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Copyright (c) 1996, by Steve Passe
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. The name of the developer may NOT be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include "opt_mptable_force_htt.h"
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/limits.h>
38 #include <sys/malloc.h>
45 #include <vm/vm_param.h>
48 #include <dev/pci/pcivar.h>
50 #include <dev/pci/pcib_private.h>
52 #include <x86/apicreg.h>
53 #include <x86/mptable.h>
54 #include <machine/frame.h>
55 #include <machine/intr_machdep.h>
56 #include <x86/apicvar.h>
57 #include <machine/md_var.h>
59 #include <machine/resource.h>
61 #include <machine/specialreg.h>
63 /* string defined by the Intel MP Spec as identifying the MP table */
64 #define MP_SIG 0x5f504d5f /* _MP_ */
67 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
69 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
72 #define BIOS_BASE (0xf0000)
73 #define BIOS_SIZE (0x10000)
74 #define BIOS_COUNT (BIOS_SIZE/4)
76 typedef void mptable_entry_handler(u_char *entry, void *arg);
77 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
79 /* descriptions of MP table entries */
80 typedef struct BASETABLE_ENTRY {
86 static basetable_entry basetable_entry_types[] =
95 typedef struct BUSDATA {
97 enum busTypes bus_type;
100 typedef struct INTDATA {
110 typedef struct BUSTYPENAME {
115 /* From MP spec v1.4, table 4-8. */
116 static bus_type_name bus_type_table[] =
118 {UNKNOWN_BUSTYPE, "CBUS "},
119 {UNKNOWN_BUSTYPE, "CBUSII"},
121 {UNKNOWN_BUSTYPE, "FUTURE"},
122 {UNKNOWN_BUSTYPE, "INTERN"},
124 {UNKNOWN_BUSTYPE, "MBI "},
125 {UNKNOWN_BUSTYPE, "MBII "},
127 {UNKNOWN_BUSTYPE, "MPI "},
128 {UNKNOWN_BUSTYPE, "MPSA "},
129 {UNKNOWN_BUSTYPE, "NUBUS "},
131 {UNKNOWN_BUSTYPE, "PCMCIA"},
132 {UNKNOWN_BUSTYPE, "TC "},
133 {UNKNOWN_BUSTYPE, "VL "},
134 {UNKNOWN_BUSTYPE, "VME "},
135 {UNKNOWN_BUSTYPE, "XPRESS"}
138 /* From MP spec v1.4, table 5-1. */
139 static int default_data[7][5] =
141 /* nbus, id0, type0, id1, type1 */
142 {1, 0, ISA, 255, NOBUS},
143 {1, 0, EISA, 255, NOBUS},
144 {1, 0, EISA, 255, NOBUS},
145 {1, 0, MCA, 255, NOBUS},
147 {2, 0, EISA, 1, PCI},
151 struct pci_probe_table_args {
156 struct pci_route_interrupt_args {
157 u_char bus; /* Source bus. */
158 u_char irq; /* Source slot:pin. */
159 int vector; /* Return value. */
162 static mpfps_t mpfps;
164 static ext_entry_ptr mpet;
165 static void *ioapics[IOAPIC_MAX_ID + 1];
166 static bus_datum *busses;
167 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
168 static int pci0 = -1;
170 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
172 static enum intr_polarity conforming_polarity(u_char src_bus,
174 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
175 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
176 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
177 static int lookup_bus_type(char *name);
178 static void mptable_count_items(void);
179 static void mptable_count_items_handler(u_char *entry, void *arg);
180 #ifdef MPTABLE_FORCE_HTT
181 static void mptable_hyperthread_fixup(u_int id_mask);
183 static void mptable_parse_apics_and_busses(void);
184 static void mptable_parse_apics_and_busses_handler(u_char *entry,
186 static void mptable_parse_default_config_ints(void);
187 static void mptable_parse_ints(void);
188 static void mptable_parse_ints_handler(u_char *entry, void *arg);
189 static void mptable_parse_io_int(int_entry_ptr intr);
190 static void mptable_parse_local_int(int_entry_ptr intr);
191 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
192 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
193 static void mptable_pci_setup(void);
194 static int mptable_probe(void);
195 static int mptable_probe_cpus(void);
196 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
197 static void mptable_setup_cpus_handler(u_char *entry, void *arg __unused);
198 static void mptable_register(void *dummy);
199 static int mptable_setup_local(void);
200 static int mptable_setup_io(void);
202 static void mptable_walk_extended_table(
203 mptable_extended_entry_handler *handler, void *arg);
205 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
206 static int search_for_sig(u_int32_t target, int count);
208 static struct apic_enumerator mptable_enumerator = {
217 * look for the MP spec signature
221 search_for_sig(u_int32_t target, int count)
227 addr = (u_int32_t *) (KERNBASE + target);
229 addr = (u_int32_t *) (PMAP_MAP_LOW + target);
231 for (x = 0; x < count; x += 4)
232 if (addr[x] == MP_SIG)
233 /* make array index a byte index */
234 return (target + (x * sizeof(u_int32_t)));
239 lookup_bus_type(char *name)
243 for (x = 0; x < MAX_BUSTYPE; ++x)
244 if (strncmp(bus_type_table[x].name, name, 6) == 0)
245 return (bus_type_table[x].type);
247 return (UNKNOWN_BUSTYPE);
251 * Look for an Intel MP spec table (ie, SMP capable hardware).
260 /* see if EBDA exists */
261 if ((segment = (u_long) * (u_short *) (
268 /* search first 1K of EBDA */
269 target = (u_int32_t) (segment << 4);
270 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
273 /* last 1K of base memory, effective 'top of base' passed in */
274 target = (u_int32_t) ((basemem * 1024) - 0x400);
275 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
279 /* search the BIOS */
280 target = (u_int32_t) BIOS_BASE;
281 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
288 mpfps = (mpfps_t)(KERNBASE + x);
290 /* Map in the configuration table if it exists. */
291 if (mpfps->config_type != 0) {
294 "MP Table version 1.%d found using Default Configuration %d\n",
295 mpfps->spec_rev, mpfps->config_type);
296 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
298 "MP Table Default Configuration %d is unsupported\n",
304 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
305 printf("%s: Unable to map MP Configuration Table\n",
309 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
310 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
312 printf("%s: Unable to map end of MP Config Table\n",
316 if (mpct->extended_table_length != 0 &&
317 mpct->extended_table_length + mpct->base_table_length +
318 (uintptr_t)mpfps->pap < 1024 * 1024)
319 mpet = (ext_entry_ptr)((char *)mpct +
320 mpct->base_table_length);
321 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
322 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
323 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
324 __func__, mpct->signature[0], mpct->signature[1],
325 mpct->signature[2], mpct->signature[3]);
330 "MP Configuration Table version 1.%d found at %p\n",
331 mpct->spec_rev, mpct);
338 * Run through the MP table enumerating CPUs.
341 mptable_probe_cpus(void)
345 /* Is this a pre-defined config? */
346 if (mpfps->config_type != 0) {
353 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
359 * Initialize the local APIC on the BSP.
362 mptable_setup_local(void)
367 /* Is this a pre-defined config? */
368 printf("MPTable: <");
369 if (mpfps->config_type != 0) {
372 addr = DEFAULT_APIC_BASE;
373 printf("Default Configuration %d", mpfps->config_type);
377 mptable_walk_table(mptable_setup_cpus_handler, &cpu_mask);
378 #ifdef MPTABLE_FORCE_HTT
379 mptable_hyperthread_fixup(cpu_mask);
381 addr = mpct->apic_address;
382 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
383 (int)sizeof(mpct->product_id), mpct->product_id);
391 * Run through the MP table enumerating I/O APICs.
394 mptable_setup_io(void)
399 /* First, we count individual items and allocate arrays. */
400 mptable_count_items();
401 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
403 for (i = 0; i <= mptable_maxbusid; i++)
404 busses[i].bus_type = NOBUS;
406 /* Second, we run through adding I/O APIC's and buses. */
407 mptable_parse_apics_and_busses();
409 /* Third, we run through the table tweaking interrupt sources. */
410 mptable_parse_ints();
412 /* Fourth, we register all the I/O APIC's. */
413 for (i = 0; i <= IOAPIC_MAX_ID; i++)
414 if (ioapics[i] != NULL)
415 ioapic_register(ioapics[i]);
417 /* Fifth, we setup data structures to handle PCI interrupt routing. */
420 /* Finally, we throw the switch to enable the I/O APIC's. */
421 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
422 outb(0x22, 0x70); /* select IMCR */
423 byte = inb(0x23); /* current contents */
424 byte |= 0x01; /* mask external INTR */
425 outb(0x23, byte); /* disconnect 8259s/NMI */
432 mptable_register(void *dummy __unused)
435 apic_register_enumerator(&mptable_enumerator);
437 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, mptable_register,
441 * Call the handler routine for each entry in the MP config base table.
444 mptable_walk_table(mptable_entry_handler *handler, void *arg)
449 entry = (u_char *)(mpct + 1);
450 for (i = 0; i < mpct->entry_count; i++) {
452 case MPCT_ENTRY_PROCESSOR:
453 case MPCT_ENTRY_IOAPIC:
456 case MPCT_ENTRY_LOCAL_INT:
459 panic("%s: Unknown MP Config Entry %d\n", __func__,
463 entry += basetable_entry_types[*entry].length;
469 * Call the handler routine for each entry in the MP config extended
473 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
475 ext_entry_ptr end, entry;
480 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
481 while (entry < end) {
483 entry = (ext_entry_ptr)((char *)entry + entry->length);
489 mptable_probe_cpus_handler(u_char *entry, void *arg)
494 case MPCT_ENTRY_PROCESSOR:
495 proc = (proc_entry_ptr)entry;
496 if (proc->cpu_flags & PROCENTRY_FLAG_EN &&
497 proc->apic_id < MAX_LAPIC_ID && mp_ncpus < MAXCPU) {
500 mp_maxid = mp_ncpus - 1;
502 max_apic_id = max(max_apic_id, proc->apic_id);
510 mptable_setup_cpus_handler(u_char *entry, void *arg)
516 case MPCT_ENTRY_PROCESSOR:
517 proc = (proc_entry_ptr)entry;
518 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
519 lapic_create(proc->apic_id, proc->cpu_flags &
521 if (proc->apic_id < MAX_LAPIC_ID) {
522 cpu_mask = (u_int *)arg;
523 *cpu_mask |= (1ul << proc->apic_id);
531 mptable_count_items_handler(u_char *entry, void *arg __unused)
533 io_apic_entry_ptr apic;
538 bus = (bus_entry_ptr)entry;
540 if (bus->bus_id > mptable_maxbusid)
541 mptable_maxbusid = bus->bus_id;
543 case MPCT_ENTRY_IOAPIC:
544 apic = (io_apic_entry_ptr)entry;
545 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
552 * Count items in the table.
555 mptable_count_items(void)
558 /* Is this a pre-defined config? */
559 if (mpfps->config_type != 0) {
560 mptable_nioapics = 1;
561 switch (mpfps->config_type) {
574 panic("Unknown pre-defined MP Table config type %d",
577 mptable_maxbusid = mptable_nbusses - 1;
579 mptable_walk_table(mptable_count_items_handler, NULL);
583 * Add a bus or I/O APIC from an entry in the table.
586 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
588 io_apic_entry_ptr apic;
590 enum busTypes bus_type;
596 bus = (bus_entry_ptr)entry;
597 bus_type = lookup_bus_type(bus->bus_type);
598 if (bus_type == UNKNOWN_BUSTYPE) {
599 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
600 for (i = 0; i < 6; i++)
601 printf("%c", bus->bus_type[i]);
604 busses[bus->bus_id].bus_id = bus->bus_id;
605 busses[bus->bus_id].bus_type = bus_type;
607 case MPCT_ENTRY_IOAPIC:
608 apic = (io_apic_entry_ptr)entry;
609 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
611 if (apic->apic_id > IOAPIC_MAX_ID)
612 panic("%s: I/O APIC ID %d too high", __func__,
614 if (ioapics[apic->apic_id] != NULL)
615 panic("%s: Double APIC ID %d", __func__,
617 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
626 * Enumerate I/O APIC's and buses.
629 mptable_parse_apics_and_busses(void)
632 /* Is this a pre-defined config? */
633 if (mpfps->config_type != 0) {
634 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
635 busses[0].bus_id = 0;
636 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
637 if (mptable_nbusses > 1) {
638 busses[1].bus_id = 1;
640 default_data[mpfps->config_type - 1][4];
643 mptable_walk_table(mptable_parse_apics_and_busses_handler,
648 * Determine conforming polarity for a given bus type.
650 static enum intr_polarity
651 conforming_polarity(u_char src_bus, u_char src_bus_irq)
654 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
655 switch (busses[src_bus].bus_type) {
658 return (INTR_POLARITY_HIGH);
660 return (INTR_POLARITY_LOW);
662 panic("%s: unknown bus type %d", __func__,
663 busses[src_bus].bus_type);
668 * Determine conforming trigger for a given bus type.
670 static enum intr_trigger
671 conforming_trigger(u_char src_bus, u_char src_bus_irq)
674 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
675 switch (busses[src_bus].bus_type) {
678 return (elcr_read_trigger(src_bus_irq));
680 return (INTR_TRIGGER_EDGE);
682 return (INTR_TRIGGER_LEVEL);
685 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
686 KASSERT(elcr_found, ("Missing ELCR"));
687 return (elcr_read_trigger(src_bus_irq));
690 panic("%s: unknown bus type %d", __func__,
691 busses[src_bus].bus_type);
695 static enum intr_polarity
696 intentry_polarity(int_entry_ptr intr)
699 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
700 case INTENTRY_FLAGS_POLARITY_CONFORM:
701 return (conforming_polarity(intr->src_bus_id,
703 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
704 return (INTR_POLARITY_HIGH);
705 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
706 return (INTR_POLARITY_LOW);
708 panic("Bogus interrupt flags");
712 static enum intr_trigger
713 intentry_trigger(int_entry_ptr intr)
716 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
717 case INTENTRY_FLAGS_TRIGGER_CONFORM:
718 return (conforming_trigger(intr->src_bus_id,
720 case INTENTRY_FLAGS_TRIGGER_EDGE:
721 return (INTR_TRIGGER_EDGE);
722 case INTENTRY_FLAGS_TRIGGER_LEVEL:
723 return (INTR_TRIGGER_LEVEL);
725 panic("Bogus interrupt flags");
730 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
733 mptable_parse_io_int(int_entry_ptr intr)
738 apic_id = intr->dst_apic_id;
739 if (intr->dst_apic_id == 0xff) {
741 * An APIC ID of 0xff means that the interrupt is connected
742 * to the specified pin on all I/O APICs in the system. If
743 * there is only one I/O APIC, then use that APIC to route
744 * the interrupts. If there is more than one I/O APIC, then
747 if (mptable_nioapics == 1) {
749 while (ioapics[apic_id] == NULL)
753 "MPTable: Ignoring global interrupt entry for pin %d\n",
758 if (apic_id > IOAPIC_MAX_ID) {
759 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
763 ioapic = ioapics[apic_id];
764 if (ioapic == NULL) {
766 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
770 pin = intr->dst_apic_int;
771 switch (intr->int_type) {
772 case INTENTRY_TYPE_INT:
773 switch (busses[intr->src_bus_id].bus_type) {
775 panic("interrupt from missing bus");
778 if (busses[intr->src_bus_id].bus_type == ISA)
779 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
781 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
782 if (intr->src_bus_irq == pin)
784 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
785 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
787 ioapic_disable_pin(ioapic, intr->src_bus_irq);
790 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
793 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
797 case INTENTRY_TYPE_NMI:
798 ioapic_set_nmi(ioapic, pin);
800 case INTENTRY_TYPE_SMI:
801 ioapic_set_smi(ioapic, pin);
803 case INTENTRY_TYPE_EXTINT:
804 ioapic_set_extint(ioapic, pin);
807 panic("%s: invalid interrupt entry type %d\n", __func__,
810 if (intr->int_type == INTENTRY_TYPE_INT ||
811 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
812 INTENTRY_FLAGS_TRIGGER_CONFORM)
813 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
814 if (intr->int_type == INTENTRY_TYPE_INT ||
815 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
816 INTENTRY_FLAGS_POLARITY_CONFORM)
817 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
821 * Parse an interrupt entry for a local APIC LVT pin.
824 mptable_parse_local_int(int_entry_ptr intr)
828 if (intr->dst_apic_id == 0xff)
829 apic_id = APIC_ID_ALL;
831 apic_id = intr->dst_apic_id;
832 if (intr->dst_apic_int == 0)
833 pin = APIC_LVT_LINT0;
835 pin = APIC_LVT_LINT1;
836 switch (intr->int_type) {
837 case INTENTRY_TYPE_INT:
840 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
841 intr->dst_apic_int, intr->src_bus_irq);
844 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
847 case INTENTRY_TYPE_NMI:
848 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
850 case INTENTRY_TYPE_SMI:
851 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
853 case INTENTRY_TYPE_EXTINT:
854 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
857 panic("%s: invalid interrupt entry type %d\n", __func__,
860 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
861 INTENTRY_FLAGS_TRIGGER_CONFORM)
862 lapic_set_lvt_triggermode(apic_id, pin,
863 intentry_trigger(intr));
864 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
865 INTENTRY_FLAGS_POLARITY_CONFORM)
866 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
870 * Parse interrupt entries.
873 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
877 intr = (int_entry_ptr)entry;
880 mptable_parse_io_int(intr);
882 case MPCT_ENTRY_LOCAL_INT:
883 mptable_parse_local_int(intr);
889 * Configure interrupt pins for a default configuration. For details see
890 * Table 5-2 in Section 5 of the MP Table specification.
893 mptable_parse_default_config_ints(void)
895 struct INTENTRY entry;
899 * All default configs route IRQs from bus 0 to the first 16 pins
900 * of the first I/O APIC with an APIC ID of 2.
902 entry.type = MPCT_ENTRY_INT;
903 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
904 INTENTRY_FLAGS_TRIGGER_CONFORM;
905 entry.src_bus_id = 0;
906 entry.dst_apic_id = 2;
908 /* Run through all 16 pins. */
909 for (pin = 0; pin < 16; pin++) {
910 entry.dst_apic_int = pin;
913 /* Pin 0 is an ExtINT pin. */
914 entry.int_type = INTENTRY_TYPE_EXTINT;
917 /* IRQ 0 is routed to pin 2. */
918 entry.int_type = INTENTRY_TYPE_INT;
919 entry.src_bus_irq = 0;
922 /* All other pins are identity mapped. */
923 entry.int_type = INTENTRY_TYPE_INT;
924 entry.src_bus_irq = pin;
927 mptable_parse_io_int(&entry);
930 /* Certain configs disable certain pins. */
931 if (mpfps->config_type == 7)
932 ioapic_disable_pin(ioapics[2], 0);
933 if (mpfps->config_type == 2) {
934 ioapic_disable_pin(ioapics[2], 2);
935 ioapic_disable_pin(ioapics[2], 13);
940 * Configure the interrupt pins
943 mptable_parse_ints(void)
946 /* Is this a pre-defined config? */
947 if (mpfps->config_type != 0) {
948 /* Configure LINT pins. */
949 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
951 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
953 /* Configure I/O APIC pins. */
954 mptable_parse_default_config_ints();
956 mptable_walk_table(mptable_parse_ints_handler, NULL);
959 #ifdef MPTABLE_FORCE_HTT
961 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
962 * that aren't already listed in the table.
964 * XXX: We assume that all of the physical CPUs in the
965 * system have the same number of logical CPUs.
967 * XXX: We assume that APIC ID's are allocated such that
968 * the APIC ID's for a physical processor are aligned
969 * with the number of logical CPU's in the processor.
972 mptable_hyperthread_fixup(u_int id_mask)
974 u_int i, id, logical_cpus;
976 /* Nothing to do if there is no HTT support. */
977 if ((cpu_feature & CPUID_HTT) == 0)
979 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
980 if (logical_cpus <= 1)
984 * For each APIC ID of a CPU that is set in the mask,
985 * scan the other candidate APIC ID's for this
986 * physical processor. If any of those ID's are
987 * already in the table, then kill the fixup.
989 for (id = 0; id <= MAX_LAPIC_ID; id++) {
990 if ((id_mask & 1 << id) == 0)
992 /* First, make sure we are on a logical_cpus boundary. */
993 if (id % logical_cpus != 0)
995 for (i = id + 1; i < id + logical_cpus; i++)
996 if ((id_mask & 1 << i) != 0)
1001 * Ok, the ID's checked out, so perform the fixup by
1002 * adding the logical CPUs.
1004 while ((id = ffs(id_mask)) != 0) {
1006 for (i = id + 1; i < id + logical_cpus; i++) {
1009 "MPTable: Adding logical CPU %d from main CPU %d\n",
1013 id_mask &= ~(1 << id);
1016 #endif /* MPTABLE_FORCE_HTT */
1019 * Support code for routing PCI interrupts using the MP Table.
1022 mptable_pci_setup(void)
1027 * Find the first pci bus and call it 0. Panic if pci0 is not
1028 * bus zero and there are multiple PCI buses.
1030 for (i = 0; i <= mptable_maxbusid; i++)
1031 if (busses[i].bus_type == PCI) {
1036 "MPTable contains multiple PCI buses but no PCI bus 0");
1041 mptable_pci_probe_table_handler(u_char *entry, void *arg)
1043 struct pci_probe_table_args *args;
1046 if (*entry != MPCT_ENTRY_INT)
1048 intr = (int_entry_ptr)entry;
1049 args = (struct pci_probe_table_args *)arg;
1050 KASSERT(args->bus <= mptable_maxbusid,
1051 ("bus %d is too big", args->bus));
1052 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1053 if (intr->src_bus_id == args->bus)
1058 mptable_pci_probe_table(int bus)
1060 struct pci_probe_table_args args;
1064 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1066 if (busses[pci0 + bus].bus_type != PCI)
1068 args.bus = pci0 + bus;
1070 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1071 if (args.found == 0)
1077 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1079 struct pci_route_interrupt_args *args;
1083 if (*entry != MPCT_ENTRY_INT)
1085 intr = (int_entry_ptr)entry;
1086 args = (struct pci_route_interrupt_args *)arg;
1087 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1090 /* Make sure the APIC maps to a known APIC. */
1091 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1092 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1095 * Look up the vector for this APIC / pin combination. If we
1096 * have previously matched an entry for this PCI IRQ but it
1097 * has the same vector as this entry, just return. Otherwise,
1098 * we use the vector for this APIC / pin combination.
1100 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1101 intr->dst_apic_int);
1102 if (args->vector == vector)
1104 KASSERT(args->vector == -1,
1105 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1106 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1108 args->vector = vector;
1112 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1114 struct pci_route_interrupt_args args;
1117 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1119 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1120 args.bus = pci_get_bus(dev) + pci0;
1121 slot = pci_get_slot(dev);
1124 * PCI interrupt entries in the MP Table encode both the slot and
1125 * pin into the IRQ with the pin being the two least significant
1126 * bits, the slot being the next five bits, and the most significant
1127 * bit being reserved.
1129 args.irq = slot << 2 | pin;
1131 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1132 if (args.vector < 0) {
1133 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1135 return (PCI_INVALID_IRQ);
1138 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1139 'A' + pin, args.vector);
1140 return (args.vector);
1144 struct host_res_args {
1145 struct mptable_hostb_softc *sc;
1151 * Initialize a Host-PCI bridge so it can restrict resource allocation
1152 * requests to the resources it actually decodes according to MP
1153 * config table extended entries.
1156 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1158 struct host_res_args *args;
1159 cbasm_entry_ptr cbasm;
1162 uint64_t start, end;
1163 int error, *flagp, flags, type;
1166 switch (entry->type) {
1167 case MPCT_EXTENTRY_SAS:
1168 sas = (sas_entry_ptr)entry;
1169 if (sas->bus_id != args->bus)
1171 switch (sas->address_type) {
1172 case SASENTRY_TYPE_IO:
1173 type = SYS_RES_IOPORT;
1176 case SASENTRY_TYPE_MEMORY:
1177 type = SYS_RES_MEMORY;
1180 case SASENTRY_TYPE_PREFETCH:
1181 type = SYS_RES_MEMORY;
1182 flags = RF_PREFETCHABLE;
1186 "MPTable: Unknown systems address space type for bus %u: %d\n",
1187 sas->bus_id, sas->address_type);
1190 start = sas->address_base;
1191 end = sas->address_base + sas->address_length - 1;
1193 if (start > ULONG_MAX) {
1194 device_printf(args->dev,
1195 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1196 type, (uintmax_t)start, (uintmax_t)end);
1199 if (end > ULONG_MAX) {
1200 device_printf(args->dev,
1201 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1202 type, (uintmax_t)start, (uintmax_t)end);
1206 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1209 panic("Failed to manage %d range (%#jx-%#jx): %d",
1210 type, (uintmax_t)start, (uintmax_t)end, error);
1212 case MPCT_EXTENTRY_CBASM:
1213 cbasm = (cbasm_entry_ptr)entry;
1214 if (cbasm->bus_id != args->bus)
1216 switch (cbasm->predefined_range) {
1217 case CBASMENTRY_RANGE_ISA_IO:
1218 flagp = &args->sc->sc_decodes_isa_io;
1221 case CBASMENTRY_RANGE_VGA_IO:
1222 flagp = &args->sc->sc_decodes_vga_io;
1227 "MPTable: Unknown compatiblity address space range for bus %u: %d\n",
1228 cbasm->bus_id, cbasm->predefined_range);
1233 "MPTable: Duplicate compatibility %s range for bus %u\n",
1234 name, cbasm->bus_id);
1235 switch (cbasm->address_mod) {
1236 case CBASMENTRY_ADDRESS_MOD_ADD:
1239 device_printf(args->dev, "decoding %s ports\n",
1242 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1245 device_printf(args->dev,
1246 "not decoding %s ports\n", name);
1250 "MPTable: Unknown compatibility address space modifier: %u\n",
1251 cbasm->address_mod);
1259 mptable_pci_host_res_init(device_t pcib)
1261 struct host_res_args args;
1263 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1264 args.bus = pci_get_bus(pcib) + pci0;
1266 args.sc = device_get_softc(pcib);
1267 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1268 panic("failed to init hostb resources");
1269 mptable_walk_extended_table(mptable_host_res_handler, &args);