2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
42 #include <vm/vm_param.h>
45 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcib_private.h>
49 #include <x86/apicreg.h>
50 #include <x86/mptable.h>
51 #include <machine/frame.h>
52 #include <machine/intr_machdep.h>
53 #include <x86/apicvar.h>
54 #include <machine/md_var.h>
56 #include <machine/resource.h>
58 #include <machine/specialreg.h>
60 /* string defined by the Intel MP Spec as identifying the MP table */
61 #define MP_SIG 0x5f504d5f /* _MP_ */
64 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
66 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
70 #define BIOS_BASE (0xe8000)
71 #define BIOS_SIZE (0x18000)
73 #define BIOS_BASE (0xf0000)
74 #define BIOS_SIZE (0x10000)
76 #define BIOS_COUNT (BIOS_SIZE/4)
78 typedef void mptable_entry_handler(u_char *entry, void *arg);
79 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
81 /* descriptions of MP table entries */
82 typedef struct BASETABLE_ENTRY {
88 static basetable_entry basetable_entry_types[] =
97 typedef struct BUSDATA {
99 enum busTypes bus_type;
102 typedef struct INTDATA {
112 typedef struct BUSTYPENAME {
117 /* From MP spec v1.4, table 4-8. */
118 static bus_type_name bus_type_table[] =
120 {UNKNOWN_BUSTYPE, "CBUS "},
121 {UNKNOWN_BUSTYPE, "CBUSII"},
123 {UNKNOWN_BUSTYPE, "FUTURE"},
124 {UNKNOWN_BUSTYPE, "INTERN"},
126 {UNKNOWN_BUSTYPE, "MBI "},
127 {UNKNOWN_BUSTYPE, "MBII "},
129 {UNKNOWN_BUSTYPE, "MPI "},
130 {UNKNOWN_BUSTYPE, "MPSA "},
131 {UNKNOWN_BUSTYPE, "NUBUS "},
133 {UNKNOWN_BUSTYPE, "PCMCIA"},
134 {UNKNOWN_BUSTYPE, "TC "},
135 {UNKNOWN_BUSTYPE, "VL "},
136 {UNKNOWN_BUSTYPE, "VME "},
137 {UNKNOWN_BUSTYPE, "XPRESS"}
140 /* From MP spec v1.4, table 5-1. */
141 static int default_data[7][5] =
143 /* nbus, id0, type0, id1, type1 */
144 {1, 0, ISA, 255, NOBUS},
145 {1, 0, EISA, 255, NOBUS},
146 {1, 0, EISA, 255, NOBUS},
147 {1, 0, MCA, 255, NOBUS},
149 {2, 0, EISA, 1, PCI},
153 struct pci_probe_table_args {
158 struct pci_route_interrupt_args {
159 u_char bus; /* Source bus. */
160 u_char irq; /* Source slot:pin. */
161 int vector; /* Return value. */
164 static mpfps_t mpfps;
166 static ext_entry_ptr mpet;
167 static void *ioapics[MAX_APIC_ID + 1];
168 static bus_datum *busses;
169 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
170 static int pci0 = -1;
172 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
174 static enum intr_polarity conforming_polarity(u_char src_bus,
176 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
177 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
178 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
179 static int lookup_bus_type(char *name);
180 static void mptable_count_items(void);
181 static void mptable_count_items_handler(u_char *entry, void *arg);
182 #ifdef MPTABLE_FORCE_HTT
183 static void mptable_hyperthread_fixup(u_int id_mask);
185 static void mptable_parse_apics_and_busses(void);
186 static void mptable_parse_apics_and_busses_handler(u_char *entry,
188 static void mptable_parse_default_config_ints(void);
189 static void mptable_parse_ints(void);
190 static void mptable_parse_ints_handler(u_char *entry, void *arg);
191 static void mptable_parse_io_int(int_entry_ptr intr);
192 static void mptable_parse_local_int(int_entry_ptr intr);
193 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
194 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
195 static void mptable_pci_setup(void);
196 static int mptable_probe(void);
197 static int mptable_probe_cpus(void);
198 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
199 static void mptable_register(void *dummy);
200 static int mptable_setup_local(void);
201 static int mptable_setup_io(void);
203 static void mptable_walk_extended_table(
204 mptable_extended_entry_handler *handler, void *arg);
206 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
207 static int search_for_sig(u_int32_t target, int count);
209 static struct apic_enumerator mptable_enumerator = {
218 * look for the MP spec signature
222 search_for_sig(u_int32_t target, int count)
225 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
227 for (x = 0; x < count; x += 4)
228 if (addr[x] == MP_SIG)
229 /* make array index a byte index */
230 return (target + (x * sizeof(u_int32_t)));
235 lookup_bus_type(char *name)
239 for (x = 0; x < MAX_BUSTYPE; ++x)
240 if (strncmp(bus_type_table[x].name, name, 6) == 0)
241 return (bus_type_table[x].type);
243 return (UNKNOWN_BUSTYPE);
247 * Look for an Intel MP spec table (ie, SMP capable hardware).
256 /* see if EBDA exists */
257 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
258 /* search first 1K of EBDA */
259 target = (u_int32_t) (segment << 4);
260 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
263 /* last 1K of base memory, effective 'top of base' passed in */
264 target = (u_int32_t) ((basemem * 1024) - 0x400);
265 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
269 /* search the BIOS */
270 target = (u_int32_t) BIOS_BASE;
271 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
278 mpfps = (mpfps_t)(KERNBASE + x);
280 /* Map in the configuration table if it exists. */
281 if (mpfps->config_type != 0) {
284 "MP Table version 1.%d found using Default Configuration %d\n",
285 mpfps->spec_rev, mpfps->config_type);
286 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
288 "MP Table Default Configuration %d is unsupported\n",
294 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
295 printf("%s: Unable to map MP Configuration Table\n",
299 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
300 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
302 printf("%s: Unable to map end of MP Config Table\n",
306 if (mpct->extended_table_length != 0 &&
307 mpct->extended_table_length + mpct->base_table_length +
308 (uintptr_t)mpfps->pap < 1024 * 1024)
309 mpet = (ext_entry_ptr)((char *)mpct +
310 mpct->base_table_length);
311 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
312 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
313 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
314 __func__, mpct->signature[0], mpct->signature[1],
315 mpct->signature[2], mpct->signature[3]);
320 "MP Configuration Table version 1.%d found at %p\n",
321 mpct->spec_rev, mpct);
328 * Run through the MP table enumerating CPUs.
331 mptable_probe_cpus(void)
335 /* Is this a pre-defined config? */
336 if (mpfps->config_type != 0) {
341 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
342 #ifdef MPTABLE_FORCE_HTT
343 mptable_hyperthread_fixup(cpu_mask);
350 * Initialize the local APIC on the BSP.
353 mptable_setup_local(void)
357 /* Is this a pre-defined config? */
358 printf("MPTable: <");
359 if (mpfps->config_type != 0) {
360 addr = DEFAULT_APIC_BASE;
361 printf("Default Configuration %d", mpfps->config_type);
363 addr = mpct->apic_address;
364 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
365 (int)sizeof(mpct->product_id), mpct->product_id);
373 * Run through the MP table enumerating I/O APICs.
376 mptable_setup_io(void)
381 /* First, we count individual items and allocate arrays. */
382 mptable_count_items();
383 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
385 for (i = 0; i <= mptable_maxbusid; i++)
386 busses[i].bus_type = NOBUS;
388 /* Second, we run through adding I/O APIC's and busses. */
389 mptable_parse_apics_and_busses();
391 /* Third, we run through the table tweaking interrupt sources. */
392 mptable_parse_ints();
394 /* Fourth, we register all the I/O APIC's. */
395 for (i = 0; i <= MAX_APIC_ID; i++)
396 if (ioapics[i] != NULL)
397 ioapic_register(ioapics[i]);
399 /* Fifth, we setup data structures to handle PCI interrupt routing. */
402 /* Finally, we throw the switch to enable the I/O APIC's. */
403 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
404 outb(0x22, 0x70); /* select IMCR */
405 byte = inb(0x23); /* current contents */
406 byte |= 0x01; /* mask external INTR */
407 outb(0x23, byte); /* disconnect 8259s/NMI */
414 mptable_register(void *dummy __unused)
417 apic_register_enumerator(&mptable_enumerator);
419 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, mptable_register,
423 * Call the handler routine for each entry in the MP config base table.
426 mptable_walk_table(mptable_entry_handler *handler, void *arg)
431 entry = (u_char *)(mpct + 1);
432 for (i = 0; i < mpct->entry_count; i++) {
434 case MPCT_ENTRY_PROCESSOR:
435 case MPCT_ENTRY_IOAPIC:
438 case MPCT_ENTRY_LOCAL_INT:
441 panic("%s: Unknown MP Config Entry %d\n", __func__,
445 entry += basetable_entry_types[*entry].length;
451 * Call the handler routine for each entry in the MP config extended
455 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
457 ext_entry_ptr end, entry;
462 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
463 while (entry < end) {
465 entry = (ext_entry_ptr)((char *)entry + entry->length);
471 mptable_probe_cpus_handler(u_char *entry, void *arg)
477 case MPCT_ENTRY_PROCESSOR:
478 proc = (proc_entry_ptr)entry;
479 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
480 lapic_create(proc->apic_id, proc->cpu_flags &
482 if (proc->apic_id < MAX_LAPIC_ID) {
483 cpu_mask = (u_int *)arg;
484 *cpu_mask |= (1ul << proc->apic_id);
492 mptable_count_items_handler(u_char *entry, void *arg __unused)
494 io_apic_entry_ptr apic;
499 bus = (bus_entry_ptr)entry;
501 if (bus->bus_id > mptable_maxbusid)
502 mptable_maxbusid = bus->bus_id;
504 case MPCT_ENTRY_IOAPIC:
505 apic = (io_apic_entry_ptr)entry;
506 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
513 * Count items in the table.
516 mptable_count_items(void)
519 /* Is this a pre-defined config? */
520 if (mpfps->config_type != 0) {
521 mptable_nioapics = 1;
522 switch (mpfps->config_type) {
535 panic("Unknown pre-defined MP Table config type %d",
538 mptable_maxbusid = mptable_nbusses - 1;
540 mptable_walk_table(mptable_count_items_handler, NULL);
544 * Add a bus or I/O APIC from an entry in the table.
547 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
549 io_apic_entry_ptr apic;
551 enum busTypes bus_type;
557 bus = (bus_entry_ptr)entry;
558 bus_type = lookup_bus_type(bus->bus_type);
559 if (bus_type == UNKNOWN_BUSTYPE) {
560 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
561 for (i = 0; i < 6; i++)
562 printf("%c", bus->bus_type[i]);
565 busses[bus->bus_id].bus_id = bus->bus_id;
566 busses[bus->bus_id].bus_type = bus_type;
568 case MPCT_ENTRY_IOAPIC:
569 apic = (io_apic_entry_ptr)entry;
570 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
572 if (apic->apic_id > MAX_APIC_ID)
573 panic("%s: I/O APIC ID %d too high", __func__,
575 if (ioapics[apic->apic_id] != NULL)
576 panic("%s: Double APIC ID %d", __func__,
578 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
587 * Enumerate I/O APIC's and busses.
590 mptable_parse_apics_and_busses(void)
593 /* Is this a pre-defined config? */
594 if (mpfps->config_type != 0) {
595 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
596 busses[0].bus_id = 0;
597 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
598 if (mptable_nbusses > 1) {
599 busses[1].bus_id = 1;
601 default_data[mpfps->config_type - 1][4];
604 mptable_walk_table(mptable_parse_apics_and_busses_handler,
609 * Determine conforming polarity for a given bus type.
611 static enum intr_polarity
612 conforming_polarity(u_char src_bus, u_char src_bus_irq)
615 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
616 switch (busses[src_bus].bus_type) {
619 return (INTR_POLARITY_HIGH);
621 return (INTR_POLARITY_LOW);
623 panic("%s: unknown bus type %d", __func__,
624 busses[src_bus].bus_type);
629 * Determine conforming trigger for a given bus type.
631 static enum intr_trigger
632 conforming_trigger(u_char src_bus, u_char src_bus_irq)
635 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
636 switch (busses[src_bus].bus_type) {
640 return (elcr_read_trigger(src_bus_irq));
643 return (INTR_TRIGGER_EDGE);
645 return (INTR_TRIGGER_LEVEL);
648 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
649 KASSERT(elcr_found, ("Missing ELCR"));
650 return (elcr_read_trigger(src_bus_irq));
653 panic("%s: unknown bus type %d", __func__,
654 busses[src_bus].bus_type);
658 static enum intr_polarity
659 intentry_polarity(int_entry_ptr intr)
662 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
663 case INTENTRY_FLAGS_POLARITY_CONFORM:
664 return (conforming_polarity(intr->src_bus_id,
666 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
667 return (INTR_POLARITY_HIGH);
668 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
669 return (INTR_POLARITY_LOW);
671 panic("Bogus interrupt flags");
675 static enum intr_trigger
676 intentry_trigger(int_entry_ptr intr)
679 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
680 case INTENTRY_FLAGS_TRIGGER_CONFORM:
681 return (conforming_trigger(intr->src_bus_id,
683 case INTENTRY_FLAGS_TRIGGER_EDGE:
684 return (INTR_TRIGGER_EDGE);
685 case INTENTRY_FLAGS_TRIGGER_LEVEL:
686 return (INTR_TRIGGER_LEVEL);
688 panic("Bogus interrupt flags");
693 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
696 mptable_parse_io_int(int_entry_ptr intr)
701 apic_id = intr->dst_apic_id;
702 if (intr->dst_apic_id == 0xff) {
704 * An APIC ID of 0xff means that the interrupt is connected
705 * to the specified pin on all I/O APICs in the system. If
706 * there is only one I/O APIC, then use that APIC to route
707 * the interrupts. If there is more than one I/O APIC, then
710 if (mptable_nioapics == 1) {
712 while (ioapics[apic_id] == NULL)
716 "MPTable: Ignoring global interrupt entry for pin %d\n",
721 if (apic_id > MAX_APIC_ID) {
722 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
726 ioapic = ioapics[apic_id];
727 if (ioapic == NULL) {
729 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
733 pin = intr->dst_apic_int;
734 switch (intr->int_type) {
735 case INTENTRY_TYPE_INT:
736 switch (busses[intr->src_bus_id].bus_type) {
738 panic("interrupt from missing bus");
741 if (busses[intr->src_bus_id].bus_type == ISA)
742 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
744 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
745 if (intr->src_bus_irq == pin)
747 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
748 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
750 ioapic_disable_pin(ioapic, intr->src_bus_irq);
753 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
756 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
760 case INTENTRY_TYPE_NMI:
761 ioapic_set_nmi(ioapic, pin);
763 case INTENTRY_TYPE_SMI:
764 ioapic_set_smi(ioapic, pin);
766 case INTENTRY_TYPE_EXTINT:
767 ioapic_set_extint(ioapic, pin);
770 panic("%s: invalid interrupt entry type %d\n", __func__,
773 if (intr->int_type == INTENTRY_TYPE_INT ||
774 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
775 INTENTRY_FLAGS_TRIGGER_CONFORM)
776 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
777 if (intr->int_type == INTENTRY_TYPE_INT ||
778 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
779 INTENTRY_FLAGS_POLARITY_CONFORM)
780 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
784 * Parse an interrupt entry for a local APIC LVT pin.
787 mptable_parse_local_int(int_entry_ptr intr)
791 if (intr->dst_apic_id == 0xff)
792 apic_id = APIC_ID_ALL;
794 apic_id = intr->dst_apic_id;
795 if (intr->dst_apic_int == 0)
796 pin = APIC_LVT_LINT0;
798 pin = APIC_LVT_LINT1;
799 switch (intr->int_type) {
800 case INTENTRY_TYPE_INT:
803 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
804 intr->dst_apic_int, intr->src_bus_irq);
807 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
810 case INTENTRY_TYPE_NMI:
811 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
813 case INTENTRY_TYPE_SMI:
814 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
816 case INTENTRY_TYPE_EXTINT:
817 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
820 panic("%s: invalid interrupt entry type %d\n", __func__,
823 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
824 INTENTRY_FLAGS_TRIGGER_CONFORM)
825 lapic_set_lvt_triggermode(apic_id, pin,
826 intentry_trigger(intr));
827 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
828 INTENTRY_FLAGS_POLARITY_CONFORM)
829 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
833 * Parse interrupt entries.
836 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
840 intr = (int_entry_ptr)entry;
843 mptable_parse_io_int(intr);
845 case MPCT_ENTRY_LOCAL_INT:
846 mptable_parse_local_int(intr);
852 * Configure interrupt pins for a default configuration. For details see
853 * Table 5-2 in Section 5 of the MP Table specification.
856 mptable_parse_default_config_ints(void)
858 struct INTENTRY entry;
862 * All default configs route IRQs from bus 0 to the first 16 pins
863 * of the first I/O APIC with an APIC ID of 2.
865 entry.type = MPCT_ENTRY_INT;
866 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
867 INTENTRY_FLAGS_TRIGGER_CONFORM;
868 entry.src_bus_id = 0;
869 entry.dst_apic_id = 2;
871 /* Run through all 16 pins. */
872 for (pin = 0; pin < 16; pin++) {
873 entry.dst_apic_int = pin;
876 /* Pin 0 is an ExtINT pin. */
877 entry.int_type = INTENTRY_TYPE_EXTINT;
880 /* IRQ 0 is routed to pin 2. */
881 entry.int_type = INTENTRY_TYPE_INT;
882 entry.src_bus_irq = 0;
885 /* All other pins are identity mapped. */
886 entry.int_type = INTENTRY_TYPE_INT;
887 entry.src_bus_irq = pin;
890 mptable_parse_io_int(&entry);
893 /* Certain configs disable certain pins. */
894 if (mpfps->config_type == 7)
895 ioapic_disable_pin(ioapics[2], 0);
896 if (mpfps->config_type == 2) {
897 ioapic_disable_pin(ioapics[2], 2);
898 ioapic_disable_pin(ioapics[2], 13);
903 * Configure the interrupt pins
906 mptable_parse_ints(void)
909 /* Is this a pre-defined config? */
910 if (mpfps->config_type != 0) {
911 /* Configure LINT pins. */
912 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
914 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
916 /* Configure I/O APIC pins. */
917 mptable_parse_default_config_ints();
919 mptable_walk_table(mptable_parse_ints_handler, NULL);
922 #ifdef MPTABLE_FORCE_HTT
924 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
925 * that aren't already listed in the table.
927 * XXX: We assume that all of the physical CPUs in the
928 * system have the same number of logical CPUs.
930 * XXX: We assume that APIC ID's are allocated such that
931 * the APIC ID's for a physical processor are aligned
932 * with the number of logical CPU's in the processor.
935 mptable_hyperthread_fixup(u_int id_mask)
937 u_int i, id, logical_cpus;
939 /* Nothing to do if there is no HTT support. */
940 if ((cpu_feature & CPUID_HTT) == 0)
942 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
943 if (logical_cpus <= 1)
947 * For each APIC ID of a CPU that is set in the mask,
948 * scan the other candidate APIC ID's for this
949 * physical processor. If any of those ID's are
950 * already in the table, then kill the fixup.
952 for (id = 0; id <= MAX_LAPIC_ID; id++) {
953 if ((id_mask & 1 << id) == 0)
955 /* First, make sure we are on a logical_cpus boundary. */
956 if (id % logical_cpus != 0)
958 for (i = id + 1; i < id + logical_cpus; i++)
959 if ((id_mask & 1 << i) != 0)
964 * Ok, the ID's checked out, so perform the fixup by
965 * adding the logical CPUs.
967 while ((id = ffs(id_mask)) != 0) {
969 for (i = id + 1; i < id + logical_cpus; i++) {
972 "MPTable: Adding logical CPU %d from main CPU %d\n",
976 id_mask &= ~(1 << id);
979 #endif /* MPTABLE_FORCE_HTT */
982 * Support code for routing PCI interrupts using the MP Table.
985 mptable_pci_setup(void)
990 * Find the first pci bus and call it 0. Panic if pci0 is not
991 * bus zero and there are multiple PCI busses.
993 for (i = 0; i <= mptable_maxbusid; i++)
994 if (busses[i].bus_type == PCI) {
999 "MPTable contains multiple PCI busses but no PCI bus 0");
1004 mptable_pci_probe_table_handler(u_char *entry, void *arg)
1006 struct pci_probe_table_args *args;
1009 if (*entry != MPCT_ENTRY_INT)
1011 intr = (int_entry_ptr)entry;
1012 args = (struct pci_probe_table_args *)arg;
1013 KASSERT(args->bus <= mptable_maxbusid,
1014 ("bus %d is too big", args->bus));
1015 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1016 if (intr->src_bus_id == args->bus)
1021 mptable_pci_probe_table(int bus)
1023 struct pci_probe_table_args args;
1027 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1029 if (busses[pci0 + bus].bus_type != PCI)
1031 args.bus = pci0 + bus;
1033 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1034 if (args.found == 0)
1040 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1042 struct pci_route_interrupt_args *args;
1046 if (*entry != MPCT_ENTRY_INT)
1048 intr = (int_entry_ptr)entry;
1049 args = (struct pci_route_interrupt_args *)arg;
1050 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1053 /* Make sure the APIC maps to a known APIC. */
1054 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1055 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1058 * Look up the vector for this APIC / pin combination. If we
1059 * have previously matched an entry for this PCI IRQ but it
1060 * has the same vector as this entry, just return. Otherwise,
1061 * we use the vector for this APIC / pin combination.
1063 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1064 intr->dst_apic_int);
1065 if (args->vector == vector)
1067 KASSERT(args->vector == -1,
1068 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1069 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1071 args->vector = vector;
1075 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1077 struct pci_route_interrupt_args args;
1080 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1082 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1083 args.bus = pci_get_bus(dev) + pci0;
1084 slot = pci_get_slot(dev);
1087 * PCI interrupt entries in the MP Table encode both the slot and
1088 * pin into the IRQ with the pin being the two least significant
1089 * bits, the slot being the next five bits, and the most significant
1090 * bit being reserved.
1092 args.irq = slot << 2 | pin;
1094 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1095 if (args.vector < 0) {
1096 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1098 return (PCI_INVALID_IRQ);
1101 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1102 'A' + pin, args.vector);
1103 return (args.vector);
1107 struct host_res_args {
1108 struct mptable_hostb_softc *sc;
1114 * Initialize a Host-PCI bridge so it can restrict resource allocation
1115 * requests to the resources it actually decodes according to MP
1116 * config table extended entries.
1119 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1121 struct host_res_args *args;
1122 cbasm_entry_ptr cbasm;
1125 uint64_t start, end;
1126 int error, *flagp, flags, type;
1129 switch (entry->type) {
1130 case MPCT_EXTENTRY_SAS:
1131 sas = (sas_entry_ptr)entry;
1132 if (sas->bus_id != args->bus)
1134 switch (sas->address_type) {
1135 case SASENTRY_TYPE_IO:
1136 type = SYS_RES_IOPORT;
1139 case SASENTRY_TYPE_MEMORY:
1140 type = SYS_RES_MEMORY;
1143 case SASENTRY_TYPE_PREFETCH:
1144 type = SYS_RES_MEMORY;
1145 flags = RF_PREFETCHABLE;
1149 "MPTable: Unknown systems address space type for bus %u: %d\n",
1150 sas->bus_id, sas->address_type);
1153 start = sas->address_base;
1154 end = sas->address_base + sas->address_length - 1;
1156 if (start > ULONG_MAX) {
1157 device_printf(args->dev,
1158 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1159 type, (uintmax_t)start, (uintmax_t)end);
1162 if (end > ULONG_MAX) {
1163 device_printf(args->dev,
1164 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1165 type, (uintmax_t)start, (uintmax_t)end);
1169 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1172 panic("Failed to manage %d range (%#jx-%#jx): %d",
1173 type, (uintmax_t)start, (uintmax_t)end, error);
1175 case MPCT_EXTENTRY_CBASM:
1176 cbasm = (cbasm_entry_ptr)entry;
1177 if (cbasm->bus_id != args->bus)
1179 switch (cbasm->predefined_range) {
1180 case CBASMENTRY_RANGE_ISA_IO:
1181 flagp = &args->sc->sc_decodes_isa_io;
1184 case CBASMENTRY_RANGE_VGA_IO:
1185 flagp = &args->sc->sc_decodes_vga_io;
1190 "MPTable: Unknown compatiblity address space range for bus %u: %d\n",
1191 cbasm->bus_id, cbasm->predefined_range);
1196 "MPTable: Duplicate compatibility %s range for bus %u\n",
1197 name, cbasm->bus_id);
1198 switch (cbasm->address_mod) {
1199 case CBASMENTRY_ADDRESS_MOD_ADD:
1202 device_printf(args->dev, "decoding %s ports\n",
1205 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1208 device_printf(args->dev,
1209 "not decoding %s ports\n", name);
1213 "MPTable: Unknown compatibility address space modifier: %u\n",
1214 cbasm->address_mod);
1222 mptable_pci_host_res_init(device_t pcib)
1224 struct host_res_args args;
1226 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1227 args.bus = pci_get_bus(pcib) + pci0;
1229 args.sc = device_get_softc(pcib);
1230 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1231 panic("failed to init hostb resources");
1232 mptable_walk_extended_table(mptable_host_res_handler, &args);