2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
42 #include <vm/vm_param.h>
45 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcib_private.h>
49 #include <x86/apicreg.h>
50 #include <x86/mptable.h>
51 #include <machine/frame.h>
52 #include <machine/intr_machdep.h>
53 #include <x86/apicvar.h>
54 #include <machine/md_var.h>
56 #include <machine/resource.h>
58 #include <machine/specialreg.h>
60 /* string defined by the Intel MP Spec as identifying the MP table */
61 #define MP_SIG 0x5f504d5f /* _MP_ */
64 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
66 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
69 #define BIOS_BASE (0xf0000)
70 #define BIOS_SIZE (0x10000)
71 #define BIOS_COUNT (BIOS_SIZE/4)
73 typedef void mptable_entry_handler(u_char *entry, void *arg);
74 typedef void mptable_extended_entry_handler(ext_entry_ptr entry, void *arg);
76 /* descriptions of MP table entries */
77 typedef struct BASETABLE_ENTRY {
83 static basetable_entry basetable_entry_types[] =
92 typedef struct BUSDATA {
94 enum busTypes bus_type;
97 typedef struct INTDATA {
107 typedef struct BUSTYPENAME {
112 /* From MP spec v1.4, table 4-8. */
113 static bus_type_name bus_type_table[] =
115 {UNKNOWN_BUSTYPE, "CBUS "},
116 {UNKNOWN_BUSTYPE, "CBUSII"},
118 {UNKNOWN_BUSTYPE, "FUTURE"},
119 {UNKNOWN_BUSTYPE, "INTERN"},
121 {UNKNOWN_BUSTYPE, "MBI "},
122 {UNKNOWN_BUSTYPE, "MBII "},
124 {UNKNOWN_BUSTYPE, "MPI "},
125 {UNKNOWN_BUSTYPE, "MPSA "},
126 {UNKNOWN_BUSTYPE, "NUBUS "},
128 {UNKNOWN_BUSTYPE, "PCMCIA"},
129 {UNKNOWN_BUSTYPE, "TC "},
130 {UNKNOWN_BUSTYPE, "VL "},
131 {UNKNOWN_BUSTYPE, "VME "},
132 {UNKNOWN_BUSTYPE, "XPRESS"}
135 /* From MP spec v1.4, table 5-1. */
136 static int default_data[7][5] =
138 /* nbus, id0, type0, id1, type1 */
139 {1, 0, ISA, 255, NOBUS},
140 {1, 0, EISA, 255, NOBUS},
141 {1, 0, EISA, 255, NOBUS},
142 {1, 0, MCA, 255, NOBUS},
144 {2, 0, EISA, 1, PCI},
148 struct pci_probe_table_args {
153 struct pci_route_interrupt_args {
154 u_char bus; /* Source bus. */
155 u_char irq; /* Source slot:pin. */
156 int vector; /* Return value. */
159 static mpfps_t mpfps;
161 static ext_entry_ptr mpet;
162 static void *ioapics[MAX_APIC_ID + 1];
163 static bus_datum *busses;
164 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
165 static int pci0 = -1;
167 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
169 static enum intr_polarity conforming_polarity(u_char src_bus,
171 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
172 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
173 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
174 static int lookup_bus_type(char *name);
175 static void mptable_count_items(void);
176 static void mptable_count_items_handler(u_char *entry, void *arg);
177 #ifdef MPTABLE_FORCE_HTT
178 static void mptable_hyperthread_fixup(u_int id_mask);
180 static void mptable_parse_apics_and_busses(void);
181 static void mptable_parse_apics_and_busses_handler(u_char *entry,
183 static void mptable_parse_default_config_ints(void);
184 static void mptable_parse_ints(void);
185 static void mptable_parse_ints_handler(u_char *entry, void *arg);
186 static void mptable_parse_io_int(int_entry_ptr intr);
187 static void mptable_parse_local_int(int_entry_ptr intr);
188 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
189 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
190 static void mptable_pci_setup(void);
191 static int mptable_probe(void);
192 static int mptable_probe_cpus(void);
193 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
194 static void mptable_register(void *dummy);
195 static int mptable_setup_local(void);
196 static int mptable_setup_io(void);
198 static void mptable_walk_extended_table(
199 mptable_extended_entry_handler *handler, void *arg);
201 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
202 static int search_for_sig(u_int32_t target, int count);
204 static struct apic_enumerator mptable_enumerator = {
213 * look for the MP spec signature
217 search_for_sig(u_int32_t target, int count)
220 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
222 for (x = 0; x < count; x += 4)
223 if (addr[x] == MP_SIG)
224 /* make array index a byte index */
225 return (target + (x * sizeof(u_int32_t)));
230 lookup_bus_type(char *name)
234 for (x = 0; x < MAX_BUSTYPE; ++x)
235 if (strncmp(bus_type_table[x].name, name, 6) == 0)
236 return (bus_type_table[x].type);
238 return (UNKNOWN_BUSTYPE);
242 * Look for an Intel MP spec table (ie, SMP capable hardware).
251 /* see if EBDA exists */
252 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
253 /* search first 1K of EBDA */
254 target = (u_int32_t) (segment << 4);
255 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
258 /* last 1K of base memory, effective 'top of base' passed in */
259 target = (u_int32_t) ((basemem * 1024) - 0x400);
260 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
264 /* search the BIOS */
265 target = (u_int32_t) BIOS_BASE;
266 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
273 mpfps = (mpfps_t)(KERNBASE + x);
275 /* Map in the configuration table if it exists. */
276 if (mpfps->config_type != 0) {
279 "MP Table version 1.%d found using Default Configuration %d\n",
280 mpfps->spec_rev, mpfps->config_type);
281 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
283 "MP Table Default Configuration %d is unsupported\n",
289 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
290 printf("%s: Unable to map MP Configuration Table\n",
294 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
295 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
297 printf("%s: Unable to map end of MP Config Table\n",
301 if (mpct->extended_table_length != 0 &&
302 mpct->extended_table_length + mpct->base_table_length +
303 (uintptr_t)mpfps->pap < 1024 * 1024)
304 mpet = (ext_entry_ptr)((char *)mpct +
305 mpct->base_table_length);
306 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
307 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
308 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
309 __func__, mpct->signature[0], mpct->signature[1],
310 mpct->signature[2], mpct->signature[3]);
315 "MP Configuration Table version 1.%d found at %p\n",
316 mpct->spec_rev, mpct);
323 * Run through the MP table enumerating CPUs.
326 mptable_probe_cpus(void)
330 /* Is this a pre-defined config? */
331 if (mpfps->config_type != 0) {
336 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
337 #ifdef MPTABLE_FORCE_HTT
338 mptable_hyperthread_fixup(cpu_mask);
345 * Initialize the local APIC on the BSP.
348 mptable_setup_local(void)
352 /* Is this a pre-defined config? */
353 printf("MPTable: <");
354 if (mpfps->config_type != 0) {
355 addr = DEFAULT_APIC_BASE;
356 printf("Default Configuration %d", mpfps->config_type);
358 addr = mpct->apic_address;
359 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
360 (int)sizeof(mpct->product_id), mpct->product_id);
368 * Run through the MP table enumerating I/O APICs.
371 mptable_setup_io(void)
376 /* First, we count individual items and allocate arrays. */
377 mptable_count_items();
378 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
380 for (i = 0; i <= mptable_maxbusid; i++)
381 busses[i].bus_type = NOBUS;
383 /* Second, we run through adding I/O APIC's and buses. */
384 mptable_parse_apics_and_busses();
386 /* Third, we run through the table tweaking interrupt sources. */
387 mptable_parse_ints();
389 /* Fourth, we register all the I/O APIC's. */
390 for (i = 0; i <= MAX_APIC_ID; i++)
391 if (ioapics[i] != NULL)
392 ioapic_register(ioapics[i]);
394 /* Fifth, we setup data structures to handle PCI interrupt routing. */
397 /* Finally, we throw the switch to enable the I/O APIC's. */
398 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
399 outb(0x22, 0x70); /* select IMCR */
400 byte = inb(0x23); /* current contents */
401 byte |= 0x01; /* mask external INTR */
402 outb(0x23, byte); /* disconnect 8259s/NMI */
409 mptable_register(void *dummy __unused)
412 apic_register_enumerator(&mptable_enumerator);
414 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, mptable_register,
418 * Call the handler routine for each entry in the MP config base table.
421 mptable_walk_table(mptable_entry_handler *handler, void *arg)
426 entry = (u_char *)(mpct + 1);
427 for (i = 0; i < mpct->entry_count; i++) {
429 case MPCT_ENTRY_PROCESSOR:
430 case MPCT_ENTRY_IOAPIC:
433 case MPCT_ENTRY_LOCAL_INT:
436 panic("%s: Unknown MP Config Entry %d\n", __func__,
440 entry += basetable_entry_types[*entry].length;
446 * Call the handler routine for each entry in the MP config extended
450 mptable_walk_extended_table(mptable_extended_entry_handler *handler, void *arg)
452 ext_entry_ptr end, entry;
457 end = (ext_entry_ptr)((char *)mpet + mpct->extended_table_length);
458 while (entry < end) {
460 entry = (ext_entry_ptr)((char *)entry + entry->length);
466 mptable_probe_cpus_handler(u_char *entry, void *arg)
472 case MPCT_ENTRY_PROCESSOR:
473 proc = (proc_entry_ptr)entry;
474 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
475 lapic_create(proc->apic_id, proc->cpu_flags &
477 if (proc->apic_id < MAX_LAPIC_ID) {
478 cpu_mask = (u_int *)arg;
479 *cpu_mask |= (1ul << proc->apic_id);
487 mptable_count_items_handler(u_char *entry, void *arg __unused)
489 io_apic_entry_ptr apic;
494 bus = (bus_entry_ptr)entry;
496 if (bus->bus_id > mptable_maxbusid)
497 mptable_maxbusid = bus->bus_id;
499 case MPCT_ENTRY_IOAPIC:
500 apic = (io_apic_entry_ptr)entry;
501 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
508 * Count items in the table.
511 mptable_count_items(void)
514 /* Is this a pre-defined config? */
515 if (mpfps->config_type != 0) {
516 mptable_nioapics = 1;
517 switch (mpfps->config_type) {
530 panic("Unknown pre-defined MP Table config type %d",
533 mptable_maxbusid = mptable_nbusses - 1;
535 mptable_walk_table(mptable_count_items_handler, NULL);
539 * Add a bus or I/O APIC from an entry in the table.
542 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
544 io_apic_entry_ptr apic;
546 enum busTypes bus_type;
552 bus = (bus_entry_ptr)entry;
553 bus_type = lookup_bus_type(bus->bus_type);
554 if (bus_type == UNKNOWN_BUSTYPE) {
555 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
556 for (i = 0; i < 6; i++)
557 printf("%c", bus->bus_type[i]);
560 busses[bus->bus_id].bus_id = bus->bus_id;
561 busses[bus->bus_id].bus_type = bus_type;
563 case MPCT_ENTRY_IOAPIC:
564 apic = (io_apic_entry_ptr)entry;
565 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
567 if (apic->apic_id > MAX_APIC_ID)
568 panic("%s: I/O APIC ID %d too high", __func__,
570 if (ioapics[apic->apic_id] != NULL)
571 panic("%s: Double APIC ID %d", __func__,
573 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
582 * Enumerate I/O APIC's and buses.
585 mptable_parse_apics_and_busses(void)
588 /* Is this a pre-defined config? */
589 if (mpfps->config_type != 0) {
590 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
591 busses[0].bus_id = 0;
592 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
593 if (mptable_nbusses > 1) {
594 busses[1].bus_id = 1;
596 default_data[mpfps->config_type - 1][4];
599 mptable_walk_table(mptable_parse_apics_and_busses_handler,
604 * Determine conforming polarity for a given bus type.
606 static enum intr_polarity
607 conforming_polarity(u_char src_bus, u_char src_bus_irq)
610 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
611 switch (busses[src_bus].bus_type) {
614 return (INTR_POLARITY_HIGH);
616 return (INTR_POLARITY_LOW);
618 panic("%s: unknown bus type %d", __func__,
619 busses[src_bus].bus_type);
624 * Determine conforming trigger for a given bus type.
626 static enum intr_trigger
627 conforming_trigger(u_char src_bus, u_char src_bus_irq)
630 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
631 switch (busses[src_bus].bus_type) {
634 return (elcr_read_trigger(src_bus_irq));
636 return (INTR_TRIGGER_EDGE);
638 return (INTR_TRIGGER_LEVEL);
641 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
642 KASSERT(elcr_found, ("Missing ELCR"));
643 return (elcr_read_trigger(src_bus_irq));
646 panic("%s: unknown bus type %d", __func__,
647 busses[src_bus].bus_type);
651 static enum intr_polarity
652 intentry_polarity(int_entry_ptr intr)
655 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
656 case INTENTRY_FLAGS_POLARITY_CONFORM:
657 return (conforming_polarity(intr->src_bus_id,
659 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
660 return (INTR_POLARITY_HIGH);
661 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
662 return (INTR_POLARITY_LOW);
664 panic("Bogus interrupt flags");
668 static enum intr_trigger
669 intentry_trigger(int_entry_ptr intr)
672 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
673 case INTENTRY_FLAGS_TRIGGER_CONFORM:
674 return (conforming_trigger(intr->src_bus_id,
676 case INTENTRY_FLAGS_TRIGGER_EDGE:
677 return (INTR_TRIGGER_EDGE);
678 case INTENTRY_FLAGS_TRIGGER_LEVEL:
679 return (INTR_TRIGGER_LEVEL);
681 panic("Bogus interrupt flags");
686 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
689 mptable_parse_io_int(int_entry_ptr intr)
694 apic_id = intr->dst_apic_id;
695 if (intr->dst_apic_id == 0xff) {
697 * An APIC ID of 0xff means that the interrupt is connected
698 * to the specified pin on all I/O APICs in the system. If
699 * there is only one I/O APIC, then use that APIC to route
700 * the interrupts. If there is more than one I/O APIC, then
703 if (mptable_nioapics == 1) {
705 while (ioapics[apic_id] == NULL)
709 "MPTable: Ignoring global interrupt entry for pin %d\n",
714 if (apic_id > MAX_APIC_ID) {
715 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
719 ioapic = ioapics[apic_id];
720 if (ioapic == NULL) {
722 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
726 pin = intr->dst_apic_int;
727 switch (intr->int_type) {
728 case INTENTRY_TYPE_INT:
729 switch (busses[intr->src_bus_id].bus_type) {
731 panic("interrupt from missing bus");
734 if (busses[intr->src_bus_id].bus_type == ISA)
735 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
737 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
738 if (intr->src_bus_irq == pin)
740 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
741 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
743 ioapic_disable_pin(ioapic, intr->src_bus_irq);
746 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
749 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
753 case INTENTRY_TYPE_NMI:
754 ioapic_set_nmi(ioapic, pin);
756 case INTENTRY_TYPE_SMI:
757 ioapic_set_smi(ioapic, pin);
759 case INTENTRY_TYPE_EXTINT:
760 ioapic_set_extint(ioapic, pin);
763 panic("%s: invalid interrupt entry type %d\n", __func__,
766 if (intr->int_type == INTENTRY_TYPE_INT ||
767 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
768 INTENTRY_FLAGS_TRIGGER_CONFORM)
769 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
770 if (intr->int_type == INTENTRY_TYPE_INT ||
771 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
772 INTENTRY_FLAGS_POLARITY_CONFORM)
773 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
777 * Parse an interrupt entry for a local APIC LVT pin.
780 mptable_parse_local_int(int_entry_ptr intr)
784 if (intr->dst_apic_id == 0xff)
785 apic_id = APIC_ID_ALL;
787 apic_id = intr->dst_apic_id;
788 if (intr->dst_apic_int == 0)
789 pin = APIC_LVT_LINT0;
791 pin = APIC_LVT_LINT1;
792 switch (intr->int_type) {
793 case INTENTRY_TYPE_INT:
796 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
797 intr->dst_apic_int, intr->src_bus_irq);
800 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
803 case INTENTRY_TYPE_NMI:
804 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
806 case INTENTRY_TYPE_SMI:
807 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
809 case INTENTRY_TYPE_EXTINT:
810 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
813 panic("%s: invalid interrupt entry type %d\n", __func__,
816 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
817 INTENTRY_FLAGS_TRIGGER_CONFORM)
818 lapic_set_lvt_triggermode(apic_id, pin,
819 intentry_trigger(intr));
820 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
821 INTENTRY_FLAGS_POLARITY_CONFORM)
822 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
826 * Parse interrupt entries.
829 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
833 intr = (int_entry_ptr)entry;
836 mptable_parse_io_int(intr);
838 case MPCT_ENTRY_LOCAL_INT:
839 mptable_parse_local_int(intr);
845 * Configure interrupt pins for a default configuration. For details see
846 * Table 5-2 in Section 5 of the MP Table specification.
849 mptable_parse_default_config_ints(void)
851 struct INTENTRY entry;
855 * All default configs route IRQs from bus 0 to the first 16 pins
856 * of the first I/O APIC with an APIC ID of 2.
858 entry.type = MPCT_ENTRY_INT;
859 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
860 INTENTRY_FLAGS_TRIGGER_CONFORM;
861 entry.src_bus_id = 0;
862 entry.dst_apic_id = 2;
864 /* Run through all 16 pins. */
865 for (pin = 0; pin < 16; pin++) {
866 entry.dst_apic_int = pin;
869 /* Pin 0 is an ExtINT pin. */
870 entry.int_type = INTENTRY_TYPE_EXTINT;
873 /* IRQ 0 is routed to pin 2. */
874 entry.int_type = INTENTRY_TYPE_INT;
875 entry.src_bus_irq = 0;
878 /* All other pins are identity mapped. */
879 entry.int_type = INTENTRY_TYPE_INT;
880 entry.src_bus_irq = pin;
883 mptable_parse_io_int(&entry);
886 /* Certain configs disable certain pins. */
887 if (mpfps->config_type == 7)
888 ioapic_disable_pin(ioapics[2], 0);
889 if (mpfps->config_type == 2) {
890 ioapic_disable_pin(ioapics[2], 2);
891 ioapic_disable_pin(ioapics[2], 13);
896 * Configure the interrupt pins
899 mptable_parse_ints(void)
902 /* Is this a pre-defined config? */
903 if (mpfps->config_type != 0) {
904 /* Configure LINT pins. */
905 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT0,
907 lapic_set_lvt_mode(APIC_ID_ALL, APIC_LVT_LINT1, APIC_LVT_DM_NMI);
909 /* Configure I/O APIC pins. */
910 mptable_parse_default_config_ints();
912 mptable_walk_table(mptable_parse_ints_handler, NULL);
915 #ifdef MPTABLE_FORCE_HTT
917 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
918 * that aren't already listed in the table.
920 * XXX: We assume that all of the physical CPUs in the
921 * system have the same number of logical CPUs.
923 * XXX: We assume that APIC ID's are allocated such that
924 * the APIC ID's for a physical processor are aligned
925 * with the number of logical CPU's in the processor.
928 mptable_hyperthread_fixup(u_int id_mask)
930 u_int i, id, logical_cpus;
932 /* Nothing to do if there is no HTT support. */
933 if ((cpu_feature & CPUID_HTT) == 0)
935 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
936 if (logical_cpus <= 1)
940 * For each APIC ID of a CPU that is set in the mask,
941 * scan the other candidate APIC ID's for this
942 * physical processor. If any of those ID's are
943 * already in the table, then kill the fixup.
945 for (id = 0; id <= MAX_LAPIC_ID; id++) {
946 if ((id_mask & 1 << id) == 0)
948 /* First, make sure we are on a logical_cpus boundary. */
949 if (id % logical_cpus != 0)
951 for (i = id + 1; i < id + logical_cpus; i++)
952 if ((id_mask & 1 << i) != 0)
957 * Ok, the ID's checked out, so perform the fixup by
958 * adding the logical CPUs.
960 while ((id = ffs(id_mask)) != 0) {
962 for (i = id + 1; i < id + logical_cpus; i++) {
965 "MPTable: Adding logical CPU %d from main CPU %d\n",
969 id_mask &= ~(1 << id);
972 #endif /* MPTABLE_FORCE_HTT */
975 * Support code for routing PCI interrupts using the MP Table.
978 mptable_pci_setup(void)
983 * Find the first pci bus and call it 0. Panic if pci0 is not
984 * bus zero and there are multiple PCI buses.
986 for (i = 0; i <= mptable_maxbusid; i++)
987 if (busses[i].bus_type == PCI) {
992 "MPTable contains multiple PCI buses but no PCI bus 0");
997 mptable_pci_probe_table_handler(u_char *entry, void *arg)
999 struct pci_probe_table_args *args;
1002 if (*entry != MPCT_ENTRY_INT)
1004 intr = (int_entry_ptr)entry;
1005 args = (struct pci_probe_table_args *)arg;
1006 KASSERT(args->bus <= mptable_maxbusid,
1007 ("bus %d is too big", args->bus));
1008 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
1009 if (intr->src_bus_id == args->bus)
1014 mptable_pci_probe_table(int bus)
1016 struct pci_probe_table_args args;
1020 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
1022 if (busses[pci0 + bus].bus_type != PCI)
1024 args.bus = pci0 + bus;
1026 mptable_walk_table(mptable_pci_probe_table_handler, &args);
1027 if (args.found == 0)
1033 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
1035 struct pci_route_interrupt_args *args;
1039 if (*entry != MPCT_ENTRY_INT)
1041 intr = (int_entry_ptr)entry;
1042 args = (struct pci_route_interrupt_args *)arg;
1043 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1046 /* Make sure the APIC maps to a known APIC. */
1047 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1048 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1051 * Look up the vector for this APIC / pin combination. If we
1052 * have previously matched an entry for this PCI IRQ but it
1053 * has the same vector as this entry, just return. Otherwise,
1054 * we use the vector for this APIC / pin combination.
1056 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1057 intr->dst_apic_int);
1058 if (args->vector == vector)
1060 KASSERT(args->vector == -1,
1061 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1062 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1064 args->vector = vector;
1068 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1070 struct pci_route_interrupt_args args;
1073 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1075 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1076 args.bus = pci_get_bus(dev) + pci0;
1077 slot = pci_get_slot(dev);
1080 * PCI interrupt entries in the MP Table encode both the slot and
1081 * pin into the IRQ with the pin being the two least significant
1082 * bits, the slot being the next five bits, and the most significant
1083 * bit being reserved.
1085 args.irq = slot << 2 | pin;
1087 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1088 if (args.vector < 0) {
1089 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1091 return (PCI_INVALID_IRQ);
1094 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1095 'A' + pin, args.vector);
1096 return (args.vector);
1100 struct host_res_args {
1101 struct mptable_hostb_softc *sc;
1107 * Initialize a Host-PCI bridge so it can restrict resource allocation
1108 * requests to the resources it actually decodes according to MP
1109 * config table extended entries.
1112 mptable_host_res_handler(ext_entry_ptr entry, void *arg)
1114 struct host_res_args *args;
1115 cbasm_entry_ptr cbasm;
1118 uint64_t start, end;
1119 int error, *flagp, flags, type;
1122 switch (entry->type) {
1123 case MPCT_EXTENTRY_SAS:
1124 sas = (sas_entry_ptr)entry;
1125 if (sas->bus_id != args->bus)
1127 switch (sas->address_type) {
1128 case SASENTRY_TYPE_IO:
1129 type = SYS_RES_IOPORT;
1132 case SASENTRY_TYPE_MEMORY:
1133 type = SYS_RES_MEMORY;
1136 case SASENTRY_TYPE_PREFETCH:
1137 type = SYS_RES_MEMORY;
1138 flags = RF_PREFETCHABLE;
1142 "MPTable: Unknown systems address space type for bus %u: %d\n",
1143 sas->bus_id, sas->address_type);
1146 start = sas->address_base;
1147 end = sas->address_base + sas->address_length - 1;
1149 if (start > ULONG_MAX) {
1150 device_printf(args->dev,
1151 "Ignoring %d range above 4GB (%#jx-%#jx)\n",
1152 type, (uintmax_t)start, (uintmax_t)end);
1155 if (end > ULONG_MAX) {
1156 device_printf(args->dev,
1157 "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
1158 type, (uintmax_t)start, (uintmax_t)end);
1162 error = pcib_host_res_decodes(&args->sc->sc_host_res, type,
1165 panic("Failed to manage %d range (%#jx-%#jx): %d",
1166 type, (uintmax_t)start, (uintmax_t)end, error);
1168 case MPCT_EXTENTRY_CBASM:
1169 cbasm = (cbasm_entry_ptr)entry;
1170 if (cbasm->bus_id != args->bus)
1172 switch (cbasm->predefined_range) {
1173 case CBASMENTRY_RANGE_ISA_IO:
1174 flagp = &args->sc->sc_decodes_isa_io;
1177 case CBASMENTRY_RANGE_VGA_IO:
1178 flagp = &args->sc->sc_decodes_vga_io;
1183 "MPTable: Unknown compatiblity address space range for bus %u: %d\n",
1184 cbasm->bus_id, cbasm->predefined_range);
1189 "MPTable: Duplicate compatibility %s range for bus %u\n",
1190 name, cbasm->bus_id);
1191 switch (cbasm->address_mod) {
1192 case CBASMENTRY_ADDRESS_MOD_ADD:
1195 device_printf(args->dev, "decoding %s ports\n",
1198 case CBASMENTRY_ADDRESS_MOD_SUBTRACT:
1201 device_printf(args->dev,
1202 "not decoding %s ports\n", name);
1206 "MPTable: Unknown compatibility address space modifier: %u\n",
1207 cbasm->address_mod);
1215 mptable_pci_host_res_init(device_t pcib)
1217 struct host_res_args args;
1219 KASSERT(pci0 != -1, ("do not know how to map PCI bus IDs"));
1220 args.bus = pci_get_bus(pcib) + pci0;
1222 args.sc = device_get_softc(pcib);
1223 if (pcib_host_res_init(pcib, &args.sc->sc_host_res) != 0)
1224 panic("failed to init hostb resources");
1225 mptable_walk_extended_table(mptable_host_res_handler, &args);