2 * Copyright (c) 2006 Yahoo!, Inc.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of the author nor the names of any co-contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * Support for PCI Message Signalled Interrupts (MSI). MSI interrupts on
33 * x86 are basically APIC messages that the northbridge delivers directly
34 * to the local APICs as if they had come from an I/O APIC.
37 #include <sys/cdefs.h>
38 __FBSDID("$FreeBSD$");
42 #include <sys/param.h>
44 #include <sys/kernel.h>
46 #include <sys/malloc.h>
47 #include <sys/mutex.h>
49 #include <sys/sysctl.h>
50 #include <sys/systm.h>
51 #include <x86/apicreg.h>
52 #include <machine/cputypes.h>
53 #include <machine/md_var.h>
54 #include <machine/frame.h>
55 #include <machine/intr_machdep.h>
56 #include <x86/apicvar.h>
57 #include <x86/iommu/iommu_intrmap.h>
58 #include <machine/specialreg.h>
59 #include <dev/pci/pcivar.h>
61 /* Fields in address for Intel MSI messages. */
62 #define MSI_INTEL_ADDR_DEST 0x000ff000
63 #define MSI_INTEL_ADDR_RH 0x00000008
64 # define MSI_INTEL_ADDR_RH_ON 0x00000008
65 # define MSI_INTEL_ADDR_RH_OFF 0x00000000
66 #define MSI_INTEL_ADDR_DM 0x00000004
67 # define MSI_INTEL_ADDR_DM_PHYSICAL 0x00000000
68 # define MSI_INTEL_ADDR_DM_LOGICAL 0x00000004
70 /* Fields in data for Intel MSI messages. */
71 #define MSI_INTEL_DATA_TRGRMOD IOART_TRGRMOD /* Trigger mode. */
72 # define MSI_INTEL_DATA_TRGREDG IOART_TRGREDG
73 # define MSI_INTEL_DATA_TRGRLVL IOART_TRGRLVL
74 #define MSI_INTEL_DATA_LEVEL 0x00004000 /* Polarity. */
75 # define MSI_INTEL_DATA_DEASSERT 0x00000000
76 # define MSI_INTEL_DATA_ASSERT 0x00004000
77 #define MSI_INTEL_DATA_DELMOD IOART_DELMOD /* Delivery mode. */
78 # define MSI_INTEL_DATA_DELFIXED IOART_DELFIXED
79 # define MSI_INTEL_DATA_DELLOPRI IOART_DELLOPRI
80 # define MSI_INTEL_DATA_DELSMI IOART_DELSMI
81 # define MSI_INTEL_DATA_DELNMI IOART_DELNMI
82 # define MSI_INTEL_DATA_DELINIT IOART_DELINIT
83 # define MSI_INTEL_DATA_DELEXINT IOART_DELEXINT
84 #define MSI_INTEL_DATA_INTVEC IOART_INTVEC /* Interrupt vector. */
87 * Build Intel MSI message and data values from a source. AMD64 systems
88 * seem to be compatible, so we use the same function for both.
90 #define INTEL_ADDR(msi) \
91 (MSI_INTEL_ADDR_BASE | (msi)->msi_cpu << 12 | \
92 MSI_INTEL_ADDR_RH_OFF | MSI_INTEL_ADDR_DM_PHYSICAL)
93 #define INTEL_DATA(msi) \
94 (MSI_INTEL_DATA_TRGREDG | MSI_INTEL_DATA_DELFIXED | (msi)->msi_vector)
96 static MALLOC_DEFINE(M_MSI, "msi", "PCI MSI");
99 * MSI sources are bunched into groups. This is because MSI forces
100 * all of the messages to share the address and data registers and
101 * thus certain properties (such as the local APIC ID target on x86).
102 * Each group has a 'first' source that contains information global to
103 * the group. These fields are marked with (g) below.
105 * Note that local APIC ID is kind of special. Each message will be
106 * assigned an ID by the system; however, a group will use the ID from
109 * For MSI-X, each message is isolated.
112 struct intsrc msi_intsrc;
113 device_t msi_dev; /* Owning device. (g) */
114 struct msi_intsrc *msi_first; /* First source in group. */
115 u_int msi_irq; /* IRQ cookie. */
116 u_int msi_msix; /* MSI-X message. */
117 u_int msi_vector:8; /* IDT vector. */
118 u_int msi_cpu; /* Local APIC ID. (g) */
119 u_int msi_count:8; /* Messages in this group. (g) */
120 u_int msi_maxcount:8; /* Alignment for this group. (g) */
121 int *msi_irqs; /* Group's IRQ list. (g) */
122 u_int msi_remap_cookie;
125 static void msi_create_source(void);
126 static void msi_enable_source(struct intsrc *isrc);
127 static void msi_disable_source(struct intsrc *isrc, int eoi);
128 static void msi_eoi_source(struct intsrc *isrc);
129 static void msi_enable_intr(struct intsrc *isrc);
130 static void msi_disable_intr(struct intsrc *isrc);
131 static int msi_vector(struct intsrc *isrc);
132 static int msi_source_pending(struct intsrc *isrc);
133 static int msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
134 enum intr_polarity pol);
135 static int msi_assign_cpu(struct intsrc *isrc, u_int apic_id);
137 struct pic msi_pic = {
138 .pic_enable_source = msi_enable_source,
139 .pic_disable_source = msi_disable_source,
140 .pic_eoi_source = msi_eoi_source,
141 .pic_enable_intr = msi_enable_intr,
142 .pic_disable_intr = msi_disable_intr,
143 .pic_vector = msi_vector,
144 .pic_source_pending = msi_source_pending,
147 .pic_config_intr = msi_config_intr,
148 .pic_assign_cpu = msi_assign_cpu,
149 .pic_reprogram_pin = NULL,
153 * Xen hypervisors prior to 4.6.0 do not properly handle updates to
154 * enabled MSI-X table entries. Allow migration of MSI-X interrupts
155 * to be disabled via a tunable. Values have the following meaning:
157 * -1: automatic detection by FreeBSD
158 * 0: enable migration
159 * 1: disable migration
161 int msix_disable_migration = -1;
162 SYSCTL_INT(_machdep, OID_AUTO, disable_msix_migration, CTLFLAG_RDTUN,
163 &msix_disable_migration, 0,
164 "Disable migration of MSI-X interrupts between CPUs");
166 static int msi_enabled;
167 static int msi_last_irq;
168 static struct mtx msi_lock;
171 msi_enable_source(struct intsrc *isrc)
176 msi_disable_source(struct intsrc *isrc, int eoi)
184 msi_eoi_source(struct intsrc *isrc)
191 msi_enable_intr(struct intsrc *isrc)
193 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
195 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
199 msi_disable_intr(struct intsrc *isrc)
201 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
203 apic_disable_vector(msi->msi_cpu, msi->msi_vector);
207 msi_vector(struct intsrc *isrc)
209 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
211 return (msi->msi_irq);
215 msi_source_pending(struct intsrc *isrc)
222 msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
223 enum intr_polarity pol)
230 msi_assign_cpu(struct intsrc *isrc, u_int apic_id)
232 struct msi_intsrc *sib, *msi = (struct msi_intsrc *)isrc;
238 * Only allow CPUs to be assigned to the first message for an
241 if (msi->msi_first != msi)
244 if (msix_disable_migration && msi->msi_msix)
247 /* Store information to free existing irq. */
248 old_vector = msi->msi_vector;
249 old_id = msi->msi_cpu;
250 if (old_id == apic_id)
253 /* Allocate IDT vectors on this cpu. */
254 if (msi->msi_count > 1) {
255 KASSERT(msi->msi_msix == 0, ("MSI-X message group"));
256 vector = apic_alloc_vectors(apic_id, msi->msi_irqs,
257 msi->msi_count, msi->msi_maxcount);
259 vector = apic_alloc_vector(apic_id, msi->msi_irq);
263 msi->msi_cpu = apic_id;
264 msi->msi_vector = vector;
265 if (msi->msi_intsrc.is_handlers > 0)
266 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
268 printf("msi: Assigning %s IRQ %d to local APIC %u vector %u\n",
269 msi->msi_msix ? "MSI-X" : "MSI", msi->msi_irq,
270 msi->msi_cpu, msi->msi_vector);
271 for (i = 1; i < msi->msi_count; i++) {
272 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
273 sib->msi_cpu = apic_id;
274 sib->msi_vector = vector + i;
275 if (sib->msi_intsrc.is_handlers > 0)
276 apic_enable_vector(sib->msi_cpu, sib->msi_vector);
279 "msi: Assigning MSI IRQ %d to local APIC %u vector %u\n",
280 sib->msi_irq, sib->msi_cpu, sib->msi_vector);
282 BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev,
286 * Free the old vector after the new one is established. This is done
287 * to prevent races where we could miss an interrupt.
289 if (msi->msi_intsrc.is_handlers > 0)
290 apic_disable_vector(old_id, old_vector);
291 apic_free_vector(old_id, old_vector, msi->msi_irq);
292 for (i = 1; i < msi->msi_count; i++) {
293 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
294 if (sib->msi_intsrc.is_handlers > 0)
295 apic_disable_vector(old_id, old_vector + i);
296 apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]);
305 /* Check if we have a supported CPU. */
306 switch (cpu_vendor_id) {
307 case CPU_VENDOR_INTEL:
310 case CPU_VENDOR_CENTAUR:
311 if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
312 CPUID_TO_MODEL(cpu_id) >= 0xf)
319 if (msix_disable_migration == -1) {
320 /* The default is to allow migration of MSI-X interrupts. */
321 msix_disable_migration = 0;
325 intr_register_pic(&msi_pic);
326 mtx_init(&msi_lock, "msi", NULL, MTX_DEF);
330 msi_create_source(void)
332 struct msi_intsrc *msi;
336 if (msi_last_irq >= NUM_MSI_INTS) {
337 mtx_unlock(&msi_lock);
340 irq = msi_last_irq + FIRST_MSI_INT;
342 mtx_unlock(&msi_lock);
344 msi = malloc(sizeof(struct msi_intsrc), M_MSI, M_WAITOK | M_ZERO);
345 msi->msi_intsrc.is_pic = &msi_pic;
347 intr_register_source(&msi->msi_intsrc);
352 * Try to allocate 'count' interrupt sources with contiguous IDT values.
355 msi_alloc(device_t dev, int count, int maxcount, int *irqs)
357 struct msi_intsrc *msi, *fsrc;
359 int cnt, i, *mirqs, vector;
361 u_int cookies[count];
369 mirqs = malloc(count * sizeof(*mirqs), M_MSI, M_WAITOK);
375 /* Try to find 'count' free IRQs. */
377 for (i = FIRST_MSI_INT; i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
378 msi = (struct msi_intsrc *)intr_lookup_source(i);
380 /* End of allocated sources, so break. */
384 /* If this is a free one, save its IRQ in the array. */
385 if (msi->msi_dev == NULL) {
393 /* Do we need to create some new sources? */
395 /* If we would exceed the max, give up. */
396 if (i + (count - cnt) > FIRST_MSI_INT + NUM_MSI_INTS) {
397 mtx_unlock(&msi_lock);
401 mtx_unlock(&msi_lock);
403 /* We need count - cnt more sources. */
404 while (cnt < count) {
411 /* Ok, we now have the IRQs allocated. */
412 KASSERT(cnt == count, ("count mismatch"));
414 /* Allocate 'count' IDT vectors. */
415 cpu = intr_next_cpu();
416 vector = apic_alloc_vectors(cpu, irqs, count, maxcount);
418 mtx_unlock(&msi_lock);
424 mtx_unlock(&msi_lock);
425 error = iommu_alloc_msi_intr(dev, cookies, count);
427 if (error == EOPNOTSUPP)
430 for (i = 0; i < count; i++)
431 apic_free_vector(cpu, vector + i, irqs[i]);
435 for (i = 0; i < count; i++) {
436 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
437 msi->msi_remap_cookie = cookies[i];
441 /* Assign IDT vectors and make these messages owned by 'dev'. */
442 fsrc = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
443 for (i = 0; i < count; i++) {
444 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
447 msi->msi_vector = vector + i;
450 "msi: routing MSI IRQ %d to local APIC %u vector %u\n",
451 msi->msi_irq, msi->msi_cpu, msi->msi_vector);
452 msi->msi_first = fsrc;
453 KASSERT(msi->msi_intsrc.is_handlers == 0,
454 ("dead MSI has handlers"));
456 fsrc->msi_count = count;
457 fsrc->msi_maxcount = maxcount;
459 bcopy(irqs, mirqs, count * sizeof(*mirqs));
460 fsrc->msi_irqs = mirqs;
461 mtx_unlock(&msi_lock);
466 msi_release(int *irqs, int count)
468 struct msi_intsrc *msi, *first;
472 first = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
474 mtx_unlock(&msi_lock);
478 /* Make sure this isn't an MSI-X message. */
479 if (first->msi_msix) {
480 mtx_unlock(&msi_lock);
484 /* Make sure this message is allocated to a group. */
485 if (first->msi_first == NULL) {
486 mtx_unlock(&msi_lock);
491 * Make sure this is the start of a group and that we are releasing
494 if (first->msi_first != first || first->msi_count != count) {
495 mtx_unlock(&msi_lock);
498 KASSERT(first->msi_dev != NULL, ("unowned group"));
500 /* Clear all the extra messages in the group. */
501 for (i = 1; i < count; i++) {
502 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
503 KASSERT(msi->msi_first == first, ("message not in group"));
504 KASSERT(msi->msi_dev == first->msi_dev, ("owner mismatch"));
506 iommu_unmap_msi_intr(first->msi_dev, msi->msi_remap_cookie);
508 msi->msi_first = NULL;
510 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
514 /* Clear out the first message. */
516 mtx_unlock(&msi_lock);
517 iommu_unmap_msi_intr(first->msi_dev, first->msi_remap_cookie);
520 first->msi_first = NULL;
521 first->msi_dev = NULL;
522 apic_free_vector(first->msi_cpu, first->msi_vector, first->msi_irq);
523 first->msi_vector = 0;
524 first->msi_count = 0;
525 first->msi_maxcount = 0;
526 free(first->msi_irqs, M_MSI);
527 first->msi_irqs = NULL;
529 mtx_unlock(&msi_lock);
534 msi_map(int irq, uint64_t *addr, uint32_t *data)
536 struct msi_intsrc *msi;
539 struct msi_intsrc *msi1;
544 msi = (struct msi_intsrc *)intr_lookup_source(irq);
546 mtx_unlock(&msi_lock);
550 /* Make sure this message is allocated to a device. */
551 if (msi->msi_dev == NULL) {
552 mtx_unlock(&msi_lock);
557 * If this message isn't an MSI-X message, make sure it's part
558 * of a group, and switch to the first message in the
561 if (!msi->msi_msix) {
562 if (msi->msi_first == NULL) {
563 mtx_unlock(&msi_lock);
566 msi = msi->msi_first;
570 if (!msi->msi_msix) {
571 for (k = msi->msi_count - 1, i = FIRST_MSI_INT; k > 0 &&
572 i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
573 if (i == msi->msi_irq)
575 msi1 = (struct msi_intsrc *)intr_lookup_source(i);
576 if (!msi1->msi_msix && msi1->msi_first == msi) {
577 mtx_unlock(&msi_lock);
578 iommu_map_msi_intr(msi1->msi_dev,
579 msi1->msi_cpu, msi1->msi_vector,
580 msi1->msi_remap_cookie, NULL, NULL);
586 mtx_unlock(&msi_lock);
587 error = iommu_map_msi_intr(msi->msi_dev, msi->msi_cpu,
588 msi->msi_vector, msi->msi_remap_cookie, addr, data);
590 mtx_unlock(&msi_lock);
593 if (error == EOPNOTSUPP) {
594 *addr = INTEL_ADDR(msi);
595 *data = INTEL_DATA(msi);
602 msix_alloc(device_t dev, int *irq)
604 struct msi_intsrc *msi;
618 /* Find a free IRQ. */
619 for (i = FIRST_MSI_INT; i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
620 msi = (struct msi_intsrc *)intr_lookup_source(i);
622 /* End of allocated sources, so break. */
626 /* Stop at the first free source. */
627 if (msi->msi_dev == NULL)
631 /* Do we need to create a new source? */
633 /* If we would exceed the max, give up. */
634 if (i + 1 > FIRST_MSI_INT + NUM_MSI_INTS) {
635 mtx_unlock(&msi_lock);
638 mtx_unlock(&msi_lock);
640 /* Create a new source. */
645 /* Allocate an IDT vector. */
646 cpu = intr_next_cpu();
647 vector = apic_alloc_vector(cpu, i);
649 mtx_unlock(&msi_lock);
655 mtx_unlock(&msi_lock);
656 error = iommu_alloc_msi_intr(dev, &cookie, 1);
658 if (error == EOPNOTSUPP)
662 apic_free_vector(cpu, vector, i);
665 msi->msi_remap_cookie = cookie;
669 printf("msi: routing MSI-X IRQ %d to local APIC %u vector %u\n",
670 msi->msi_irq, cpu, vector);
674 msi->msi_first = msi;
675 msi->msi_vector = vector;
678 msi->msi_maxcount = 1;
679 msi->msi_irqs = NULL;
681 KASSERT(msi->msi_intsrc.is_handlers == 0, ("dead MSI-X has handlers"));
682 mtx_unlock(&msi_lock);
689 msix_release(int irq)
691 struct msi_intsrc *msi;
694 msi = (struct msi_intsrc *)intr_lookup_source(irq);
696 mtx_unlock(&msi_lock);
700 /* Make sure this is an MSI-X message. */
701 if (!msi->msi_msix) {
702 mtx_unlock(&msi_lock);
706 KASSERT(msi->msi_dev != NULL, ("unowned message"));
708 /* Clear out the message. */
710 mtx_unlock(&msi_lock);
711 iommu_unmap_msi_intr(msi->msi_dev, msi->msi_remap_cookie);
714 msi->msi_first = NULL;
716 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
720 msi->msi_maxcount = 0;
722 mtx_unlock(&msi_lock);