2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2006 Yahoo!, Inc.
6 * Written by: John Baldwin <jhb@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Support for PCI Message Signalled Interrupts (MSI). MSI interrupts on
35 * x86 are basically APIC messages that the northbridge delivers directly
36 * to the local APICs as if they had come from an I/O APIC.
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
44 #include <sys/param.h>
46 #include <sys/kernel.h>
48 #include <sys/malloc.h>
49 #include <sys/mutex.h>
51 #include <sys/sysctl.h>
52 #include <sys/systm.h>
53 #include <x86/apicreg.h>
54 #include <machine/cputypes.h>
55 #include <machine/md_var.h>
56 #include <machine/frame.h>
57 #include <machine/intr_machdep.h>
58 #include <x86/apicvar.h>
59 #include <x86/iommu/iommu_intrmap.h>
60 #include <machine/specialreg.h>
61 #include <dev/pci/pcivar.h>
63 /* Fields in address for Intel MSI messages. */
64 #define MSI_INTEL_ADDR_DEST 0x000ff000
65 #define MSI_INTEL_ADDR_RH 0x00000008
66 # define MSI_INTEL_ADDR_RH_ON 0x00000008
67 # define MSI_INTEL_ADDR_RH_OFF 0x00000000
68 #define MSI_INTEL_ADDR_DM 0x00000004
69 # define MSI_INTEL_ADDR_DM_PHYSICAL 0x00000000
70 # define MSI_INTEL_ADDR_DM_LOGICAL 0x00000004
72 /* Fields in data for Intel MSI messages. */
73 #define MSI_INTEL_DATA_TRGRMOD IOART_TRGRMOD /* Trigger mode. */
74 # define MSI_INTEL_DATA_TRGREDG IOART_TRGREDG
75 # define MSI_INTEL_DATA_TRGRLVL IOART_TRGRLVL
76 #define MSI_INTEL_DATA_LEVEL 0x00004000 /* Polarity. */
77 # define MSI_INTEL_DATA_DEASSERT 0x00000000
78 # define MSI_INTEL_DATA_ASSERT 0x00004000
79 #define MSI_INTEL_DATA_DELMOD IOART_DELMOD /* Delivery mode. */
80 # define MSI_INTEL_DATA_DELFIXED IOART_DELFIXED
81 # define MSI_INTEL_DATA_DELLOPRI IOART_DELLOPRI
82 # define MSI_INTEL_DATA_DELSMI IOART_DELSMI
83 # define MSI_INTEL_DATA_DELNMI IOART_DELNMI
84 # define MSI_INTEL_DATA_DELINIT IOART_DELINIT
85 # define MSI_INTEL_DATA_DELEXINT IOART_DELEXINT
86 #define MSI_INTEL_DATA_INTVEC IOART_INTVEC /* Interrupt vector. */
89 * Build Intel MSI message and data values from a source. AMD64 systems
90 * seem to be compatible, so we use the same function for both.
92 #define INTEL_ADDR(msi) \
93 (MSI_INTEL_ADDR_BASE | (msi)->msi_cpu << 12 | \
94 MSI_INTEL_ADDR_RH_OFF | MSI_INTEL_ADDR_DM_PHYSICAL)
95 #define INTEL_DATA(msi) \
96 (MSI_INTEL_DATA_TRGREDG | MSI_INTEL_DATA_DELFIXED | (msi)->msi_vector)
98 static MALLOC_DEFINE(M_MSI, "msi", "PCI MSI");
101 * MSI sources are bunched into groups. This is because MSI forces
102 * all of the messages to share the address and data registers and
103 * thus certain properties (such as the local APIC ID target on x86).
104 * Each group has a 'first' source that contains information global to
105 * the group. These fields are marked with (g) below.
107 * Note that local APIC ID is kind of special. Each message will be
108 * assigned an ID by the system; however, a group will use the ID from
111 * For MSI-X, each message is isolated.
114 struct intsrc msi_intsrc;
115 device_t msi_dev; /* Owning device. (g) */
116 struct msi_intsrc *msi_first; /* First source in group. */
117 u_int msi_irq; /* IRQ cookie. */
118 u_int msi_msix; /* MSI-X message. */
119 u_int msi_vector:8; /* IDT vector. */
120 u_int msi_cpu; /* Local APIC ID. (g) */
121 u_int msi_count:8; /* Messages in this group. (g) */
122 u_int msi_maxcount:8; /* Alignment for this group. (g) */
123 int *msi_irqs; /* Group's IRQ list. (g) */
124 u_int msi_remap_cookie;
127 static void msi_create_source(void);
128 static void msi_enable_source(struct intsrc *isrc);
129 static void msi_disable_source(struct intsrc *isrc, int eoi);
130 static void msi_eoi_source(struct intsrc *isrc);
131 static void msi_enable_intr(struct intsrc *isrc);
132 static void msi_disable_intr(struct intsrc *isrc);
133 static int msi_vector(struct intsrc *isrc);
134 static int msi_source_pending(struct intsrc *isrc);
135 static int msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
136 enum intr_polarity pol);
137 static int msi_assign_cpu(struct intsrc *isrc, u_int apic_id);
139 struct pic msi_pic = {
140 .pic_enable_source = msi_enable_source,
141 .pic_disable_source = msi_disable_source,
142 .pic_eoi_source = msi_eoi_source,
143 .pic_enable_intr = msi_enable_intr,
144 .pic_disable_intr = msi_disable_intr,
145 .pic_vector = msi_vector,
146 .pic_source_pending = msi_source_pending,
149 .pic_config_intr = msi_config_intr,
150 .pic_assign_cpu = msi_assign_cpu,
151 .pic_reprogram_pin = NULL,
156 * Xen hypervisors prior to 4.6.0 do not properly handle updates to
157 * enabled MSI-X table entries. Allow migration of MSI-X interrupts
158 * to be disabled via a tunable. Values have the following meaning:
160 * -1: automatic detection by FreeBSD
161 * 0: enable migration
162 * 1: disable migration
164 int msix_disable_migration = -1;
165 SYSCTL_INT(_machdep, OID_AUTO, disable_msix_migration, CTLFLAG_RDTUN,
166 &msix_disable_migration, 0,
167 "Disable migration of MSI-X interrupts between CPUs");
170 static int msi_enabled;
171 static int msi_last_irq;
172 static struct mtx msi_lock;
175 msi_enable_source(struct intsrc *isrc)
180 msi_disable_source(struct intsrc *isrc, int eoi)
188 msi_eoi_source(struct intsrc *isrc)
195 msi_enable_intr(struct intsrc *isrc)
197 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
199 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
203 msi_disable_intr(struct intsrc *isrc)
205 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
207 apic_disable_vector(msi->msi_cpu, msi->msi_vector);
211 msi_vector(struct intsrc *isrc)
213 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
215 return (msi->msi_irq);
219 msi_source_pending(struct intsrc *isrc)
226 msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
227 enum intr_polarity pol)
234 msi_assign_cpu(struct intsrc *isrc, u_int apic_id)
236 struct msi_intsrc *sib, *msi = (struct msi_intsrc *)isrc;
242 * Only allow CPUs to be assigned to the first message for an
245 if (msi->msi_first != msi)
249 if (msix_disable_migration && msi->msi_msix)
253 /* Store information to free existing irq. */
254 old_vector = msi->msi_vector;
255 old_id = msi->msi_cpu;
256 if (old_id == apic_id)
259 /* Allocate IDT vectors on this cpu. */
260 if (msi->msi_count > 1) {
261 KASSERT(msi->msi_msix == 0, ("MSI-X message group"));
262 vector = apic_alloc_vectors(apic_id, msi->msi_irqs,
263 msi->msi_count, msi->msi_maxcount);
265 vector = apic_alloc_vector(apic_id, msi->msi_irq);
269 msi->msi_cpu = apic_id;
270 msi->msi_vector = vector;
271 if (msi->msi_intsrc.is_handlers > 0)
272 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
274 printf("msi: Assigning %s IRQ %d to local APIC %u vector %u\n",
275 msi->msi_msix ? "MSI-X" : "MSI", msi->msi_irq,
276 msi->msi_cpu, msi->msi_vector);
277 for (i = 1; i < msi->msi_count; i++) {
278 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
279 sib->msi_cpu = apic_id;
280 sib->msi_vector = vector + i;
281 if (sib->msi_intsrc.is_handlers > 0)
282 apic_enable_vector(sib->msi_cpu, sib->msi_vector);
285 "msi: Assigning MSI IRQ %d to local APIC %u vector %u\n",
286 sib->msi_irq, sib->msi_cpu, sib->msi_vector);
288 BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev,
292 * Free the old vector after the new one is established. This is done
293 * to prevent races where we could miss an interrupt.
295 if (msi->msi_intsrc.is_handlers > 0)
296 apic_disable_vector(old_id, old_vector);
297 apic_free_vector(old_id, old_vector, msi->msi_irq);
298 for (i = 1; i < msi->msi_count; i++) {
299 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
300 if (sib->msi_intsrc.is_handlers > 0)
301 apic_disable_vector(old_id, old_vector + i);
302 apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]);
311 /* Check if we have a supported CPU. */
312 switch (cpu_vendor_id) {
313 case CPU_VENDOR_INTEL:
316 case CPU_VENDOR_CENTAUR:
317 if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
318 CPUID_TO_MODEL(cpu_id) >= 0xf)
326 if (msix_disable_migration == -1) {
327 /* The default is to allow migration of MSI-X interrupts. */
328 msix_disable_migration = 0;
333 intr_register_pic(&msi_pic);
334 mtx_init(&msi_lock, "msi", NULL, MTX_DEF);
338 msi_create_source(void)
340 struct msi_intsrc *msi;
344 if (msi_last_irq >= NUM_MSI_INTS) {
345 mtx_unlock(&msi_lock);
348 irq = msi_last_irq + FIRST_MSI_INT;
350 mtx_unlock(&msi_lock);
352 msi = malloc(sizeof(struct msi_intsrc), M_MSI, M_WAITOK | M_ZERO);
353 msi->msi_intsrc.is_pic = &msi_pic;
355 intr_register_source(&msi->msi_intsrc);
360 * Try to allocate 'count' interrupt sources with contiguous IDT values.
363 msi_alloc(device_t dev, int count, int maxcount, int *irqs)
365 struct msi_intsrc *msi, *fsrc;
367 int cnt, i, *mirqs, vector;
369 u_int cookies[count];
377 mirqs = malloc(count * sizeof(*mirqs), M_MSI, M_WAITOK);
383 /* Try to find 'count' free IRQs. */
385 for (i = FIRST_MSI_INT; i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
386 msi = (struct msi_intsrc *)intr_lookup_source(i);
388 /* End of allocated sources, so break. */
392 /* If this is a free one, save its IRQ in the array. */
393 if (msi->msi_dev == NULL) {
401 /* Do we need to create some new sources? */
403 /* If we would exceed the max, give up. */
404 if (i + (count - cnt) > FIRST_MSI_INT + NUM_MSI_INTS) {
405 mtx_unlock(&msi_lock);
409 mtx_unlock(&msi_lock);
411 /* We need count - cnt more sources. */
412 while (cnt < count) {
419 /* Ok, we now have the IRQs allocated. */
420 KASSERT(cnt == count, ("count mismatch"));
422 /* Allocate 'count' IDT vectors. */
423 cpu = intr_next_cpu();
424 vector = apic_alloc_vectors(cpu, irqs, count, maxcount);
426 mtx_unlock(&msi_lock);
432 mtx_unlock(&msi_lock);
433 error = iommu_alloc_msi_intr(dev, cookies, count);
435 if (error == EOPNOTSUPP)
438 for (i = 0; i < count; i++)
439 apic_free_vector(cpu, vector + i, irqs[i]);
443 for (i = 0; i < count; i++) {
444 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
445 msi->msi_remap_cookie = cookies[i];
449 /* Assign IDT vectors and make these messages owned by 'dev'. */
450 fsrc = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
451 for (i = 0; i < count; i++) {
452 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
455 msi->msi_vector = vector + i;
458 "msi: routing MSI IRQ %d to local APIC %u vector %u\n",
459 msi->msi_irq, msi->msi_cpu, msi->msi_vector);
460 msi->msi_first = fsrc;
461 KASSERT(msi->msi_intsrc.is_handlers == 0,
462 ("dead MSI has handlers"));
464 fsrc->msi_count = count;
465 fsrc->msi_maxcount = maxcount;
467 bcopy(irqs, mirqs, count * sizeof(*mirqs));
468 fsrc->msi_irqs = mirqs;
469 mtx_unlock(&msi_lock);
474 msi_release(int *irqs, int count)
476 struct msi_intsrc *msi, *first;
480 first = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
482 mtx_unlock(&msi_lock);
486 /* Make sure this isn't an MSI-X message. */
487 if (first->msi_msix) {
488 mtx_unlock(&msi_lock);
492 /* Make sure this message is allocated to a group. */
493 if (first->msi_first == NULL) {
494 mtx_unlock(&msi_lock);
499 * Make sure this is the start of a group and that we are releasing
502 if (first->msi_first != first || first->msi_count != count) {
503 mtx_unlock(&msi_lock);
506 KASSERT(first->msi_dev != NULL, ("unowned group"));
508 /* Clear all the extra messages in the group. */
509 for (i = 1; i < count; i++) {
510 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
511 KASSERT(msi->msi_first == first, ("message not in group"));
512 KASSERT(msi->msi_dev == first->msi_dev, ("owner mismatch"));
514 iommu_unmap_msi_intr(first->msi_dev, msi->msi_remap_cookie);
516 msi->msi_first = NULL;
518 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
522 /* Clear out the first message. */
524 mtx_unlock(&msi_lock);
525 iommu_unmap_msi_intr(first->msi_dev, first->msi_remap_cookie);
528 first->msi_first = NULL;
529 first->msi_dev = NULL;
530 apic_free_vector(first->msi_cpu, first->msi_vector, first->msi_irq);
531 first->msi_vector = 0;
532 first->msi_count = 0;
533 first->msi_maxcount = 0;
534 free(first->msi_irqs, M_MSI);
535 first->msi_irqs = NULL;
537 mtx_unlock(&msi_lock);
542 msi_map(int irq, uint64_t *addr, uint32_t *data)
544 struct msi_intsrc *msi;
547 struct msi_intsrc *msi1;
552 msi = (struct msi_intsrc *)intr_lookup_source(irq);
554 mtx_unlock(&msi_lock);
558 /* Make sure this message is allocated to a device. */
559 if (msi->msi_dev == NULL) {
560 mtx_unlock(&msi_lock);
565 * If this message isn't an MSI-X message, make sure it's part
566 * of a group, and switch to the first message in the
569 if (!msi->msi_msix) {
570 if (msi->msi_first == NULL) {
571 mtx_unlock(&msi_lock);
574 msi = msi->msi_first;
578 if (!msi->msi_msix) {
579 for (k = msi->msi_count - 1, i = FIRST_MSI_INT; k > 0 &&
580 i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
581 if (i == msi->msi_irq)
583 msi1 = (struct msi_intsrc *)intr_lookup_source(i);
584 if (!msi1->msi_msix && msi1->msi_first == msi) {
585 mtx_unlock(&msi_lock);
586 iommu_map_msi_intr(msi1->msi_dev,
587 msi1->msi_cpu, msi1->msi_vector,
588 msi1->msi_remap_cookie, NULL, NULL);
594 mtx_unlock(&msi_lock);
595 error = iommu_map_msi_intr(msi->msi_dev, msi->msi_cpu,
596 msi->msi_vector, msi->msi_remap_cookie, addr, data);
598 mtx_unlock(&msi_lock);
601 if (error == EOPNOTSUPP) {
602 *addr = INTEL_ADDR(msi);
603 *data = INTEL_DATA(msi);
610 msix_alloc(device_t dev, int *irq)
612 struct msi_intsrc *msi;
626 /* Find a free IRQ. */
627 for (i = FIRST_MSI_INT; i < FIRST_MSI_INT + NUM_MSI_INTS; i++) {
628 msi = (struct msi_intsrc *)intr_lookup_source(i);
630 /* End of allocated sources, so break. */
634 /* Stop at the first free source. */
635 if (msi->msi_dev == NULL)
639 /* Do we need to create a new source? */
641 /* If we would exceed the max, give up. */
642 if (i + 1 > FIRST_MSI_INT + NUM_MSI_INTS) {
643 mtx_unlock(&msi_lock);
646 mtx_unlock(&msi_lock);
648 /* Create a new source. */
653 /* Allocate an IDT vector. */
654 cpu = intr_next_cpu();
655 vector = apic_alloc_vector(cpu, i);
657 mtx_unlock(&msi_lock);
663 mtx_unlock(&msi_lock);
664 error = iommu_alloc_msi_intr(dev, &cookie, 1);
666 if (error == EOPNOTSUPP)
670 apic_free_vector(cpu, vector, i);
673 msi->msi_remap_cookie = cookie;
677 printf("msi: routing MSI-X IRQ %d to local APIC %u vector %u\n",
678 msi->msi_irq, cpu, vector);
682 msi->msi_first = msi;
683 msi->msi_vector = vector;
686 msi->msi_maxcount = 1;
687 msi->msi_irqs = NULL;
689 KASSERT(msi->msi_intsrc.is_handlers == 0, ("dead MSI-X has handlers"));
690 mtx_unlock(&msi_lock);
697 msix_release(int irq)
699 struct msi_intsrc *msi;
702 msi = (struct msi_intsrc *)intr_lookup_source(irq);
704 mtx_unlock(&msi_lock);
708 /* Make sure this is an MSI-X message. */
709 if (!msi->msi_msix) {
710 mtx_unlock(&msi_lock);
714 KASSERT(msi->msi_dev != NULL, ("unowned message"));
716 /* Clear out the message. */
718 mtx_unlock(&msi_lock);
719 iommu_unmap_msi_intr(msi->msi_dev, msi->msi_remap_cookie);
722 msi->msi_first = NULL;
724 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
728 msi->msi_maxcount = 0;
730 mtx_unlock(&msi_lock);