1 .file "/home/timnor01/a64-trunk/llvm/test/CodeGen/AArch64/logical_shifted_reg.ll"
4 .type logical_32bit,@function
5 logical_32bit: // @logical_32bit
9 ldr w1, [x0, #:lo12:var1_32]
11 ldr w2, [x0, #:lo12:var2_32]
14 str w3, [x0, #:lo12:var1_32]
17 str w3, [x0, #:lo12:var1_32]
20 str w3, [x0, #:lo12:var1_32]
23 str w3, [x0, #:lo12:var1_32]
26 str w3, [x0, #:lo12:var1_32]
29 str w3, [x0, #:lo12:var1_32]
30 and w3, w1, w2, lsl #31
32 str w3, [x0, #:lo12:var1_32]
33 bic w3, w1, w2, lsl #31
35 str w3, [x0, #:lo12:var1_32]
36 orr w3, w1, w2, lsl #31
38 str w3, [x0, #:lo12:var1_32]
39 orn w3, w1, w2, lsl #31
41 str w3, [x0, #:lo12:var1_32]
42 eor w3, w1, w2, lsl #31
44 str w3, [x0, #:lo12:var1_32]
45 eon w3, w1, w2, lsl #31
47 str w3, [x0, #:lo12:var1_32]
48 bic w3, w1, w2, asr #10
50 str w3, [x0, #:lo12:var1_32]
51 eor w3, w1, w2, asr #10
53 str w3, [x0, #:lo12:var1_32]
54 orn w3, w1, w2, lsr #1
56 str w3, [x0, #:lo12:var1_32]
57 eor w3, w1, w2, lsr #1
59 str w3, [x0, #:lo12:var1_32]
60 eon w3, w1, w2, ror #20
62 str w3, [x0, #:lo12:var1_32]
63 and w1, w1, w2, ror #20
65 str w1, [x0, #:lo12:var1_32]
68 .size logical_32bit, .Ltmp0-logical_32bit
72 .type logical_64bit,@function
73 logical_64bit: // @logical_64bit
77 ldr x0, [x0, #:lo12:var1_64]
79 ldr x1, [x1, #:lo12:var2_64]
82 str x2, [x3, #:lo12:var1_64]
85 str x2, [x3, #:lo12:var1_64]
88 str x2, [x3, #:lo12:var1_64]
91 str x2, [x3, #:lo12:var1_64]
94 str x2, [x3, #:lo12:var1_64]
97 str x2, [x3, #:lo12:var1_64]
98 and x2, x0, x1, lsl #63
100 str x2, [x3, #:lo12:var1_64]
101 bic x2, x0, x1, lsl #63
103 str x2, [x3, #:lo12:var1_64]
104 orr x2, x0, x1, lsl #63
106 str x2, [x3, #:lo12:var1_64]
107 orn x2, x0, x1, lsl #63
109 str x2, [x3, #:lo12:var1_64]
110 eor x2, x0, x1, lsl #63
112 str x2, [x3, #:lo12:var1_64]
113 eon x2, x0, x1, lsl #63
115 str x2, [x3, #:lo12:var1_64]
116 bic x2, x0, x1, asr #10
118 str x2, [x3, #:lo12:var1_64]
119 eor x2, x0, x1, asr #10
121 str x2, [x3, #:lo12:var1_64]
122 orn x2, x0, x1, lsr #1
124 str x2, [x3, #:lo12:var1_64]
125 eor x2, x0, x1, lsr #1
127 str x2, [x3, #:lo12:var1_64]
128 eon x2, x0, x1, ror #20
130 str x2, [x3, #:lo12:var1_64]
131 and x0, x0, x1, ror #20
133 str x0, [x1, #:lo12:var1_64]
136 .size logical_64bit, .Ltmp1-logical_64bit
140 .type flag_setting,@function
141 flag_setting: // @flag_setting
146 ldr x0, [x0, #:lo12:var1_64]
148 ldr x1, [x1, #:lo12:var2_64]
150 str x0, [sp, #8] // 8-byte Folded Spill
151 str x1, [sp] // 8-byte Folded Spill
155 ldr x0, [sp, #8] // 8-byte Folded Reload
156 ldr x1, [sp] // 8-byte Folded Reload
161 ldr x0, [sp, #8] // 8-byte Folded Reload
162 ldr x1, [sp] // 8-byte Folded Reload
166 .LBB2_3: // %other_exit
168 ldr x1, [sp, #8] // 8-byte Folded Reload
169 str x1, [x0, #:lo12:var1_64]
176 .size flag_setting, .Ltmp2-flag_setting
179 .type var1_32,@object // @var1_32
187 .type var2_32,@object // @var2_32
194 .type var1_64,@object // @var1_64
201 .type var2_64,@object // @var2_64