1 ; RUN: llc -verify-machineinstrs -march=amdgcn -mattr=+max-private-element-size-16 < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga -mattr=+max-private-element-size-16 < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
4 ; FIXME: Broken on evergreen
5 ; FIXME: For some reason the 8 and 16 vectors are being stored as
6 ; individual elements instead of 128-bit stores.
9 ; FIXME: Why is the constant moved into the intermediate register and
10 ; not just directly into the vector component?
12 ; GCN-LABEL: {{^}}insertelement_v4f32_0:
14 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
15 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
16 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
17 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
18 ; GCN-DAG: s_mov_b32 [[CONSTREG:s[0-9]+]], 0x40a00000
19 ; GCN-DAG: v_mov_b32_e32 v[[LOW_REG:[0-9]+]], [[CONSTREG]]
20 ; GCN: buffer_store_dwordx4 v{{\[}}[[LOW_REG]]:
21 define void @insertelement_v4f32_0(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
22 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 0
23 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
27 ; GCN-LABEL: {{^}}insertelement_v4f32_1:
28 define void @insertelement_v4f32_1(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
29 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 1
30 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
34 ; GCN-LABEL: {{^}}insertelement_v4f32_2:
35 define void @insertelement_v4f32_2(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
36 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 2
37 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
41 ; GCN-LABEL: {{^}}insertelement_v4f32_3:
42 define void @insertelement_v4f32_3(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
43 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 3
44 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
48 ; GCN-LABEL: {{^}}insertelement_v4i32_0:
49 define void @insertelement_v4i32_0(<4 x i32> addrspace(1)* %out, <4 x i32> %a) nounwind {
50 %vecins = insertelement <4 x i32> %a, i32 999, i32 0
51 store <4 x i32> %vecins, <4 x i32> addrspace(1)* %out, align 16
55 ; GCN-LABEL: {{^}}insertelement_v3f32_1:
56 define void @insertelement_v3f32_1(<3 x float> addrspace(1)* %out, <3 x float> %a) nounwind {
57 %vecins = insertelement <3 x float> %a, float 5.000000e+00, i32 1
58 store <3 x float> %vecins, <3 x float> addrspace(1)* %out, align 16
62 ; GCN-LABEL: {{^}}insertelement_v3f32_2:
63 define void @insertelement_v3f32_2(<3 x float> addrspace(1)* %out, <3 x float> %a) nounwind {
64 %vecins = insertelement <3 x float> %a, float 5.000000e+00, i32 2
65 store <3 x float> %vecins, <3 x float> addrspace(1)* %out, align 16
69 ; GCN-LABEL: {{^}}insertelement_v3f32_3:
70 define void @insertelement_v3f32_3(<3 x float> addrspace(1)* %out, <3 x float> %a) nounwind {
71 %vecins = insertelement <3 x float> %a, float 5.000000e+00, i32 3
72 store <3 x float> %vecins, <3 x float> addrspace(1)* %out, align 16
76 ; GCN-LABEL: {{^}}insertelement_to_sgpr:
77 ; GCN-NOT: v_readfirstlane
78 define amdgpu_ps <4 x float> @insertelement_to_sgpr() nounwind {
79 %tmp = load <4 x i32>, <4 x i32> addrspace(2)* undef
80 %tmp1 = insertelement <4 x i32> %tmp, i32 0, i32 0
81 %tmp2 = call <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32> undef, <8 x i32> undef, <4 x i32> %tmp1, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
85 ; GCN-LABEL: {{^}}dynamic_insertelement_v2f32:
86 ; GCN: v_mov_b32_e32 [[CONST:v[0-9]+]], 0x40a00000
87 ; GCN: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], [[CONST]]
88 ; GCN: buffer_store_dwordx2 {{v\[}}[[LOW_RESULT_REG]]:
89 define void @dynamic_insertelement_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, i32 %b) nounwind {
90 %vecins = insertelement <2 x float> %a, float 5.000000e+00, i32 %b
91 store <2 x float> %vecins, <2 x float> addrspace(1)* %out, align 8
95 ; GCN-LABEL: {{^}}dynamic_insertelement_v3f32:
96 ; GCN: v_mov_b32_e32 [[CONST:v[0-9]+]], 0x40a00000
97 ; GCN: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], [[CONST]]
98 ; GCN-DAG: buffer_store_dwordx2 {{v\[}}[[LOW_RESULT_REG]]:
99 ; GCN-DAG: buffer_store_dword v
100 define void @dynamic_insertelement_v3f32(<3 x float> addrspace(1)* %out, <3 x float> %a, i32 %b) nounwind {
101 %vecins = insertelement <3 x float> %a, float 5.000000e+00, i32 %b
102 store <3 x float> %vecins, <3 x float> addrspace(1)* %out, align 16
106 ; GCN-LABEL: {{^}}dynamic_insertelement_v4f32:
107 ; GCN: v_mov_b32_e32 [[CONST:v[0-9]+]], 0x40a00000
108 ; GCN: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], [[CONST]]
109 ; GCN: buffer_store_dwordx4 {{v\[}}[[LOW_RESULT_REG]]:
110 define void @dynamic_insertelement_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %a, i32 %b) nounwind {
111 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 %b
112 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
116 ; GCN-LABEL: {{^}}dynamic_insertelement_v8f32:
117 ; GCN: v_movreld_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}
118 ; GCN: buffer_store_dwordx4
119 ; GCN: buffer_store_dwordx4
120 define void @dynamic_insertelement_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, i32 %b) nounwind {
121 %vecins = insertelement <8 x float> %a, float 5.000000e+00, i32 %b
122 store <8 x float> %vecins, <8 x float> addrspace(1)* %out, align 32
126 ; GCN-LABEL: {{^}}dynamic_insertelement_v16f32:
127 ; GCN: v_movreld_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}
128 ; GCN: buffer_store_dwordx4
129 ; GCN: buffer_store_dwordx4
130 ; GCN: buffer_store_dwordx4
131 ; GCN: buffer_store_dwordx4
132 define void @dynamic_insertelement_v16f32(<16 x float> addrspace(1)* %out, <16 x float> %a, i32 %b) nounwind {
133 %vecins = insertelement <16 x float> %a, float 5.000000e+00, i32 %b
134 store <16 x float> %vecins, <16 x float> addrspace(1)* %out, align 64
138 ; GCN-LABEL: {{^}}dynamic_insertelement_v2i32:
140 ; GCN: buffer_store_dwordx2
141 define void @dynamic_insertelement_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, i32 %b) nounwind {
142 %vecins = insertelement <2 x i32> %a, i32 5, i32 %b
143 store <2 x i32> %vecins, <2 x i32> addrspace(1)* %out, align 8
147 ; GCN-LABEL: {{^}}dynamic_insertelement_v3i32:
148 ; GCN: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], 5
149 ; GCN-DAG: buffer_store_dwordx2 {{v\[}}[[LOW_RESULT_REG]]:
150 ; GCN-DAG: buffer_store_dword v
151 define void @dynamic_insertelement_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a, i32 %b) nounwind {
152 %vecins = insertelement <3 x i32> %a, i32 5, i32 %b
153 store <3 x i32> %vecins, <3 x i32> addrspace(1)* %out, align 16
157 ; GCN-LABEL: {{^}}dynamic_insertelement_v4i32:
158 ; GCN: s_load_dword [[SVAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0x12|0x48}}
159 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]]
160 ; GCN: v_movreld_b32_e32 v{{[0-9]+}}, [[VVAL]]
161 ; GCN: buffer_store_dwordx4
162 define void @dynamic_insertelement_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, i32 %b, i32 %val) nounwind {
163 %vecins = insertelement <4 x i32> %a, i32 %val, i32 %b
164 store <4 x i32> %vecins, <4 x i32> addrspace(1)* %out, align 16
168 ; GCN-LABEL: {{^}}dynamic_insertelement_v8i32:
170 ; GCN: buffer_store_dwordx4
171 ; GCN: buffer_store_dwordx4
172 define void @dynamic_insertelement_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> %a, i32 %b) nounwind {
173 %vecins = insertelement <8 x i32> %a, i32 5, i32 %b
174 store <8 x i32> %vecins, <8 x i32> addrspace(1)* %out, align 32
178 ; GCN-LABEL: {{^}}dynamic_insertelement_v16i32:
180 ; GCN: buffer_store_dwordx4
181 ; GCN: buffer_store_dwordx4
182 ; GCN: buffer_store_dwordx4
183 ; GCN: buffer_store_dwordx4
184 define void @dynamic_insertelement_v16i32(<16 x i32> addrspace(1)* %out, <16 x i32> %a, i32 %b) nounwind {
185 %vecins = insertelement <16 x i32> %a, i32 5, i32 %b
186 store <16 x i32> %vecins, <16 x i32> addrspace(1)* %out, align 64
190 ; GCN-LABEL: {{^}}dynamic_insertelement_v2i16:
191 define void @dynamic_insertelement_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> %a, i32 %b) nounwind {
192 %vecins = insertelement <2 x i16> %a, i16 5, i32 %b
193 store <2 x i16> %vecins, <2 x i16> addrspace(1)* %out, align 8
197 ; GCN-LABEL: {{^}}dynamic_insertelement_v3i16:
198 define void @dynamic_insertelement_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> %a, i32 %b) nounwind {
199 %vecins = insertelement <3 x i16> %a, i16 5, i32 %b
200 store <3 x i16> %vecins, <3 x i16> addrspace(1)* %out, align 8
204 ; GCN-LABEL: {{^}}dynamic_insertelement_v4i16:
205 ; GCN: buffer_load_ushort v{{[0-9]+}}, off
206 ; GCN: buffer_load_ushort v{{[0-9]+}}, off
207 ; GCN: buffer_load_ushort v{{[0-9]+}}, off
208 ; GCN: buffer_load_ushort v{{[0-9]+}}, off
210 ; GCN-DAG: v_mov_b32_e32 [[BASE_FI:v[0-9]+]], 0{{$}}
211 ; GCN-DAG: s_and_b32 [[MASK_IDX:s[0-9]+]], s{{[0-9]+}}, 3{{$}}
212 ; GCN-DAG: v_or_b32_e32 [[IDX:v[0-9]+]], [[MASK_IDX]], [[BASE_FI]]{{$}}
214 ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:6
215 ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:4
216 ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:2
217 ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+$}}
218 ; GCN: buffer_store_short v{{[0-9]+}}, [[IDX]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
222 ; GCN: buffer_load_ushort
223 ; GCN: buffer_load_ushort
224 ; GCN: buffer_load_ushort
225 ; GCN: buffer_load_ushort
227 ; GCN: buffer_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, off
228 define void @dynamic_insertelement_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> %a, i32 %b) nounwind {
229 %vecins = insertelement <4 x i16> %a, i16 5, i32 %b
230 store <4 x i16> %vecins, <4 x i16> addrspace(1)* %out, align 8
234 ; GCN-LABEL: {{^}}dynamic_insertelement_v2i8:
235 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
236 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
238 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:1
239 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}{{$}}
241 ; GCN: buffer_store_byte v{{[0-9]+}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
243 ; GCN: buffer_load_ubyte
244 ; GCN: buffer_load_ubyte
246 ; GCN: buffer_store_short v{{[0-9]+}}, off
247 define void @dynamic_insertelement_v2i8(<2 x i8> addrspace(1)* %out, <2 x i8> %a, i32 %b) nounwind {
248 %vecins = insertelement <2 x i8> %a, i8 5, i32 %b
249 store <2 x i8> %vecins, <2 x i8> addrspace(1)* %out, align 8
253 ; GCN-LABEL: {{^}}dynamic_insertelement_v3i8:
254 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
255 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
256 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
258 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:2
259 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:1
260 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}{{$}}
262 ; GCN: buffer_store_byte v{{[0-9]+}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
264 ; GCN: buffer_load_ubyte
265 ; GCN: buffer_load_ubyte
266 ; GCN: buffer_load_ubyte
268 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off
269 ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off
270 define void @dynamic_insertelement_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> %a, i32 %b) nounwind {
271 %vecins = insertelement <3 x i8> %a, i8 5, i32 %b
272 store <3 x i8> %vecins, <3 x i8> addrspace(1)* %out, align 4
276 ; GCN-LABEL: {{^}}dynamic_insertelement_v4i8:
277 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
278 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
279 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
280 ; GCN: buffer_load_ubyte v{{[0-9]+}}, off
282 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:3
283 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:2
284 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:1
285 ; GCN-DAG: buffer_store_byte v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}{{$}}
287 ; GCN: buffer_store_byte v{{[0-9]+}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
289 ; GCN: buffer_load_ubyte
290 ; GCN: buffer_load_ubyte
291 ; GCN: buffer_load_ubyte
292 ; GCN: buffer_load_ubyte
294 ; GCN: buffer_store_dword v{{[0-9]+}}, off
295 define void @dynamic_insertelement_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> %a, i32 %b) nounwind {
296 %vecins = insertelement <4 x i8> %a, i8 5, i32 %b
297 store <4 x i8> %vecins, <4 x i8> addrspace(1)* %out, align 4
301 ; GCN-LABEL: {{^}}dynamic_insertelement_v8i8:
302 define void @dynamic_insertelement_v8i8(<8 x i8> addrspace(1)* %out, <8 x i8> %a, i32 %b) nounwind {
303 %vecins = insertelement <8 x i8> %a, i8 5, i32 %b
304 store <8 x i8> %vecins, <8 x i8> addrspace(1)* %out, align 8
308 ; GCN-LABEL: {{^}}dynamic_insertelement_v16i8:
309 define void @dynamic_insertelement_v16i8(<16 x i8> addrspace(1)* %out, <16 x i8> %a, i32 %b) nounwind {
310 %vecins = insertelement <16 x i8> %a, i8 5, i32 %b
311 store <16 x i8> %vecins, <16 x i8> addrspace(1)* %out, align 16
315 ; This test requires handling INSERT_SUBREG in SIFixSGPRCopies. Check that
316 ; the compiler doesn't crash.
317 ; GCN-LABEL: {{^}}insert_split_bb:
318 define void @insert_split_bb(<2 x i32> addrspace(1)* %out, i32 addrspace(1)* %in, i32 %a, i32 %b) {
320 %0 = insertelement <2 x i32> undef, i32 %a, i32 0
321 %1 = icmp eq i32 %a, 0
322 br i1 %1, label %if, label %else
325 %2 = load i32, i32 addrspace(1)* %in
326 %3 = insertelement <2 x i32> %0, i32 %2, i32 1
330 %4 = getelementptr i32, i32 addrspace(1)* %in, i32 1
331 %5 = load i32, i32 addrspace(1)* %4
332 %6 = insertelement <2 x i32> %0, i32 %5, i32 1
336 %7 = phi <2 x i32> [%3, %if], [%6, %else]
337 store <2 x i32> %7, <2 x i32> addrspace(1)* %out
341 ; GCN-LABEL: {{^}}dynamic_insertelement_v2f64:
342 ; GCN-DAG: s_load_dwordx4 s{{\[}}[[A_ELT0:[0-9]+]]:[[A_ELT3:[0-9]+]]{{\]}}
343 ; GCN-DAG: s_load_dword [[IDX:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0x11|0x44}}{{$}}
345 ; GCN-DAG: s_lshl_b32 [[SCALEDIDX:s[0-9]+]], [[IDX]], 1{{$}}
347 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
348 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
349 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
350 ; GCN-DAG: v_mov_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}
351 ; GCN-DAG: v_mov_b32_e32 [[ELT1:v[0-9]+]], 0x40200000
353 ; GCN-DAG: s_mov_b32 m0, [[SCALEDIDX]]
354 ; GCN: v_movreld_b32_e32 v{{[0-9]+}}, 0
356 ; Increment to next element folded into base register, but FileCheck
357 ; can't do math expressions
359 ; FIXME: Should be able to manipulate m0 directly instead of s_lshl_b32 + copy to m0
361 ; GCN: v_movreld_b32_e32 v{{[0-9]+}}, [[ELT1]]
363 ; GCN: buffer_store_dwordx4
365 define void @dynamic_insertelement_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, i32 %b) nounwind {
366 %vecins = insertelement <2 x double> %a, double 8.0, i32 %b
367 store <2 x double> %vecins, <2 x double> addrspace(1)* %out, align 16
371 ; GCN-LABEL: {{^}}dynamic_insertelement_v2i64:
373 ; GCN-DAG: v_movreld_b32_e32 v{{[0-9]+}}, 5
374 ; GCN-DAG: v_movreld_b32_e32 v{{[0-9]+}}, 0
376 ; GCN: buffer_store_dwordx4
378 define void @dynamic_insertelement_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %a, i32 %b) nounwind {
379 %vecins = insertelement <2 x i64> %a, i64 5, i32 %b
380 store <2 x i64> %vecins, <2 x i64> addrspace(1)* %out, align 8
384 ; GCN-LABEL: {{^}}dynamic_insertelement_v3i64:
385 define void @dynamic_insertelement_v3i64(<3 x i64> addrspace(1)* %out, <3 x i64> %a, i32 %b) nounwind {
386 %vecins = insertelement <3 x i64> %a, i64 5, i32 %b
387 store <3 x i64> %vecins, <3 x i64> addrspace(1)* %out, align 32
391 ; FIXME: Should be able to do without stack access. The used stack
392 ; space is also 2x what should be required.
394 ; GCN-LABEL: {{^}}dynamic_insertelement_v4f64:
395 ; GCN: SCRATCH_RSRC_DWORD
399 ; GCN-DAG: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}{{$}}
400 ; GCN-DAG: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:16{{$}}
403 ; GCN: buffer_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen{{$}}
406 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:16{{$}}
407 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}{{$}}
410 ; GCN: buffer_store_dwordx4
411 ; GCN: buffer_store_dwordx4
413 ; GCN: ScratchSize: 64
415 define void @dynamic_insertelement_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, i32 %b) nounwind {
416 %vecins = insertelement <4 x double> %a, double 8.0, i32 %b
417 store <4 x double> %vecins, <4 x double> addrspace(1)* %out, align 16
421 ; GCN-LABEL: {{^}}dynamic_insertelement_v8f64:
422 ; GCN-DAG: SCRATCH_RSRC_DWORD
424 ; GCN-DAG: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:16{{$}}
425 ; GCN-DAG: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:32{{$}}
426 ; GCN-DAG: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:48{{$}}
427 ; GCN: buffer_store_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}{{$}}
429 ; GCN: buffer_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen{{$}}
431 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:48{{$}}
432 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:32{{$}}
433 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offset:16{{$}}
434 ; GCN-DAG: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, off, s{{\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}{{$}}
436 ; GCN: buffer_store_dwordx4
437 ; GCN: buffer_store_dwordx4
438 ; GCN: buffer_store_dwordx4
439 ; GCN: buffer_store_dwordx4
441 ; GCN: ScratchSize: 128
442 define void @dynamic_insertelement_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, i32 %b) nounwind {
443 %vecins = insertelement <8 x double> %a, double 8.0, i32 %b
444 store <8 x double> %vecins, <8 x double> addrspace(1)* %out, align 16
448 declare <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) nounwind readnone