1 ; RUN: llc -march=r600 -mcpu=SI -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
4 ; XUN: llc -march=r600 -mcpu=SI -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
6 declare float @llvm.AMDGPU.rcp.f32(float) nounwind readnone
7 declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
10 declare float @llvm.sqrt.f32(float) nounwind readnone
11 declare double @llvm.sqrt.f64(double) nounwind readnone
13 ; FUNC-LABEL: @rcp_f32
15 define void @rcp_f32(float addrspace(1)* %out, float %src) nounwind {
16 %rcp = call float @llvm.AMDGPU.rcp.f32(float %src) nounwind readnone
17 store float %rcp, float addrspace(1)* %out, align 4
21 ; FUNC-LABEL: @rcp_f64
23 define void @rcp_f64(double addrspace(1)* %out, double %src) nounwind {
24 %rcp = call double @llvm.AMDGPU.rcp.f64(double %src) nounwind readnone
25 store double %rcp, double addrspace(1)* %out, align 8
29 ; FUNC-LABEL: @rcp_pat_f32
30 ; SI-SAFE: V_RCP_F32_e32
31 ; XSI-SAFE-SPDENORM-NOT: V_RCP_F32_e32
32 define void @rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
33 %rcp = fdiv float 1.0, %src
34 store float %rcp, float addrspace(1)* %out, align 4
38 ; FUNC-LABEL: @rcp_pat_f64
40 define void @rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
41 %rcp = fdiv double 1.0, %src
42 store double %rcp, double addrspace(1)* %out, align 8
46 ; FUNC-LABEL: @rsq_rcp_pat_f32
47 ; SI-UNSAFE: V_RSQ_F32_e32
48 ; SI-SAFE: V_SQRT_F32_e32
49 ; SI-SAFE: V_RCP_F32_e32
50 define void @rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
51 %sqrt = call float @llvm.sqrt.f32(float %src) nounwind readnone
52 %rcp = call float @llvm.AMDGPU.rcp.f32(float %sqrt) nounwind readnone
53 store float %rcp, float addrspace(1)* %out, align 4
57 ; FUNC-LABEL: @rsq_rcp_pat_f64
58 ; SI-UNSAFE: V_RSQ_F64_e32
59 ; SI-SAFE-NOT: V_RSQ_F64_e32
60 define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
61 %sqrt = call double @llvm.sqrt.f64(double %src) nounwind readnone
62 %rcp = call double @llvm.AMDGPU.rcp.f64(double %sqrt) nounwind readnone
63 store double %rcp, double addrspace(1)* %out, align 8