1 ; Test 32-bit unsigned division and remainder.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Test register division. The result is in the second of the two registers.
6 define void @f1(i32 %dummy, i32 %a, i32 %b, i32 *%dest) {
9 ; CHECK: {{llill|lhi}} %r2, 0
12 ; CHECK: st %r3, 0(%r5)
14 %div = udiv i32 %a, %b
15 store i32 %div, i32 *%dest
19 ; Test register remainder. The result is in the first of the two registers.
20 define void @f2(i32 %dummy, i32 %a, i32 %b, i32 *%dest) {
23 ; CHECK: {{llill|lhi}} %r2, 0
26 ; CHECK: st %r2, 0(%r5)
28 %rem = urem i32 %a, %b
29 store i32 %rem, i32 *%dest
33 ; Test that division and remainder use a single instruction.
34 define i32 @f3(i32 %dummy1, i32 %a, i32 %b) {
37 ; CHECK: {{llill|lhi}} %r2, 0
43 %div = udiv i32 %a, %b
44 %rem = urem i32 %a, %b
45 %or = or i32 %rem, %div
49 ; Test memory division with no displacement.
50 define void @f4(i32 %dummy, i32 %a, i32 *%src, i32 *%dest) {
53 ; CHECK: {{llill|lhi}} %r2, 0
55 ; CHECK: dl %r2, 0(%r4)
56 ; CHECK: st %r3, 0(%r5)
59 %div = udiv i32 %a, %b
60 store i32 %div, i32 *%dest
64 ; Test memory remainder with no displacement.
65 define void @f5(i32 %dummy, i32 %a, i32 *%src, i32 *%dest) {
68 ; CHECK: {{llill|lhi}} %r2, 0
70 ; CHECK: dl %r2, 0(%r4)
71 ; CHECK: st %r2, 0(%r5)
74 %rem = urem i32 %a, %b
75 store i32 %rem, i32 *%dest
79 ; Test both memory division and memory remainder.
80 define i32 @f6(i32 %dummy, i32 %a, i32 *%src) {
83 ; CHECK: {{llill|lhi}} %r2, 0
85 ; CHECK: dl %r2, 0(%r4)
86 ; CHECK-NOT: {{dl|dlr}}
90 %div = udiv i32 %a, %b
91 %rem = urem i32 %a, %b
92 %or = or i32 %rem, %div
96 ; Check the high end of the DL range.
97 define i32 @f7(i32 %dummy, i32 %a, i32 *%src) {
99 ; CHECK: dl %r2, 524284(%r4)
101 %ptr = getelementptr i32 *%src, i64 131071
103 %rem = urem i32 %a, %b
107 ; Check the next word up, which needs separate address logic.
108 ; Other sequences besides this one would be OK.
109 define i32 @f8(i32 %dummy, i32 %a, i32 *%src) {
111 ; CHECK: agfi %r4, 524288
112 ; CHECK: dl %r2, 0(%r4)
114 %ptr = getelementptr i32 *%src, i64 131072
116 %rem = urem i32 %a, %b
120 ; Check the high end of the negative aligned DL range.
121 define i32 @f9(i32 %dummy, i32 %a, i32 *%src) {
123 ; CHECK: dl %r2, -4(%r4)
125 %ptr = getelementptr i32 *%src, i64 -1
127 %rem = urem i32 %a, %b
131 ; Check the low end of the DL range.
132 define i32 @f10(i32 %dummy, i32 %a, i32 *%src) {
134 ; CHECK: dl %r2, -524288(%r4)
136 %ptr = getelementptr i32 *%src, i64 -131072
138 %rem = urem i32 %a, %b
142 ; Check the next word down, which needs separate address logic.
143 ; Other sequences besides this one would be OK.
144 define i32 @f11(i32 %dummy, i32 %a, i32 *%src) {
146 ; CHECK: agfi %r4, -524292
147 ; CHECK: dl %r2, 0(%r4)
149 %ptr = getelementptr i32 *%src, i64 -131073
151 %rem = urem i32 %a, %b
155 ; Check that DL allows an index.
156 define i32 @f12(i32 %dummy, i32 %a, i64 %src, i64 %index) {
158 ; CHECK: dl %r2, 524287(%r5,%r4)
160 %add1 = add i64 %src, %index
161 %add2 = add i64 %add1, 524287
162 %ptr = inttoptr i64 %add2 to i32 *
164 %rem = urem i32 %a, %b