1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx | FileCheck %s
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx512vl | FileCheck %s
4 define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
6 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
9 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
12 define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
14 %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
17 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
20 define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) {
22 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
25 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
28 define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
30 %res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) ; <i64> [#uses=1]
33 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
36 define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
38 %res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]
41 declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
44 define i64 @test_x86_sse_cvttss2si64(<4 x float> %a0) {
46 %res = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0) ; <i64> [#uses=1]
49 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone