1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE
3 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32-AVX
4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
9 define <2 x double> @mask_sitofp_2i64_2f64(<2 x i64> %a) nounwind {
10 ; X32-SSE-LABEL: mask_sitofp_2i64_2f64:
12 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
13 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
14 ; X32-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
17 ; X32-AVX-LABEL: mask_sitofp_2i64_2f64:
19 ; X32-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
20 ; X32-AVX-NEXT: vcvtdq2pd %xmm0, %xmm0
23 ; X64-SSE-LABEL: mask_sitofp_2i64_2f64:
25 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
26 ; X64-SSE-NEXT: pand {{.*}}(%rip), %xmm0
27 ; X64-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
30 ; X64-AVX-LABEL: mask_sitofp_2i64_2f64:
32 ; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
33 ; X64-AVX-NEXT: vcvtdq2pd %xmm0, %xmm0
35 %and = and <2 x i64> %a, <i64 255, i64 65535>
36 %cvt = sitofp <2 x i64> %and to <2 x double>
40 define <2 x double> @mask_uitofp_2i64_2f64(<2 x i64> %a) nounwind {
41 ; X32-SSE-LABEL: mask_uitofp_2i64_2f64:
43 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
44 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
45 ; X32-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
48 ; X32-AVX-LABEL: mask_uitofp_2i64_2f64:
50 ; X32-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
51 ; X32-AVX-NEXT: vcvtdq2pd %xmm0, %xmm0
54 ; X64-SSE-LABEL: mask_uitofp_2i64_2f64:
56 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
57 ; X64-SSE-NEXT: pand {{.*}}(%rip), %xmm0
58 ; X64-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
61 ; X64-AVX-LABEL: mask_uitofp_2i64_2f64:
63 ; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
64 ; X64-AVX-NEXT: vcvtdq2pd %xmm0, %xmm0
66 %and = and <2 x i64> %a, <i64 255, i64 65535>
67 %cvt = uitofp <2 x i64> %and to <2 x double>
71 define <4 x float> @mask_sitofp_4i64_4f32(<4 x i64> %a) nounwind {
72 ; X32-SSE-LABEL: mask_sitofp_4i64_4f32:
74 ; X32-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
75 ; X32-SSE-NEXT: andps {{\.LCPI.*}}, %xmm0
76 ; X32-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
79 ; X32-AVX-LABEL: mask_sitofp_4i64_4f32:
81 ; X32-AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
82 ; X32-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
83 ; X32-AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
84 ; X32-AVX-NEXT: vcvtdq2ps %xmm0, %xmm0
85 ; X32-AVX-NEXT: vzeroupper
88 ; X64-SSE-LABEL: mask_sitofp_4i64_4f32:
90 ; X64-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
91 ; X64-SSE-NEXT: andps {{.*}}(%rip), %xmm0
92 ; X64-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
95 ; X64-AVX-LABEL: mask_sitofp_4i64_4f32:
97 ; X64-AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
98 ; X64-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
99 ; X64-AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
100 ; X64-AVX-NEXT: vcvtdq2ps %xmm0, %xmm0
101 ; X64-AVX-NEXT: vzeroupper
103 %and = and <4 x i64> %a, <i64 127, i64 255, i64 4095, i64 65535>
104 %cvt = sitofp <4 x i64> %and to <4 x float>
108 define <4 x float> @mask_uitofp_4i64_4f32(<4 x i64> %a) nounwind {
109 ; X32-SSE-LABEL: mask_uitofp_4i64_4f32:
111 ; X32-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
112 ; X32-SSE-NEXT: andps {{\.LCPI.*}}, %xmm0
113 ; X32-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
116 ; X32-AVX-LABEL: mask_uitofp_4i64_4f32:
118 ; X32-AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
119 ; X32-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
120 ; X32-AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
121 ; X32-AVX-NEXT: vcvtdq2ps %xmm0, %xmm0
122 ; X32-AVX-NEXT: vzeroupper
125 ; X64-SSE-LABEL: mask_uitofp_4i64_4f32:
127 ; X64-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
128 ; X64-SSE-NEXT: andps {{.*}}(%rip), %xmm0
129 ; X64-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
132 ; X64-AVX-LABEL: mask_uitofp_4i64_4f32:
134 ; X64-AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
135 ; X64-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
136 ; X64-AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
137 ; X64-AVX-NEXT: vcvtdq2ps %xmm0, %xmm0
138 ; X64-AVX-NEXT: vzeroupper
140 %and = and <4 x i64> %a, <i64 127, i64 255, i64 4095, i64 65535>
141 %cvt = uitofp <4 x i64> %and to <4 x float>
145 define <2 x double> @clamp_sitofp_2i64_2f64(<2 x i64> %a) nounwind {
146 ; X32-SSE-LABEL: clamp_sitofp_2i64_2f64:
148 ; X32-SSE-NEXT: pushl %ebp
149 ; X32-SSE-NEXT: movl %esp, %ebp
150 ; X32-SSE-NEXT: andl $-8, %esp
151 ; X32-SSE-NEXT: subl $32, %esp
152 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,0,2147483648,0]
153 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
154 ; X32-SSE-NEXT: pxor %xmm1, %xmm2
155 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [2147483393,4294967295,2147483393,4294967295]
156 ; X32-SSE-NEXT: movdqa %xmm3, %xmm4
157 ; X32-SSE-NEXT: pcmpgtd %xmm2, %xmm4
158 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
159 ; X32-SSE-NEXT: pcmpeqd %xmm3, %xmm2
160 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
161 ; X32-SSE-NEXT: pand %xmm5, %xmm2
162 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
163 ; X32-SSE-NEXT: por %xmm2, %xmm3
164 ; X32-SSE-NEXT: movdqa %xmm3, %xmm2
165 ; X32-SSE-NEXT: pandn %xmm0, %xmm2
166 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm3
167 ; X32-SSE-NEXT: por %xmm2, %xmm3
168 ; X32-SSE-NEXT: pxor %xmm3, %xmm1
169 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm0 = [2147483903,0,2147483903,0]
170 ; X32-SSE-NEXT: movdqa %xmm1, %xmm2
171 ; X32-SSE-NEXT: pcmpgtd %xmm0, %xmm2
172 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[0,0,2,2]
173 ; X32-SSE-NEXT: pcmpeqd %xmm0, %xmm1
174 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
175 ; X32-SSE-NEXT: pand %xmm4, %xmm0
176 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
177 ; X32-SSE-NEXT: por %xmm0, %xmm1
178 ; X32-SSE-NEXT: movdqa %xmm1, %xmm0
179 ; X32-SSE-NEXT: pandn %xmm3, %xmm0
180 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1
181 ; X32-SSE-NEXT: por %xmm0, %xmm1
182 ; X32-SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
183 ; X32-SSE-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
184 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
185 ; X32-SSE-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
186 ; X32-SSE-NEXT: fildll {{[0-9]+}}(%esp)
187 ; X32-SSE-NEXT: fstpl {{[0-9]+}}(%esp)
188 ; X32-SSE-NEXT: fildll {{[0-9]+}}(%esp)
189 ; X32-SSE-NEXT: fstpl (%esp)
190 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
191 ; X32-SSE-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
192 ; X32-SSE-NEXT: movl %ebp, %esp
193 ; X32-SSE-NEXT: popl %ebp
196 ; X32-AVX-LABEL: clamp_sitofp_2i64_2f64:
198 ; X32-AVX-NEXT: pushl %ebp
199 ; X32-AVX-NEXT: movl %esp, %ebp
200 ; X32-AVX-NEXT: andl $-8, %esp
201 ; X32-AVX-NEXT: subl $32, %esp
202 ; X32-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4294967041,4294967295,4294967041,4294967295]
203 ; X32-AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2
204 ; X32-AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
205 ; X32-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [255,0,255,0]
206 ; X32-AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2
207 ; X32-AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
208 ; X32-AVX-NEXT: vmovq {{.*#+}} xmm1 = xmm0[0],zero
209 ; X32-AVX-NEXT: vmovq %xmm1, {{[0-9]+}}(%esp)
210 ; X32-AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
211 ; X32-AVX-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
212 ; X32-AVX-NEXT: fildll {{[0-9]+}}(%esp)
213 ; X32-AVX-NEXT: fstpl {{[0-9]+}}(%esp)
214 ; X32-AVX-NEXT: fildll {{[0-9]+}}(%esp)
215 ; X32-AVX-NEXT: fstpl (%esp)
216 ; X32-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
217 ; X32-AVX-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
218 ; X32-AVX-NEXT: movl %ebp, %esp
219 ; X32-AVX-NEXT: popl %ebp
222 ; X64-SSE-LABEL: clamp_sitofp_2i64_2f64:
224 ; X64-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,0,2147483648,0]
225 ; X64-SSE-NEXT: movdqa %xmm0, %xmm2
226 ; X64-SSE-NEXT: pxor %xmm1, %xmm2
227 ; X64-SSE-NEXT: movdqa {{.*#+}} xmm3 = [18446744073709551361,18446744073709551361]
228 ; X64-SSE-NEXT: movdqa %xmm1, %xmm4
229 ; X64-SSE-NEXT: pxor %xmm3, %xmm4
230 ; X64-SSE-NEXT: movdqa %xmm4, %xmm5
231 ; X64-SSE-NEXT: pcmpgtd %xmm2, %xmm5
232 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
233 ; X64-SSE-NEXT: pcmpeqd %xmm2, %xmm4
234 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
235 ; X64-SSE-NEXT: pand %xmm6, %xmm2
236 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
237 ; X64-SSE-NEXT: por %xmm2, %xmm4
238 ; X64-SSE-NEXT: movdqa %xmm4, %xmm2
239 ; X64-SSE-NEXT: pandn %xmm0, %xmm2
240 ; X64-SSE-NEXT: pand %xmm3, %xmm4
241 ; X64-SSE-NEXT: por %xmm2, %xmm4
242 ; X64-SSE-NEXT: movdqa %xmm4, %xmm0
243 ; X64-SSE-NEXT: pxor %xmm1, %xmm0
244 ; X64-SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255]
245 ; X64-SSE-NEXT: pxor %xmm2, %xmm1
246 ; X64-SSE-NEXT: movdqa %xmm0, %xmm3
247 ; X64-SSE-NEXT: pcmpgtd %xmm1, %xmm3
248 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[0,0,2,2]
249 ; X64-SSE-NEXT: pcmpeqd %xmm0, %xmm1
250 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
251 ; X64-SSE-NEXT: pand %xmm5, %xmm0
252 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]
253 ; X64-SSE-NEXT: por %xmm0, %xmm1
254 ; X64-SSE-NEXT: movdqa %xmm1, %xmm0
255 ; X64-SSE-NEXT: pandn %xmm4, %xmm0
256 ; X64-SSE-NEXT: pand %xmm2, %xmm1
257 ; X64-SSE-NEXT: por %xmm0, %xmm1
258 ; X64-SSE-NEXT: movd %xmm1, %rax
259 ; X64-SSE-NEXT: xorps %xmm0, %xmm0
260 ; X64-SSE-NEXT: cvtsi2sdq %rax, %xmm0
261 ; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
262 ; X64-SSE-NEXT: movd %xmm1, %rax
263 ; X64-SSE-NEXT: xorps %xmm1, %xmm1
264 ; X64-SSE-NEXT: cvtsi2sdq %rax, %xmm1
265 ; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
268 ; X64-AVX-LABEL: clamp_sitofp_2i64_2f64:
270 ; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551361,18446744073709551361]
271 ; X64-AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2
272 ; X64-AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
273 ; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [255,255]
274 ; X64-AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2
275 ; X64-AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
276 ; X64-AVX-NEXT: vpextrq $1, %xmm0, %rax
277 ; X64-AVX-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1
278 ; X64-AVX-NEXT: vmovq %xmm0, %rax
279 ; X64-AVX-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0
280 ; X64-AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
282 %clo = icmp slt <2 x i64> %a, <i64 -255, i64 -255>
283 %lo = select <2 x i1> %clo, <2 x i64> <i64 -255, i64 -255>, <2 x i64> %a
284 %chi = icmp sgt <2 x i64> %lo, <i64 255, i64 255>
285 %hi = select <2 x i1> %chi, <2 x i64> <i64 255, i64 255>, <2 x i64> %lo
286 %cvt = sitofp <2 x i64> %hi to <2 x double>
287 ret <2 x double> %cvt