1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; Tests for SSE1 and below, without SSE2+.
3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 -O3 | FileCheck %s --check-prefix=X32
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefix=X64
7 ;define <4 x i32> @test3(<4 x i16> %a) nounwind {
8 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
12 ; This should not emit shuffles to populate the top 2 elements of the 4-element
13 ; vector that this ends up returning.
15 define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind {
17 ; X32: # BB#0: # %entry
18 ; X32-NEXT: movaps %xmm0, %xmm2
19 ; X32-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
20 ; X32-NEXT: addss %xmm1, %xmm0
21 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
22 ; X32-NEXT: subss %xmm1, %xmm2
23 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
27 ; X64: # BB#0: # %entry
28 ; X64-NEXT: movaps %xmm0, %xmm2
29 ; X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
30 ; X64-NEXT: addss %xmm1, %xmm0
31 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
32 ; X64-NEXT: subss %xmm1, %xmm2
33 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
36 %tmp7 = extractelement <2 x float> %A, i32 0
37 %tmp5 = extractelement <2 x float> %A, i32 1
38 %tmp3 = extractelement <2 x float> %B, i32 0
39 %tmp1 = extractelement <2 x float> %B, i32 1
40 %add.r = fadd float %tmp7, %tmp3
41 %add.i = fsub float %tmp5, %tmp1
42 %tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
43 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
47 ; We used to get stuck in type legalization for this example when lowering the
48 ; vselect. With SSE1 v4f32 is a legal type but v4i1 (or any vector integer type)
49 ; is not. We used to ping pong between splitting the vselect for the v4i
50 ; condition operand and widening the resulting vselect for the v4f32 result.
53 define <4 x float> @vselect(<4 x float>*%p, <4 x i32> %q) {
55 ; X32: # BB#0: # %entry
56 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
57 ; X32-NEXT: xorps %xmm0, %xmm0
58 ; X32-NEXT: je .LBB1_1
59 ; X32-NEXT: # BB#2: # %entry
60 ; X32-NEXT: xorps %xmm1, %xmm1
61 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
62 ; X32-NEXT: jne .LBB1_5
64 ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
65 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
66 ; X32-NEXT: jne .LBB1_8
68 ; X32-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
69 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
70 ; X32-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
71 ; X32-NEXT: je .LBB1_10
72 ; X32-NEXT: jmp .LBB1_11
74 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
75 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
76 ; X32-NEXT: je .LBB1_4
77 ; X32-NEXT: .LBB1_5: # %entry
78 ; X32-NEXT: xorps %xmm2, %xmm2
79 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
80 ; X32-NEXT: je .LBB1_7
81 ; X32-NEXT: .LBB1_8: # %entry
82 ; X32-NEXT: xorps %xmm3, %xmm3
83 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
84 ; X32-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
85 ; X32-NEXT: jne .LBB1_11
87 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
88 ; X32-NEXT: .LBB1_11: # %entry
89 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
90 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
94 ; X64: # BB#0: # %entry
95 ; X64-NEXT: testl %ecx, %ecx
96 ; X64-NEXT: xorps %xmm0, %xmm0
97 ; X64-NEXT: je .LBB1_1
98 ; X64-NEXT: # BB#2: # %entry
99 ; X64-NEXT: xorps %xmm1, %xmm1
100 ; X64-NEXT: testl %edx, %edx
101 ; X64-NEXT: jne .LBB1_5
103 ; X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
104 ; X64-NEXT: testl %r8d, %r8d
105 ; X64-NEXT: jne .LBB1_8
107 ; X64-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
108 ; X64-NEXT: testl %esi, %esi
109 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
110 ; X64-NEXT: je .LBB1_10
111 ; X64-NEXT: jmp .LBB1_11
113 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
114 ; X64-NEXT: testl %edx, %edx
115 ; X64-NEXT: je .LBB1_4
116 ; X64-NEXT: .LBB1_5: # %entry
117 ; X64-NEXT: xorps %xmm2, %xmm2
118 ; X64-NEXT: testl %r8d, %r8d
119 ; X64-NEXT: je .LBB1_7
120 ; X64-NEXT: .LBB1_8: # %entry
121 ; X64-NEXT: xorps %xmm3, %xmm3
122 ; X64-NEXT: testl %esi, %esi
123 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
124 ; X64-NEXT: jne .LBB1_11
125 ; X64-NEXT: .LBB1_10:
126 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
127 ; X64-NEXT: .LBB1_11: # %entry
128 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
129 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
132 %a1 = icmp eq <4 x i32> %q, zeroinitializer
133 %a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer
137 ; v4i32 isn't legal for SSE1, but this should be cmpps.
139 define <4 x float> @PR28044(<4 x float> %a0, <4 x float> %a1) nounwind {
140 ; X32-LABEL: PR28044:
142 ; X32-NEXT: cmpeqps %xmm1, %xmm0
145 ; X64-LABEL: PR28044:
147 ; X64-NEXT: cmpeqps %xmm1, %xmm0
149 %cmp = fcmp oeq <4 x float> %a0, %a1
150 %sext = sext <4 x i1> %cmp to <4 x i32>
151 %res = bitcast <4 x i32> %sext to <4 x float>
155 ; Don't crash trying to do the impossible: an integer vector comparison doesn't exist, so we must scalarize.
156 ; https://llvm.org/bugs/show_bug.cgi?id=30512
158 define <4 x i32> @PR30512(<4 x i32> %x, <4 x i32> %y) nounwind {
159 ; X32-LABEL: PR30512:
161 ; X32-NEXT: pushl %ebp
162 ; X32-NEXT: pushl %ebx
163 ; X32-NEXT: pushl %edi
164 ; X32-NEXT: pushl %esi
165 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
166 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
167 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
168 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
169 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
170 ; X32-NEXT: xorl %ecx, %ecx
171 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edx
173 ; X32-NEXT: xorl %edx, %edx
174 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %ebx
176 ; X32-NEXT: xorl %ebx, %ebx
177 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edi
179 ; X32-NEXT: xorl %eax, %eax
180 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %esi
182 ; X32-NEXT: movl %eax, 12(%ebp)
183 ; X32-NEXT: movl %ebx, 8(%ebp)
184 ; X32-NEXT: movl %edx, 4(%ebp)
185 ; X32-NEXT: movl %ecx, (%ebp)
186 ; X32-NEXT: movl %ebp, %eax
187 ; X32-NEXT: popl %esi
188 ; X32-NEXT: popl %edi
189 ; X32-NEXT: popl %ebx
190 ; X32-NEXT: popl %ebp
193 ; X64-LABEL: PR30512:
195 ; X64-NEXT: xorl %eax, %eax
196 ; X64-NEXT: cmpl %r9d, %esi
198 ; X64-NEXT: xorl %esi, %esi
199 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %edx
200 ; X64-NEXT: sete %sil
201 ; X64-NEXT: xorl %edx, %edx
202 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %ecx
204 ; X64-NEXT: xorl %ecx, %ecx
205 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %r8d
207 ; X64-NEXT: movl %ecx, 12(%rdi)
208 ; X64-NEXT: movl %edx, 8(%rdi)
209 ; X64-NEXT: movl %esi, 4(%rdi)
210 ; X64-NEXT: movl %eax, (%rdi)
211 ; X64-NEXT: movq %rdi, %rax
213 %cmp = icmp eq <4 x i32> %x, %y
214 %zext = zext <4 x i1> %cmp to <4 x i32>
218 ; Fragile test warning - we need to induce the generation of a vselect
219 ; post-legalization to cause the crash seen in:
220 ; https://llvm.org/bugs/show_bug.cgi?id=31672
221 ; Is there a way to do that without an unsafe/fast sqrt intrinsic call?
222 ; Also, although the goal for adding this test is to prove that we
223 ; don't crash, I have no idea what this code is doing, so I'm keeping
224 ; the full codegen checks in case there's motivation to improve this.
226 define <2 x float> @PR31672() #0 {
227 ; X32-LABEL: PR31672:
229 ; X32-NEXT: pushl %ebp
230 ; X32-NEXT: movl %esp, %ebp
231 ; X32-NEXT: andl $-16, %esp
232 ; X32-NEXT: subl $80, %esp
233 ; X32-NEXT: xorps %xmm0, %xmm0
234 ; X32-NEXT: movaps {{.*#+}} xmm1 = <42,3,u,u>
235 ; X32-NEXT: movaps %xmm1, %xmm2
236 ; X32-NEXT: cmpeqps %xmm0, %xmm2
237 ; X32-NEXT: movaps %xmm2, {{[0-9]+}}(%esp)
238 ; X32-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
239 ; X32-NEXT: rsqrtps %xmm1, %xmm0
240 ; X32-NEXT: mulps %xmm0, %xmm1
241 ; X32-NEXT: mulps %xmm0, %xmm1
242 ; X32-NEXT: addps {{\.LCPI.*}}, %xmm1
243 ; X32-NEXT: mulps {{\.LCPI.*}}, %xmm0
244 ; X32-NEXT: mulps %xmm1, %xmm0
245 ; X32-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
246 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
247 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
248 ; X32-NEXT: andl %eax, %ecx
249 ; X32-NEXT: notl %eax
250 ; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
251 ; X32-NEXT: orl %ecx, %eax
252 ; X32-NEXT: movl %eax, (%esp)
253 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
254 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
255 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
256 ; X32-NEXT: andl %ecx, %edx
257 ; X32-NEXT: notl %ecx
258 ; X32-NEXT: andl {{[0-9]+}}(%esp), %ecx
259 ; X32-NEXT: orl %edx, %ecx
260 ; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
261 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
262 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
263 ; X32-NEXT: andl %ecx, %edx
264 ; X32-NEXT: notl %ecx
265 ; X32-NEXT: andl {{[0-9]+}}(%esp), %ecx
266 ; X32-NEXT: orl %edx, %ecx
267 ; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
268 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
269 ; X32-NEXT: andl %eax, %ecx
270 ; X32-NEXT: notl %eax
271 ; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
272 ; X32-NEXT: orl %ecx, %eax
273 ; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
274 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
275 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
276 ; X32-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
277 ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
278 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
279 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
280 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
281 ; X32-NEXT: movl %ebp, %esp
282 ; X32-NEXT: popl %ebp
285 ; X64-LABEL: PR31672:
287 ; X64-NEXT: xorps %xmm0, %xmm0
288 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
289 ; X64-NEXT: movaps {{.*#+}} xmm1 = <42,3,u,u>
290 ; X64-NEXT: cmpeqps %xmm1, %xmm0
291 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
292 ; X64-NEXT: rsqrtps %xmm1, %xmm0
293 ; X64-NEXT: mulps %xmm0, %xmm1
294 ; X64-NEXT: mulps %xmm0, %xmm1
295 ; X64-NEXT: addps {{.*}}(%rip), %xmm1
296 ; X64-NEXT: mulps {{.*}}(%rip), %xmm0
297 ; X64-NEXT: mulps %xmm1, %xmm0
298 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
299 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r8
300 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r9
301 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r10
302 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rdi
303 ; X64-NEXT: movl %r9d, %esi
304 ; X64-NEXT: andl %edi, %esi
305 ; X64-NEXT: movl %edi, %ecx
306 ; X64-NEXT: notl %ecx
307 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rdx
308 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax
309 ; X64-NEXT: andl %eax, %ecx
310 ; X64-NEXT: orl %esi, %ecx
311 ; X64-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
312 ; X64-NEXT: movl %r8d, %ecx
313 ; X64-NEXT: andl %r10d, %ecx
314 ; X64-NEXT: movl %r10d, %esi
315 ; X64-NEXT: notl %esi
316 ; X64-NEXT: andl %edx, %esi
317 ; X64-NEXT: orl %ecx, %esi
318 ; X64-NEXT: movl %esi, -{{[0-9]+}}(%rsp)
319 ; X64-NEXT: shrq $32, %r9
320 ; X64-NEXT: shrq $32, %rdi
321 ; X64-NEXT: andl %edi, %r9d
322 ; X64-NEXT: notl %edi
323 ; X64-NEXT: shrq $32, %rax
324 ; X64-NEXT: andl %edi, %eax
325 ; X64-NEXT: orl %r9d, %eax
326 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
327 ; X64-NEXT: shrq $32, %r8
328 ; X64-NEXT: shrq $32, %r10
329 ; X64-NEXT: andl %r10d, %r8d
330 ; X64-NEXT: notl %r10d
331 ; X64-NEXT: shrq $32, %rdx
332 ; X64-NEXT: andl %r10d, %edx
333 ; X64-NEXT: orl %r8d, %edx
334 ; X64-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
335 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
336 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
337 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
338 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
339 ; X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
340 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
341 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
343 %t0 = call fast <2 x float> @llvm.sqrt.v2f32(<2 x float> <float 42.0, float 3.0>)
347 declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) #1
349 attributes #0 = { nounwind "unsafe-fp-math"="true" }