1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
3 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
6 define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
7 ; SSE-LABEL: test_x86_sse3_addsub_pd:
9 ; SSE-NEXT: addsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd0,0xc1]
10 ; SSE-NEXT: retl ## encoding: [0xc3]
12 ; VCHECK-LABEL: test_x86_sse3_addsub_pd:
14 ; VCHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd0,0xc1]
15 ; VCHECK-NEXT: retl ## encoding: [0xc3]
16 %res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
19 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
22 define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) {
23 ; SSE-LABEL: test_x86_sse3_addsub_ps:
25 ; SSE-NEXT: addsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0xd0,0xc1]
26 ; SSE-NEXT: retl ## encoding: [0xc3]
28 ; VCHECK-LABEL: test_x86_sse3_addsub_ps:
30 ; VCHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xd0,0xc1]
31 ; VCHECK-NEXT: retl ## encoding: [0xc3]
32 %res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
35 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
38 define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) {
39 ; SSE-LABEL: test_x86_sse3_hadd_pd:
41 ; SSE-NEXT: haddpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7c,0xc1]
42 ; SSE-NEXT: retl ## encoding: [0xc3]
44 ; VCHECK-LABEL: test_x86_sse3_hadd_pd:
46 ; VCHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7c,0xc1]
47 ; VCHECK-NEXT: retl ## encoding: [0xc3]
48 %res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
51 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
54 define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) {
55 ; SSE-LABEL: test_x86_sse3_hadd_ps:
57 ; SSE-NEXT: haddps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7c,0xc1]
58 ; SSE-NEXT: retl ## encoding: [0xc3]
60 ; VCHECK-LABEL: test_x86_sse3_hadd_ps:
62 ; VCHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7c,0xc1]
63 ; VCHECK-NEXT: retl ## encoding: [0xc3]
64 %res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
67 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
70 define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) {
71 ; SSE-LABEL: test_x86_sse3_hsub_pd:
73 ; SSE-NEXT: hsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7d,0xc1]
74 ; SSE-NEXT: retl ## encoding: [0xc3]
76 ; VCHECK-LABEL: test_x86_sse3_hsub_pd:
78 ; VCHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7d,0xc1]
79 ; VCHECK-NEXT: retl ## encoding: [0xc3]
80 %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
83 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
86 define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) {
87 ; SSE-LABEL: test_x86_sse3_hsub_ps:
89 ; SSE-NEXT: hsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7d,0xc1]
90 ; SSE-NEXT: retl ## encoding: [0xc3]
92 ; VCHECK-LABEL: test_x86_sse3_hsub_ps:
94 ; VCHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7d,0xc1]
95 ; VCHECK-NEXT: retl ## encoding: [0xc3]
96 %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
99 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
102 define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) {
103 ; SSE-LABEL: test_x86_sse3_ldu_dq:
105 ; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
106 ; SSE-NEXT: lddqu (%eax), %xmm0 ## encoding: [0xf2,0x0f,0xf0,0x00]
107 ; SSE-NEXT: retl ## encoding: [0xc3]
109 ; VCHECK-LABEL: test_x86_sse3_ldu_dq:
111 ; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
112 ; VCHECK-NEXT: vlddqu (%eax), %xmm0 ## encoding: [0xc5,0xfb,0xf0,0x00]
113 ; VCHECK-NEXT: retl ## encoding: [0xc3]
114 %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1]
117 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly