1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-SSE2
3 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-unknown-unknown"
6 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
7 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0001
8 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,0,1]
9 ; CHECK-SSE2-NEXT: retq
10 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
11 ret <4 x i32> %shuffle
13 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
14 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0020
15 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,2,0]
16 ; CHECK-SSE2-NEXT: retq
17 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
18 ret <4 x i32> %shuffle
20 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
21 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0300
22 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,3,0,0]
23 ; CHECK-SSE2-NEXT: retq
24 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
25 ret <4 x i32> %shuffle
27 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
28 ; CHECK-SSE2-LABEL: @shuffle_v4i32_1000
29 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[1,0,0,0]
30 ; CHECK-SSE2-NEXT: retq
31 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
32 ret <4 x i32> %shuffle
34 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
35 ; CHECK-SSE2-LABEL: @shuffle_v4i32_2200
36 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[2,2,0,0]
37 ; CHECK-SSE2-NEXT: retq
38 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
39 ret <4 x i32> %shuffle
41 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
42 ; CHECK-SSE2-LABEL: @shuffle_v4i32_3330
43 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,3,3,0]
44 ; CHECK-SSE2-NEXT: retq
45 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
46 ret <4 x i32> %shuffle
48 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
49 ; CHECK-SSE2-LABEL: @shuffle_v4i32_3210
50 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,2,1,0]
51 ; CHECK-SSE2-NEXT: retq
52 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
53 ret <4 x i32> %shuffle
56 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
57 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0001
58 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,0,1]
59 ; CHECK-SSE2-NEXT: retq
60 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
61 ret <4 x float> %shuffle
63 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
64 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0020
65 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,2,0]
66 ; CHECK-SSE2-NEXT: retq
67 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
68 ret <4 x float> %shuffle
70 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
71 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0300
72 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,3,0,0]
73 ; CHECK-SSE2-NEXT: retq
74 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
75 ret <4 x float> %shuffle
77 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
78 ; CHECK-SSE2-LABEL: @shuffle_v4f32_1000
79 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[1,0,0,0]
80 ; CHECK-SSE2-NEXT: retq
81 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
82 ret <4 x float> %shuffle
84 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
85 ; CHECK-SSE2-LABEL: @shuffle_v4f32_2200
86 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[2,2,0,0]
87 ; CHECK-SSE2-NEXT: retq
88 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
89 ret <4 x float> %shuffle
91 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
92 ; CHECK-SSE2-LABEL: @shuffle_v4f32_3330
93 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,3,3,0]
94 ; CHECK-SSE2-NEXT: retq
95 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
96 ret <4 x float> %shuffle
98 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
99 ; CHECK-SSE2-LABEL: @shuffle_v4f32_3210
100 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,2,1,0]
101 ; CHECK-SSE2-NEXT: retq
102 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
103 ret <4 x float> %shuffle
106 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
107 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0124
108 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
109 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
110 ; CHECK-SSE2-NEXT: retq
111 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
112 ret <4 x i32> %shuffle
114 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
115 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0142
116 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
117 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,2]
118 ; CHECK-SSE2-NEXT: retq
119 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
120 ret <4 x i32> %shuffle
122 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
123 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0412
124 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
125 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
126 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
127 ; CHECK-SSE2-NEXT: retq
128 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
129 ret <4 x i32> %shuffle
131 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
132 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4012
133 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
134 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
135 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
136 ; CHECK-SSE2-NEXT: retq
137 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
138 ret <4 x i32> %shuffle
140 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
141 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0145
142 ; CHECK-SSE2: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[0]
143 ; CHECK-SSE2-NEXT: retq
144 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
145 ret <4 x i32> %shuffle
147 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
148 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0451
149 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
150 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,3,1]
151 ; CHECK-SSE2-NEXT: retq
152 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
153 ret <4 x i32> %shuffle
155 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
156 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4501
157 ; CHECK-SSE2: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[0]
158 ; CHECK-SSE2-NEXT: movapd %xmm1, %xmm0
159 ; CHECK-SSE2-NEXT: retq
160 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
161 ret <4 x i32> %shuffle
163 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
164 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4015
165 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
166 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0,1,3]
167 ; CHECK-SSE2-NEXT: retq
168 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
169 ret <4 x i32> %shuffle