1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG
3 ; RUN: llc -mtriple=x86_64-darwin-unknown -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
4 ; RUN: llc -mtriple=x86_64-darwin-unknown -mcpu=knl < %s | FileCheck %s --check-prefix=KNL
6 ; Get the actual value of the overflow bit.
9 define zeroext i1 @saddo.i8(i8 signext %v1, i8 signext %v2, i8* %res) {
11 ; CHECK-LABEL: saddo.i8
12 ; CHECK: addb %sil, %dil
13 ; CHECK-NEXT: seto %al
14 %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 %v1, i8 %v2)
15 %val = extractvalue {i8, i1} %t, 0
16 %obit = extractvalue {i8, i1} %t, 1
17 store i8 %val, i8* %res
21 define zeroext i1 @saddo.i16(i16 %v1, i16 %v2, i16* %res) {
23 ; CHECK-LABEL: saddo.i16
24 ; CHECK: addw %si, %di
25 ; CHECK-NEXT: seto %al
26 %t = call {i16, i1} @llvm.sadd.with.overflow.i16(i16 %v1, i16 %v2)
27 %val = extractvalue {i16, i1} %t, 0
28 %obit = extractvalue {i16, i1} %t, 1
29 store i16 %val, i16* %res
33 define zeroext i1 @saddo.i32(i32 %v1, i32 %v2, i32* %res) {
35 ; CHECK-LABEL: saddo.i32
36 ; CHECK: addl %esi, %edi
37 ; CHECK-NEXT: seto %al
38 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
39 %val = extractvalue {i32, i1} %t, 0
40 %obit = extractvalue {i32, i1} %t, 1
41 store i32 %val, i32* %res
45 define zeroext i1 @saddo.i64(i64 %v1, i64 %v2, i64* %res) {
47 ; CHECK-LABEL: saddo.i64
48 ; CHECK: addq %rsi, %rdi
49 ; CHECK-NEXT: seto %al
50 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)
51 %val = extractvalue {i64, i1} %t, 0
52 %obit = extractvalue {i64, i1} %t, 1
53 store i64 %val, i64* %res
58 define zeroext i1 @saddo.inc.i8(i8 %v1, i8* %res) {
60 ; CHECK-LABEL: saddo.inc.i8
62 ; CHECK-NEXT: seto %al
63 %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 %v1, i8 1)
64 %val = extractvalue {i8, i1} %t, 0
65 %obit = extractvalue {i8, i1} %t, 1
66 store i8 %val, i8* %res
70 define zeroext i1 @saddo.inc.i16(i16 %v1, i16* %res) {
72 ; CHECK-LABEL: saddo.inc.i16
74 ; CHECK-NEXT: seto %al
75 %t = call {i16, i1} @llvm.sadd.with.overflow.i16(i16 %v1, i16 1)
76 %val = extractvalue {i16, i1} %t, 0
77 %obit = extractvalue {i16, i1} %t, 1
78 store i16 %val, i16* %res
82 define zeroext i1 @saddo.inc.i32(i32 %v1, i32* %res) {
84 ; CHECK-LABEL: saddo.inc.i32
86 ; CHECK-NEXT: seto %al
87 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 1)
88 %val = extractvalue {i32, i1} %t, 0
89 %obit = extractvalue {i32, i1} %t, 1
90 store i32 %val, i32* %res
94 define zeroext i1 @saddo.inc.i64(i64 %v1, i64* %res) {
96 ; CHECK-LABEL: saddo.inc.i64
98 ; CHECK-NEXT: seto %al
99 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 1)
100 %val = extractvalue {i64, i1} %t, 0
101 %obit = extractvalue {i64, i1} %t, 1
102 store i64 %val, i64* %res
106 ; SADDO reg, imm | imm, reg
107 ; FIXME: DAG doesn't optimize immediates on the LHS.
108 define zeroext i1 @saddo.i64imm1(i64 %v1, i64* %res) {
110 ; SDAG-LABEL: saddo.i64imm1
114 ; FAST-LABEL: saddo.i64imm1
115 ; FAST: addq $2, %rdi
116 ; FAST-NEXT: seto %al
117 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 2, i64 %v1)
118 %val = extractvalue {i64, i1} %t, 0
119 %obit = extractvalue {i64, i1} %t, 1
120 store i64 %val, i64* %res
124 ; Check boundary conditions for large immediates.
125 define zeroext i1 @saddo.i64imm2(i64 %v1, i64* %res) {
127 ; CHECK-LABEL: saddo.i64imm2
128 ; CHECK: addq $-2147483648, %rdi
129 ; CHECK-NEXT: seto %al
130 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 -2147483648)
131 %val = extractvalue {i64, i1} %t, 0
132 %obit = extractvalue {i64, i1} %t, 1
133 store i64 %val, i64* %res
137 define zeroext i1 @saddo.i64imm3(i64 %v1, i64* %res) {
139 ; CHECK-LABEL: saddo.i64imm3
140 ; CHECK: movabsq $-21474836489, %[[REG:[a-z]+]]
141 ; CHECK-NEXT: addq %rdi, %[[REG]]
143 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 -21474836489)
144 %val = extractvalue {i64, i1} %t, 0
145 %obit = extractvalue {i64, i1} %t, 1
146 store i64 %val, i64* %res
150 define zeroext i1 @saddo.i64imm4(i64 %v1, i64* %res) {
152 ; CHECK-LABEL: saddo.i64imm4
153 ; CHECK: addq $2147483647, %rdi
155 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 2147483647)
156 %val = extractvalue {i64, i1} %t, 0
157 %obit = extractvalue {i64, i1} %t, 1
158 store i64 %val, i64* %res
162 define zeroext i1 @saddo.i64imm5(i64 %v1, i64* %res) {
164 ; CHECK-LABEL: saddo.i64imm5
165 ; CHECK: movl $2147483648
168 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 2147483648)
169 %val = extractvalue {i64, i1} %t, 0
170 %obit = extractvalue {i64, i1} %t, 1
171 store i64 %val, i64* %res
176 define zeroext i1 @uaddo.i32(i32 %v1, i32 %v2, i32* %res) {
178 ; CHECK-LABEL: uaddo.i32
179 ; CHECK: addl %esi, %edi
180 ; CHECK-NEXT: setb %al
181 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
182 %val = extractvalue {i32, i1} %t, 0
183 %obit = extractvalue {i32, i1} %t, 1
184 store i32 %val, i32* %res
188 define zeroext i1 @uaddo.i64(i64 %v1, i64 %v2, i64* %res) {
190 ; CHECK-LABEL: uaddo.i64
191 ; CHECK: addq %rsi, %rdi
192 ; CHECK-NEXT: setb %al
193 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)
194 %val = extractvalue {i64, i1} %t, 0
195 %obit = extractvalue {i64, i1} %t, 1
196 store i64 %val, i64* %res
200 ; UADDO reg, 1 | NOT INC
201 define zeroext i1 @uaddo.inc.i8(i8 %v1, i8* %res) {
203 ; CHECK-LABEL: uaddo.inc.i8
204 ; CHECK-NOT: incb %dil
205 %t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 %v1, i8 1)
206 %val = extractvalue {i8, i1} %t, 0
207 %obit = extractvalue {i8, i1} %t, 1
208 store i8 %val, i8* %res
212 define zeroext i1 @uaddo.inc.i16(i16 %v1, i16* %res) {
214 ; CHECK-LABEL: uaddo.inc.i16
215 ; CHECK-NOT: incw %di
216 %t = call {i16, i1} @llvm.uadd.with.overflow.i16(i16 %v1, i16 1)
217 %val = extractvalue {i16, i1} %t, 0
218 %obit = extractvalue {i16, i1} %t, 1
219 store i16 %val, i16* %res
223 define zeroext i1 @uaddo.inc.i32(i32 %v1, i32* %res) {
225 ; CHECK-LABEL: uaddo.inc.i32
226 ; CHECK-NOT: incl %edi
227 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 1)
228 %val = extractvalue {i32, i1} %t, 0
229 %obit = extractvalue {i32, i1} %t, 1
230 store i32 %val, i32* %res
234 define zeroext i1 @uaddo.inc.i64(i64 %v1, i64* %res) {
236 ; CHECK-LABEL: uaddo.inc.i64
237 ; CHECK-NOT: incq %rdi
238 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 1)
239 %val = extractvalue {i64, i1} %t, 0
240 %obit = extractvalue {i64, i1} %t, 1
241 store i64 %val, i64* %res
246 define zeroext i1 @ssubo.i32(i32 %v1, i32 %v2, i32* %res) {
248 ; CHECK-LABEL: ssubo.i32
249 ; CHECK: subl %esi, %edi
250 ; CHECK-NEXT: seto %al
251 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
252 %val = extractvalue {i32, i1} %t, 0
253 %obit = extractvalue {i32, i1} %t, 1
254 store i32 %val, i32* %res
258 define zeroext i1 @ssubo.i64(i64 %v1, i64 %v2, i64* %res) {
260 ; CHECK-LABEL: ssubo.i64
261 ; CHECK: subq %rsi, %rdi
262 ; CHECK-NEXT: seto %al
263 %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)
264 %val = extractvalue {i64, i1} %t, 0
265 %obit = extractvalue {i64, i1} %t, 1
266 store i64 %val, i64* %res
271 define zeroext i1 @usubo.i32(i32 %v1, i32 %v2, i32* %res) {
273 ; CHECK-LABEL: usubo.i32
274 ; CHECK: subl %esi, %edi
275 ; CHECK-NEXT: setb %al
276 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
277 %val = extractvalue {i32, i1} %t, 0
278 %obit = extractvalue {i32, i1} %t, 1
279 store i32 %val, i32* %res
283 define zeroext i1 @usubo.i64(i64 %v1, i64 %v2, i64* %res) {
285 ; CHECK-LABEL: usubo.i64
286 ; CHECK: subq %rsi, %rdi
287 ; CHECK-NEXT: setb %al
288 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)
289 %val = extractvalue {i64, i1} %t, 0
290 %obit = extractvalue {i64, i1} %t, 1
291 store i64 %val, i64* %res
296 define zeroext i1 @smulo.i8(i8 %v1, i8 %v2, i8* %res) {
298 ; CHECK-LABEL: smulo.i8
299 ; CHECK: movl %edi, %eax
300 ; CHECK-NEXT: imulb %sil
301 ; CHECK-NEXT: seto %cl
302 %t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 %v1, i8 %v2)
303 %val = extractvalue {i8, i1} %t, 0
304 %obit = extractvalue {i8, i1} %t, 1
305 store i8 %val, i8* %res
309 define zeroext i1 @smulo.i16(i16 %v1, i16 %v2, i16* %res) {
311 ; CHECK-LABEL: smulo.i16
312 ; CHECK: imulw %si, %di
313 ; CHECK-NEXT: seto %al
314 %t = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %v1, i16 %v2)
315 %val = extractvalue {i16, i1} %t, 0
316 %obit = extractvalue {i16, i1} %t, 1
317 store i16 %val, i16* %res
321 define zeroext i1 @smulo.i32(i32 %v1, i32 %v2, i32* %res) {
323 ; CHECK-LABEL: smulo.i32
324 ; CHECK: imull %esi, %edi
325 ; CHECK-NEXT: seto %al
326 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
327 %val = extractvalue {i32, i1} %t, 0
328 %obit = extractvalue {i32, i1} %t, 1
329 store i32 %val, i32* %res
333 define zeroext i1 @smulo.i64(i64 %v1, i64 %v2, i64* %res) {
335 ; CHECK-LABEL: smulo.i64
336 ; CHECK: imulq %rsi, %rdi
337 ; CHECK-NEXT: seto %al
338 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
339 %val = extractvalue {i64, i1} %t, 0
340 %obit = extractvalue {i64, i1} %t, 1
341 store i64 %val, i64* %res
346 define zeroext i1 @umulo.i8(i8 %v1, i8 %v2, i8* %res) {
348 ; CHECK-LABEL: umulo.i8
349 ; CHECK: movl %edi, %eax
350 ; CHECK-NEXT: mulb %sil
351 ; CHECK-NEXT: seto %cl
352 %t = call {i8, i1} @llvm.umul.with.overflow.i8(i8 %v1, i8 %v2)
353 %val = extractvalue {i8, i1} %t, 0
354 %obit = extractvalue {i8, i1} %t, 1
355 store i8 %val, i8* %res
359 define zeroext i1 @umulo.i16(i16 %v1, i16 %v2, i16* %res) {
361 ; CHECK-LABEL: umulo.i16
364 %t = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %v1, i16 %v2)
365 %val = extractvalue {i16, i1} %t, 0
366 %obit = extractvalue {i16, i1} %t, 1
367 store i16 %val, i16* %res
371 define zeroext i1 @umulo.i32(i32 %v1, i32 %v2, i32* %res) {
373 ; CHECK-LABEL: umulo.i32
376 %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
377 %val = extractvalue {i32, i1} %t, 0
378 %obit = extractvalue {i32, i1} %t, 1
379 store i32 %val, i32* %res
383 define zeroext i1 @umulo.i64(i64 %v1, i64 %v2, i64* %res) {
385 ; CHECK-LABEL: umulo.i64
388 %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)
389 %val = extractvalue {i64, i1} %t, 0
390 %obit = extractvalue {i64, i1} %t, 1
391 store i64 %val, i64* %res
396 ; Check the use of the overflow bit in combination with a select instruction.
398 define i32 @saddo.select.i32(i32 %v1, i32 %v2) {
400 ; CHECK-LABEL: saddo.select.i32
401 ; CHECK: addl %esi, %eax
402 ; CHECK-NEXT: cmovol %edi, %esi
403 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
404 %obit = extractvalue {i32, i1} %t, 1
405 %ret = select i1 %obit, i32 %v1, i32 %v2
409 define i64 @saddo.select.i64(i64 %v1, i64 %v2) {
411 ; CHECK-LABEL: saddo.select.i64
412 ; CHECK: addq %rsi, %rax
413 ; CHECK-NEXT: cmovoq %rdi, %rsi
414 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)
415 %obit = extractvalue {i64, i1} %t, 1
416 %ret = select i1 %obit, i64 %v1, i64 %v2
420 define i32 @uaddo.select.i32(i32 %v1, i32 %v2) {
422 ; CHECK-LABEL: uaddo.select.i32
423 ; CHECK: addl %esi, %eax
424 ; CHECK-NEXT: cmovbl %edi, %esi
425 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
426 %obit = extractvalue {i32, i1} %t, 1
427 %ret = select i1 %obit, i32 %v1, i32 %v2
431 define i64 @uaddo.select.i64(i64 %v1, i64 %v2) {
433 ; CHECK-LABEL: uaddo.select.i64
434 ; CHECK: addq %rsi, %rax
435 ; CHECK-NEXT: cmovbq %rdi, %rsi
436 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)
437 %obit = extractvalue {i64, i1} %t, 1
438 %ret = select i1 %obit, i64 %v1, i64 %v2
442 define i32 @ssubo.select.i32(i32 %v1, i32 %v2) {
444 ; CHECK-LABEL: ssubo.select.i32
445 ; CHECK: cmpl %esi, %edi
446 ; CHECK-NEXT: cmovol %edi, %esi
447 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
448 %obit = extractvalue {i32, i1} %t, 1
449 %ret = select i1 %obit, i32 %v1, i32 %v2
453 define i64 @ssubo.select.i64(i64 %v1, i64 %v2) {
455 ; CHECK-LABEL: ssubo.select.i64
456 ; CHECK: cmpq %rsi, %rdi
457 ; CHECK-NEXT: cmovoq %rdi, %rsi
458 %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)
459 %obit = extractvalue {i64, i1} %t, 1
460 %ret = select i1 %obit, i64 %v1, i64 %v2
464 define i32 @usubo.select.i32(i32 %v1, i32 %v2) {
466 ; CHECK-LABEL: usubo.select.i32
467 ; CHECK: cmpl %esi, %edi
468 ; CHECK-NEXT: cmovbl %edi, %esi
469 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
470 %obit = extractvalue {i32, i1} %t, 1
471 %ret = select i1 %obit, i32 %v1, i32 %v2
475 define i64 @usubo.select.i64(i64 %v1, i64 %v2) {
477 ; CHECK-LABEL: usubo.select.i64
478 ; CHECK: cmpq %rsi, %rdi
479 ; CHECK-NEXT: cmovbq %rdi, %rsi
480 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)
481 %obit = extractvalue {i64, i1} %t, 1
482 %ret = select i1 %obit, i64 %v1, i64 %v2
486 define i32 @smulo.select.i32(i32 %v1, i32 %v2) {
488 ; CHECK-LABEL: smulo.select.i32
489 ; CHECK: imull %esi, %eax
490 ; CHECK-NEXT: cmovol %edi, %esi
491 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
492 %obit = extractvalue {i32, i1} %t, 1
493 %ret = select i1 %obit, i32 %v1, i32 %v2
497 define i64 @smulo.select.i64(i64 %v1, i64 %v2) {
499 ; CHECK-LABEL: smulo.select.i64
500 ; CHECK: imulq %rsi, %rax
501 ; CHECK-NEXT: cmovoq %rdi, %rsi
502 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
503 %obit = extractvalue {i64, i1} %t, 1
504 %ret = select i1 %obit, i64 %v1, i64 %v2
508 define i32 @umulo.select.i32(i32 %v1, i32 %v2) {
510 ; CHECK-LABEL: umulo.select.i32
512 ; CHECK-NEXT: cmovol %edi, %esi
513 %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
514 %obit = extractvalue {i32, i1} %t, 1
515 %ret = select i1 %obit, i32 %v1, i32 %v2
519 define i64 @umulo.select.i64(i64 %v1, i64 %v2) {
521 ; CHECK-LABEL: umulo.select.i64
523 ; CHECK-NEXT: cmovoq %rdi, %rsi
524 %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)
525 %obit = extractvalue {i64, i1} %t, 1
526 %ret = select i1 %obit, i64 %v1, i64 %v2
532 ; Check the use of the overflow bit in combination with a branch instruction.
534 define zeroext i1 @saddo.br.i32(i32 %v1, i32 %v2) {
536 ; CHECK-LABEL: saddo.br.i32
537 ; CHECK: addl %esi, %edi
539 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
540 %val = extractvalue {i32, i1} %t, 0
541 %obit = extractvalue {i32, i1} %t, 1
542 br i1 %obit, label %overflow, label %continue, !prof !0
551 define zeroext i1 @saddo.br.i64(i64 %v1, i64 %v2) {
553 ; CHECK-LABEL: saddo.br.i64
554 ; CHECK: addq %rsi, %rdi
556 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)
557 %val = extractvalue {i64, i1} %t, 0
558 %obit = extractvalue {i64, i1} %t, 1
559 br i1 %obit, label %overflow, label %continue, !prof !0
568 define zeroext i1 @uaddo.br.i32(i32 %v1, i32 %v2) {
570 ; CHECK-LABEL: uaddo.br.i32
571 ; CHECK: addl %esi, %edi
573 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
574 %val = extractvalue {i32, i1} %t, 0
575 %obit = extractvalue {i32, i1} %t, 1
576 br i1 %obit, label %overflow, label %continue, !prof !0
585 define zeroext i1 @uaddo.br.i64(i64 %v1, i64 %v2) {
587 ; CHECK-LABEL: uaddo.br.i64
588 ; CHECK: addq %rsi, %rdi
590 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)
591 %val = extractvalue {i64, i1} %t, 0
592 %obit = extractvalue {i64, i1} %t, 1
593 br i1 %obit, label %overflow, label %continue, !prof !0
602 define zeroext i1 @ssubo.br.i32(i32 %v1, i32 %v2) {
604 ; CHECK-LABEL: ssubo.br.i32
605 ; CHECK: cmpl %esi, %edi
607 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
608 %val = extractvalue {i32, i1} %t, 0
609 %obit = extractvalue {i32, i1} %t, 1
610 br i1 %obit, label %overflow, label %continue, !prof !0
619 define zeroext i1 @ssubo.br.i64(i64 %v1, i64 %v2) {
621 ; CHECK-LABEL: ssubo.br.i64
622 ; CHECK: cmpq %rsi, %rdi
624 %t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)
625 %val = extractvalue {i64, i1} %t, 0
626 %obit = extractvalue {i64, i1} %t, 1
627 br i1 %obit, label %overflow, label %continue, !prof !0
636 define zeroext i1 @usubo.br.i32(i32 %v1, i32 %v2) {
638 ; CHECK-LABEL: usubo.br.i32
639 ; CHECK: cmpl %esi, %edi
641 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
642 %val = extractvalue {i32, i1} %t, 0
643 %obit = extractvalue {i32, i1} %t, 1
644 br i1 %obit, label %overflow, label %continue, !prof !0
653 define zeroext i1 @usubo.br.i64(i64 %v1, i64 %v2) {
655 ; CHECK-LABEL: usubo.br.i64
656 ; CHECK: cmpq %rsi, %rdi
658 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)
659 %val = extractvalue {i64, i1} %t, 0
660 %obit = extractvalue {i64, i1} %t, 1
661 br i1 %obit, label %overflow, label %continue, !prof !0
670 define zeroext i1 @smulo.br.i32(i32 %v1, i32 %v2) {
672 ; CHECK-LABEL: smulo.br.i32
673 ; CHECK: imull %esi, %edi
675 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
676 %val = extractvalue {i32, i1} %t, 0
677 %obit = extractvalue {i32, i1} %t, 1
678 br i1 %obit, label %overflow, label %continue, !prof !0
687 define zeroext i1 @smulo.br.i64(i64 %v1, i64 %v2) {
689 ; CHECK-LABEL: smulo.br.i64
690 ; CHECK: imulq %rsi, %rdi
692 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
693 %val = extractvalue {i64, i1} %t, 0
694 %obit = extractvalue {i64, i1} %t, 1
695 br i1 %obit, label %overflow, label %continue, !prof !0
704 define zeroext i1 @umulo.br.i32(i32 %v1, i32 %v2) {
706 ; CHECK-LABEL: umulo.br.i32
709 %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
710 %val = extractvalue {i32, i1} %t, 0
711 %obit = extractvalue {i32, i1} %t, 1
712 br i1 %obit, label %overflow, label %continue, !prof !0
721 define zeroext i1 @umulo.br.i64(i64 %v1, i64 %v2) {
723 ; CHECK-LABEL: umulo.br.i64
726 %t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)
727 %val = extractvalue {i64, i1} %t, 0
728 %obit = extractvalue {i64, i1} %t, 1
729 br i1 %obit, label %overflow, label %continue, !prof !0
738 define i1 @bug27873(i64 %c1, i1 %c2) {
739 ; CHECK-LABEL: bug27873:
741 ; CHECK-NEXT: movl $160, %ecx
742 ; CHECK-NEXT: movq %rdi, %rax
743 ; CHECK-NEXT: mulq %rcx
744 ; CHECK-NEXT: seto %al
745 ; CHECK-NEXT: orb %sil, %al
748 ; KNL-LABEL: bug27873:
750 ; KNL-NEXT: andl $1, %esi
751 ; KNL-NEXT: kmovw %esi, %k0
752 ; KNL-NEXT: movl $160, %ecx
753 ; KNL-NEXT: movq %rdi, %rax
754 ; KNL-NEXT: mulq %rcx
756 ; KNL-NEXT: andl $1, %eax
757 ; KNL-NEXT: kmovw %eax, %k1
758 ; KNL-NEXT: korw %k1, %k0, %k0
759 ; KNL-NEXT: kmovw %k0, %eax
760 ; KNL-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
762 %mul = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %c1, i64 160)
763 %mul.overflow = extractvalue { i64, i1 } %mul, 1
764 %x1 = or i1 %c2, %mul.overflow
768 declare {i8, i1} @llvm.sadd.with.overflow.i8 (i8, i8 ) nounwind readnone
769 declare {i16, i1} @llvm.sadd.with.overflow.i16(i16, i16) nounwind readnone
770 declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
771 declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone
772 declare {i8, i1} @llvm.uadd.with.overflow.i8 (i8, i8 ) nounwind readnone
773 declare {i16, i1} @llvm.uadd.with.overflow.i16(i16, i16) nounwind readnone
774 declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
775 declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
776 declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
777 declare {i64, i1} @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
778 declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
779 declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
780 declare {i8, i1} @llvm.smul.with.overflow.i8 (i8, i8 ) nounwind readnone
781 declare {i16, i1} @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone
782 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
783 declare {i64, i1} @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
784 declare {i8, i1} @llvm.umul.with.overflow.i8 (i8, i8 ) nounwind readnone
785 declare {i16, i1} @llvm.umul.with.overflow.i16(i16, i16) nounwind readnone
786 declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
787 declare {i64, i1} @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
789 !0 = !{!"branch_weights", i32 0, i32 2147483647}