1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s
5 // CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
6 // CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3
7 // CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]]
8 int32x2_t test_vcvta_s32_f32(float32x2_t a) {
9 return vcvta_s32_f32(a);
12 // CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
13 // CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3
14 // CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]]
15 uint32x2_t test_vcvta_u32_f32(float32x2_t a) {
16 return vcvta_u32_f32(a);
19 // CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
20 // CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3
21 // CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]]
22 int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {
23 return vcvtaq_s32_f32(a);
26 // CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
27 // CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3
28 // CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]]
29 uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {
30 return vcvtaq_u32_f32(a);
33 // CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
34 // CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3
35 // CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]]
36 int32x2_t test_vcvtn_s32_f32(float32x2_t a) {
37 return vcvtn_s32_f32(a);
40 // CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
41 // CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3
42 // CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]]
43 uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {
44 return vcvtn_u32_f32(a);
47 // CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
48 // CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3
49 // CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]]
50 int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {
51 return vcvtnq_s32_f32(a);
54 // CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
55 // CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3
56 // CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]]
57 uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {
58 return vcvtnq_u32_f32(a);
61 // CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
62 // CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3
63 // CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]]
64 int32x2_t test_vcvtp_s32_f32(float32x2_t a) {
65 return vcvtp_s32_f32(a);
68 // CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
69 // CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3
70 // CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]]
71 uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {
72 return vcvtp_u32_f32(a);
75 // CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
76 // CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3
77 // CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]]
78 int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {
79 return vcvtpq_s32_f32(a);
82 // CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
83 // CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3
84 // CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]]
85 uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {
86 return vcvtpq_u32_f32(a);
89 // CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
90 // CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3
91 // CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]]
92 int32x2_t test_vcvtm_s32_f32(float32x2_t a) {
93 return vcvtm_s32_f32(a);
96 // CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
97 // CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3
98 // CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]]
99 uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {
100 return vcvtm_u32_f32(a);
103 // CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
104 // CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3
105 // CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]]
106 int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {
107 return vcvtmq_s32_f32(a);
110 // CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
111 // CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3
112 // CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]]
113 uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {
114 return vcvtmq_u32_f32(a);
117 // CHECK: attributes #0 ={{.*}}"min-legal-vector-width"="64"
118 // CHECK: attributes #1 ={{.*}}"min-legal-vector-width"="128"