1 // REQUIRES: arm-registered-target
2 // RUN: %clang_cc1 -Wall -Werror -triple thumbv7-linux-gnueabi -fno-signed-char -O3 -emit-llvm -o - %s | FileCheck %s
4 // Make sure the canonical use works before going into smaller details:
5 int atomic_inc(int *addr) {
8 OldVal = __builtin_arm_ldrex(addr);
9 Failure = __builtin_arm_strex(OldVal + 1, addr);
16 // CHECK: [[OLDVAL:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* %addr)
17 // CHECK: [[INC:%.*]] = add nsw i32 [[OLDVAL]], 1
18 // CHECK: [[FAILURE:%.*]] = tail call i32 @llvm.arm.strex.p0i32(i32 [[INC]], i32* %addr)
19 // CHECK: [[TST:%.*]] = icmp eq i32 [[FAILURE]], 0
20 // CHECK: br i1 [[TST]], label {{%[a-zA-Z0-9.]+}}, label {{%[a-zA-Z0-9.]+}}
26 int test_ldrex(char *addr, long long *addr64, float *addrfloat) {
29 sum += __builtin_arm_ldrex(addr);
30 // CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
31 // CHECK: and i32 [[INTRES]], 255
33 sum += __builtin_arm_ldrex((short *)addr);
34 // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16*
35 // CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i16(i16* [[ADDR16]])
36 // CHECK: [[TMPSEXT:%.*]] = shl i32 [[INTRES]], 16
37 // CHECK: ashr exact i32 [[TMPSEXT]], 16
39 sum += __builtin_arm_ldrex((int *)addr);
40 // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32*
41 // CHECK: call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]])
43 sum += __builtin_arm_ldrex((long long *)addr);
44 // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* %addr)
46 sum += __builtin_arm_ldrex(addr64);
47 // CHECK: [[ADDR64_AS8:%.*]] = bitcast i64* %addr64 to i8*
48 // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* [[ADDR64_AS8]])
50 sum += __builtin_arm_ldrex(addrfloat);
51 // CHECK: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32*
52 // CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[INTADDR]])
53 // CHECK: bitcast i32 [[INTRES]] to float
55 sum += __builtin_arm_ldrex((double *)addr);
56 // CHECK: [[STRUCTRES:%.*]] = tail call { i32, i32 } @llvm.arm.ldrexd(i8* %addr)
57 // CHECK: [[RESHI:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 1
58 // CHECK: [[RESLO:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 0
59 // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64
60 // CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64
61 // CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32
62 // CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]]
63 // CHECK: bitcast i64 [[INTRES]] to double
65 sum += *__builtin_arm_ldrex((int **)addr);
66 // CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]])
67 // CHECK: inttoptr i32 [[INTRES]] to i32*
69 sum += __builtin_arm_ldrex((struct Simple **)addr)->a;
70 // CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]])
71 // CHECK: inttoptr i32 [[INTRES]] to %struct.Simple*
76 int test_strex(char *addr) {
79 struct Simple var = {0};
80 res |= __builtin_arm_strex(4, addr);
81 // CHECK: call i32 @llvm.arm.strex.p0i8(i32 4, i8* %addr)
83 res |= __builtin_arm_strex(42, (short *)addr);
84 // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16*
85 // CHECK: call i32 @llvm.arm.strex.p0i16(i32 42, i16* [[ADDR16]])
87 res |= __builtin_arm_strex(42, (int *)addr);
88 // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32*
89 // CHECK: call i32 @llvm.arm.strex.p0i32(i32 42, i32* [[ADDR32]])
91 res |= __builtin_arm_strex(42, (long long *)addr);
92 // CHECK: call i32 @llvm.arm.strexd(i32 42, i32 0, i8* %addr)
94 res |= __builtin_arm_strex(2.71828f, (float *)addr);
95 // CHECK: call i32 @llvm.arm.strex.p0i32(i32 1076754509, i32* [[ADDR32]])
97 res |= __builtin_arm_strex(3.14159, (double *)addr);
98 // CHECK: call i32 @llvm.arm.strexd(i32 -266631570, i32 1074340345, i8* %addr)
100 res |= __builtin_arm_strex(&var, (struct Simple **)addr);
101 // CHECK: [[INTVAL:%.*]] = ptrtoint i16* %var to i32
102 // CHECK: call i32 @llvm.arm.strex.p0i32(i32 [[INTVAL]], i32* [[ADDR32]])
108 // CHECK: @test_clrex
110 __builtin_arm_clrex();
111 // CHECK: call void @llvm.arm.clrex()