1 # Instructions that are available for the current ISA but should be rejected by
2 # the assembler (e.g. invalid set of operands or operand's restrictions not met).
4 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r6 2>%t1
5 # RUN: FileCheck %s < %t1 -check-prefix=ASM
10 jalr.hb $31 # ASM: :[[@LINE]]:9: error: source and destination must be different
11 jalr.hb $31, $31 # ASM: :[[@LINE]]:9: error: source and destination must be different
12 ldc2 $8,-21181($at) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled