1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 // expected-no-diagnostics
9 long long get_val() { return 0; }
12 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
13 void simple(float *a, float *b, float *c, float *d) {
14 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
15 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
16 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
17 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
18 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
19 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
20 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
21 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
22 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
23 // CHECK: store i32 -1, i32* [[A:%.+]],
24 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
25 // CHECK: store i32 -1, i32* [[R:%[^,]+]],
26 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
27 #pragma omp parallel for simd
28 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
29 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
30 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
31 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
33 // CHECK: br label %[[SWITCH:[^,]+]]
35 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
36 // CHECK: br label %[[SWITCH]]
38 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
39 // CHECK: store i32 [[UP]], i32* [[UB]],
40 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
41 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
43 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
44 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
45 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
46 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
47 for (int i = 3; i < 32; i += 5) {
48 // CHECK: [[SIMPLE_LOOP1_BODY]]:
49 // Start of body: calculate i from IV:
50 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
51 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
52 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
53 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
55 // End of body: store into a[i]:
56 // CHECK: store float [[RESULT:%.+]], float*
57 a[i] = b[i] * c[i] * d[i];
58 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
59 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
60 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
61 // br label %{{.+}}, !llvm.loop !{{.+}}
63 // CHECK: [[SIMPLE_LOOP1_END]]:
64 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
66 long long k = get_val();
68 #pragma omp parallel for simd linear(k : 3) schedule(dynamic)
69 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR:%[^,]+]]
70 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
72 // CHECK: call void @__kmpc_dispatch_init_4(%ident_t* {{.+}}, i32 %{{.+}}, i32 35, i32 0, i32 8, i32 1, i32 1)
73 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
74 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
75 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
77 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
78 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
80 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
81 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
82 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
83 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
84 for (int i = 10; i > 1; i--) {
85 // CHECK: [[SIMPLE_LOOP2_BODY]]:
86 // Start of body: calculate i from IV:
87 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
88 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
89 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
90 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
91 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
93 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
94 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
95 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
96 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
97 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
98 // Update of the privatized version of linear variable!
99 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
102 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
103 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
104 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
105 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
107 // CHECK: [[SIMPLE_LOOP2_END]]:
109 // Update linear vars after loop, as the loop was operating on a private version.
110 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
111 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
112 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* %{{.+}}
115 #pragma omp parallel for simd linear(lin : get_val()), linear(g_ptr)
117 // Init linear private var.
118 // CHECK: [[LIN_VAR:%.+]] = load i32*, i32** %
119 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
120 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
121 // Remember linear step.
122 // CHECK: [[CALL_VAL:%.+]] = invoke
123 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
125 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:%.+]],
126 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
128 // CHECK: call void @__kmpc_for_static_init_8u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
129 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
130 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
131 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
133 // CHECK: br label %[[SWITCH:[^,]+]]
135 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
136 // CHECK: br label %[[SWITCH]]
137 // CHECK: [[SWITCH]]:
138 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
139 // CHECK: store i64 [[UP]], i64* [[UB]],
140 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
141 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]],
143 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]
144 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
145 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
146 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
147 for (unsigned long long it = 2000; it >= 600; it-=400) {
148 // CHECK: [[SIMPLE_LOOP3_BODY]]:
149 // Start of body: calculate it from IV:
150 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
151 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
152 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
153 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}
155 // Linear start and step are used to calculate current value of the linear variable.
156 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
157 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
158 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]]
159 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
160 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]
161 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
162 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
163 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]
165 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]
166 // CHECK: store double{{.*}}[[GEP_VAL]]
168 // CHECK: [[FLT_INC:%.+]] = fadd float
169 // CHECK-NEXT: store float [[FLT_INC]],
170 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]
171 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
172 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
174 // CHECK: [[SIMPLE_LOOP3_END]]:
175 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
177 // Linear start and step are used to calculate final value of the linear variables.
178 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
179 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
180 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
181 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
182 // CHECK: store double* {{.*}}[[GLIN_VAR]]
184 #pragma omp parallel for simd
185 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
186 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
187 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
188 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
190 // CHECK: br label %[[SWITCH:[^,]+]]
192 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
193 // CHECK: br label %[[SWITCH]]
194 // CHECK: [[SWITCH]]:
195 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
196 // CHECK: store i32 [[UP]], i32* [[UB]],
197 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
198 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]],
200 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]
201 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
202 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
203 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
204 for (short it = 6; it <= 20; it-=-4) {
205 // CHECK: [[SIMPLE_LOOP4_BODY]]:
206 // Start of body: calculate it from IV:
207 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
208 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
209 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
210 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
211 // CHECK-NEXT: store i16 [[LC_IT_3]], i16*
213 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]
214 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
215 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
217 // CHECK: [[SIMPLE_LOOP4_END]]:
218 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
220 #pragma omp parallel for simd
221 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
222 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
223 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
224 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
226 // CHECK: br label %[[SWITCH:[^,]+]]
228 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
229 // CHECK: br label %[[SWITCH]]
230 // CHECK: [[SWITCH]]:
231 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
232 // CHECK: store i32 [[UP]], i32* [[UB]],
233 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
234 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]],
236 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]
237 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
238 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
239 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
240 for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
241 // CHECK: [[SIMPLE_LOOP5_BODY]]:
242 // Start of body: calculate it from IV:
243 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
244 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
245 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
246 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
247 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}},
249 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]
250 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
251 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
253 // CHECK: [[SIMPLE_LOOP5_END]]:
254 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
256 // CHECK-NOT: mul i32 %{{.+}}, 10
257 #pragma omp parallel for simd
258 for (unsigned i=100; i<10; i+=10) {
264 #pragma omp parallel for simd lastprivate(A)
265 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
266 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
267 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
268 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
270 // CHECK: br label %[[SWITCH:[^,]+]]
272 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
273 // CHECK: br label %[[SWITCH]]
274 // CHECK: [[SWITCH]]:
275 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
276 // CHECK: store i64 [[UP]], i64* [[UB]],
277 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
278 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
280 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
281 // CHECK: [[SIMD_LOOP7_COND]]:
282 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
283 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
284 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
285 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
286 for (long long i = -10; i < 10; i += 3) {
287 // CHECK: [[SIMPLE_LOOP7_BODY]]:
288 // Start of body: calculate i from IV:
289 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
290 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
291 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
292 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
293 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
294 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
295 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],
297 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]
298 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
299 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
301 // CHECK: [[SIMPLE_LOOP7_END]]:
302 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
303 // CHECK: load i32, i32*
304 // CHECK: icmp ne i32 %{{.+}}, 0
305 // CHECK: br i1 %{{.+}}, label
306 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
307 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}},
308 // CHECK-NEXT: br label
313 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
314 #pragma omp parallel for simd reduction(*:R)
315 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
316 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
317 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
318 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
320 // CHECK: br label %[[SWITCH:[^,]+]]
322 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
323 // CHECK: br label %[[SWITCH]]
324 // CHECK: [[SWITCH]]:
325 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
326 // CHECK: store i64 [[UP]], i64* [[UB]],
327 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
328 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
330 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
331 // CHECK: [[SIMD_LOOP8_COND]]:
332 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
333 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
334 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
335 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
336 for (long long i = -10; i < 10; i += 3) {
337 // CHECK: [[SIMPLE_LOOP8_BODY]]:
338 // Start of body: calculate i from IV:
339 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
340 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
341 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
342 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
343 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
344 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],
346 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]
347 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
348 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
350 // CHECK: [[SIMPLE_LOOP8_END]]:
351 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
352 // CHECK: call i32 @__kmpc_reduce_nowait(
353 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
354 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]
355 // CHECK-NEXT: store i32 [[RED]], i32* %{{.+}},
356 // CHECK-NEXT: call void @__kmpc_end_reduce_nowait(
360 template <class T, unsigned K> T tfoo(T a) { return a + K; }
362 template <typename T, unsigned N>
363 int templ1(T a, T *z) {
364 #pragma omp parallel for simd collapse(N)
365 for (int i = 0; i < N * 2; i++) {
366 for (long long j = 0; j < (N + N + N + N); j += 2) {
367 z[i + j] = a + tfoo<T, N>(i + j);
373 // Instatiation templ1<float,2>
374 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
375 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
379 templ1<float,2> (a, z);
388 IterDouble operator++ () const {
393 bool operator < (const IterDouble &that) const {
394 return Ptr < that.Ptr;
396 double & operator *() const {
399 MyIdx operator - (const IterDouble &that) const {
400 return (MyIdx) (Ptr - that.Ptr);
402 IterDouble operator + (int Delta) {
404 re.Ptr = Ptr + Delta;
411 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
412 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
414 // Calculate number of iterations before the loop body.
415 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
416 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
417 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
418 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
419 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
420 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
421 #pragma omp parallel for simd
423 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
424 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
425 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
426 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
427 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
429 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
430 // CHECK: br label %[[SWITCH:[^,]+]]
432 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
433 // CHECK: br label %[[SWITCH]]
434 // CHECK: [[SWITCH]]:
435 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
436 // CHECK: store i32 [[UP]], i32* [[UB]],
437 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
438 // CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]],
440 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]
441 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
442 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
443 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
444 for (IterDouble i = ia; i < ib; ++i) {
445 // CHECK: [[IT_BODY]]:
446 // Start of body: calculate i from index:
447 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
448 // Call of operator+ (i, IV).
449 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
452 // Float multiply and save result.
453 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
454 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
455 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]]
458 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]
459 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
460 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
461 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
463 // CHECK: [[IT_END]]:
464 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
469 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
470 void collapsed(float *a, float *b, float *c, float *d) {
471 int i; // outer loop counter
472 unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
473 // k declared in the loop init below
474 short l; // inner loop counter
475 // CHECK: call void @__kmpc_for_static_init_4u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
476 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
477 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
478 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
480 // CHECK: br label %[[SWITCH:[^,]+]]
482 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
483 // CHECK: br label %[[SWITCH]]
484 // CHECK: [[SWITCH]]:
485 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
486 // CHECK: store i32 [[UP]], i32* [[UB]],
487 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
488 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
490 #pragma omp parallel for simd collapse(4)
492 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
493 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
494 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]
495 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
496 for (i = 1; i < 3; i++) // 2 iterations
497 for (j = 2u; j < 5u; j++) //3 iterations
498 for (int k = 3; k <= 6; k++) // 4 iterations
499 for (l = 4; l < 9; ++l) // 5 iterations
501 // CHECK: [[COLL1_BODY]]:
502 // Start of body: calculate i from index:
503 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
504 // Calculation of the loop counters values.
505 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
506 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
507 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
508 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
509 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
510 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
511 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
512 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
513 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
514 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
515 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]
516 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
517 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
518 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
519 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
520 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
521 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]
522 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
523 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
524 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
525 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
526 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
528 // End of body: store into a[i]:
529 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
530 float res = b[j] * c[k];
532 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]
533 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
534 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
535 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
536 // CHECK: [[COLL1_END]]:
538 // i,j,l are updated; k is not updated.
539 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
540 // CHECK: store i32 3, i32* [[I:%[^,]+]]
541 // CHECK: store i32 5, i32* [[I:%[^,]+]]
542 // CHECK: store i16 9, i16* [[I:%[^,]+]]
547 extern double globalfloat;
549 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
550 void widened(float *a, float *b, float *c, float *d) {
551 int i; // outer loop counter
552 short j; // inner loop counter
555 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
556 // Counter is widened to 64 bits.
557 // CHECK: [[MUL:%.+]] = mul nsw i64 2, %{{.+}}
558 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1
559 // CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]],
560 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
561 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
562 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
563 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
564 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
566 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
567 // CHECK: br label %[[SWITCH:[^,]+]]
569 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
570 // CHECK: br label %[[SWITCH]]
571 // CHECK: [[SWITCH]]:
572 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
573 // CHECK: store i64 [[UP]], i64* [[UB]],
574 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
575 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]],
577 #pragma omp parallel for simd collapse(2) private(globalfloat, localint)
579 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
580 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
581 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
582 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
583 for (i = 1; i < 3; i++) // 2 iterations
584 for (j = 0; j < foo(); j++) // foo() iterations
586 // CHECK: [[WIDE1_BODY]]:
587 // Start of body: calculate i from index:
588 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
589 // Calculation of the loop counters values...
590 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
591 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]
592 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
595 // Here we expect store into private double var, not global
596 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
597 globalfloat = (float)j/i;
598 float res = b[j] * c[j];
600 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
602 // Then there's a store into private var localint:
603 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]
605 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]
606 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
607 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
609 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
610 // CHECK: [[WIDE1_END]]:
613 // CHECK: store i32 3, i32* [[I:%[^,]+]]
616 // Here we expect store into original localint, not its privatized version.
617 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
622 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
623 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
624 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
625 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
627 // CHECK: br label %[[SWITCH:[^,]+]]
629 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
630 // CHECK: br label %[[SWITCH]]
631 // CHECK: [[SWITCH]]:
632 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
633 // CHECK: store i64 [[UP]], i64* [[UB]],
634 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
635 // CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
638 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
639 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
640 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
641 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
642 // CHECK: [[T1_BODY]]:
643 // Loop counters i and j updates:
644 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
645 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
646 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
647 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
648 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
649 // CHECK-NEXT: store i32 [[I_2]], i32*
650 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]
651 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
652 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
653 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
654 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64*
656 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]
657 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
658 // CHECK-NEXT: store i64 [[INC]], i64*
659 // CHECK-NEXT: br label {{%.+}}
660 // CHECK: [[T1_END]]:
661 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
664 // TERM_DEBUG-LABEL: bar
665 int bar() {return 0;};
667 // TERM_DEBUG-LABEL: parallel_simd
668 void parallel_simd(float *a) {
669 #pragma omp parallel for simd
670 // TERM_DEBUG-NOT: __kmpc_global_thread_num
671 // TERM_DEBUG: invoke i32 {{.*}}bar{{.*}}()
672 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]],
673 // TERM_DEBUG-NOT: __kmpc_global_thread_num
674 // TERM_DEBUG: [[TERM_LPAD]]
675 // TERM_DEBUG: call void @__clang_call_terminate
676 // TERM_DEBUG: unreachable
677 for (unsigned i = 131071; i <= 2147483647; i += 127)
680 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],