1 // Only test codegen on target side, as private clause does not require any action on the host side
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
5 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
6 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
7 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
8 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
9 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
10 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
13 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s
14 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
16 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
17 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY0 %s
18 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
19 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
20 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
22 // expected-no-diagnostics
26 template<typename tx, typename ty>
32 // TCHECK: [[TT:%.+]] = type { i64, i8 }
33 // TCHECK: [[S1:%.+]] = type { double }
42 TT<long long, char> d;
44 #pragma omp target private(a)
48 // TCHECK: define weak void @__omp_offloading_{{.+}}()
49 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
50 // TCHECK-NOT: store {{.+}}, {{.+}} [[A]],
53 #pragma omp target private(a)
58 // TCHECK: define weak void @__omp_offloading_{{.+}}()
59 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
60 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A]],
63 #pragma omp target private(a, aa)
69 // TCHECK: define weak void @__omp_offloading_{{.+}}()
70 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
71 // TCHECK: [[A2:%.+]] = alloca i{{[0-9]+}},
72 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A]],
73 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A2]],
76 #pragma omp target private(a, b, bn, c, cn, d)
86 // make sure that private variables are generated in all cases and that we use those instances for operations inside the
88 // TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]], i{{[0-9]+}} [[VLA3:%.+]])
89 // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}},
90 // TCHECK: [[VLA_ADDR2:%.+]] = alloca i{{[0-9]+}},
91 // TCHECK: [[VLA_ADDR4:%.+]] = alloca i{{[0-9]+}},
92 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
93 // TCHECK: [[B:%.+]] = alloca [10 x float],
94 // TCHECK: [[SSTACK:%.+]] = alloca i8*,
95 // TCHECK: [[C:%.+]] = alloca [5 x [10 x double]],
96 // TCHECK: [[D:%.+]] = alloca [[TT]],
97 // TCHECK: store i{{[0-9]+}} [[VLA]], i{{[0-9]+}}* [[VLA_ADDR]],
98 // TCHECK: store i{{[0-9]+}} [[VLA1]], i{{[0-9]+}}* [[VLA_ADDR2]],
99 // TCHECK: store i{{[0-9]+}} [[VLA3]], i{{[0-9]+}}* [[VLA_ADDR4]],
100 // TCHECK: [[VLA_ADDR_REF:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR]],
101 // TCHECK: [[VLA_ADDR_REF2:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR2]],
102 // TCHECK: [[VLA_ADDR_REF4:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR4]],
103 // TCHECK: [[RET_STACK:%.+]] = call i8* @llvm.stacksave()
104 // TCHECK: store i8* [[RET_STACK]], i8** [[SSTACK]],
105 // TCHECK: [[VLA5:%.+]] = alloca float, i{{[0-9]+}} [[VLA_ADDR_REF]],
106 // TCHECK: [[VLA6_SIZE:%.+]] = mul{{.+}} i{{[0-9]+}} [[VLA_ADDR_REF2]], [[VLA_ADDR_REF4]]
107 // TCHECK: [[VLA6:%.+]] = alloca double, i{{[0-9]+}} [[VLA6_SIZE]],
110 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A]],
113 // TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x float], [10 x float]* [[B]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
114 // TCHECK: store float 1.0{{.*}}, float* [[B_GEP]],
117 // TCHECK: [[BN_GEP:%.+]] = getelementptr inbounds float, float* [[VLA5]], i{{[0-9]+}} 3
118 // TCHECK: store float 1.0{{.*}}, float* [[BN_GEP]],
121 // TCHECK: [[C_GEP1:%.+]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[C]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
122 // TCHECK: [[C_GEP2:%.+]] = getelementptr inbounds [10 x double], [10 x double]* [[C_GEP1]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
123 // TCHECK: store double 1.0{{.*}}, double* [[C_GEP2]],
126 // TCHECK: [[CN_IND:%.+]] = mul{{.+}} i{{[0-9]+}} 1, [[VLA_ADDR_REF4]]
127 // TCHECK: [[CN_GEP_IND:%.+]] = getelementptr inbounds double, double* [[VLA6]], i{{[0-9]+}} [[CN_IND]]
128 // TCHECK: [[CN_GEP_3:%.+]] = getelementptr inbounds double, double* [[CN_GEP_IND]], i{{[0-9]+}} 3
129 // TCHECK: store double 1.0{{.*}}, double* [[CN_GEP_3]],
132 // [[X_FIELD:%.+]] = getelementptr inbounds [[TT]] [[TT]]* [[D]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
133 // store i{{[0-9]+}} 1, i{{[0-9]+}}* [[X_FIELD]],
136 // [[Y_FIELD:%.+]] = getelementptr inbounds [[TT]] [[TT]]* [[D]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
137 // store i{{[0-9]+}} 1, i{{[0-9]+}}* [[Y_FIELD]],
140 // [[RELOAD_SSTACK:%.+]] = load i8*, i8** [[SSTACK]],
141 // call ovid @llvm.stackrestore(i8* [[RELOAD_SSTACK]])
148 template<typename tx>
149 tx ftemplate(int n) {
154 #pragma omp target private(a,aa,b)
171 #pragma omp target private(a,aa,aaa,b)
182 // TCHECK: define weak void @__omp_offloading_{{.+}}()
183 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
184 // TCHECK: [[A2:%.+]] = alloca i{{[0-9]+}},
185 // TCHECK: [[A3:%.+]] = alloca i{{[0-9]+}},
186 // TCHECK: [[B:%.+]] = alloca [10 x i{{[0-9]+}}],
187 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A]],
188 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A2]],
189 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A3]],
190 // TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], [10 x i{{[0-9]+}}]* [[B]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
191 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[B_GEP]],
201 #pragma omp target private(b,c)
203 this->a = (double)b + 1.5;
207 return c[1][1] + (int)b;
210 // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]])
211 // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*,
212 // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}},
213 // TCHECK: [[VLA_ADDR2:%.+]] = alloca i{{[0-9]+}},
214 // TCHECK: [[B:%.+]] = alloca i{{[0-9]+}},
215 // TCHECK: [[SSTACK:%.+]] = alloca i8*,
216 // TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]],
217 // TCHECK: store i{{[0-9]+}} [[VLA]], i{{[0-9]+}}* [[VLA_ADDR]],
218 // TCHECK: store i{{[0-9]+}} [[VLA1]], i{{[0-9]+}}* [[VLA_ADDR2]],
219 // TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]],
220 // TCHECK: [[VLA_ADDR_REF:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR]],
221 // TCHECK: [[VLA_ADDR_REF2:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[VLA_ADDR2]],
222 // TCHECK: [[RET_STACK:%.+]] = call i8* @llvm.stacksave()
223 // TCHECK: store i8* [[RET_STACK:%.+]], i8** [[SSTACK]],
225 // this->a = (double)b + 1.5;
226 // TCHECK: [[VLA_IND:%.+]] = mul{{.+}} i{{[0-9]+}} [[VLA_ADDR_REF]], [[VLA_ADDR_REF2]]
227 // TCHECK: [[VLA3:%.+]] = alloca i{{[0-9]+}}, i{{[0-9]+}} [[VLA_IND]],
228 // TCHECK: [[B_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[B]],
229 // TCHECK: [[B_CONV:%.+]] = sitofp i{{[0-9]+}} [[B_VAL]] to double
230 // TCHECK: [[NEW_A_VAL:%.+]] = fadd double [[B_CONV]], 1.5{{.+}}+00
231 // TCHECK: [[A_FIELD:%.+]] = getelementptr inbounds [[S1]], [[S1]]* [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
232 // TCHECK: store double [[NEW_A_VAL]], double* [[A_FIELD]],
235 // TCHECK: [[A_FIELD4:%.+]] = getelementptr inbounds [[S1]], [[S1]]* [[TH_ADDR_REF]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
236 // TCHECK: [[A_FIELD4_VAL:%.+]] = load double, double* [[A_FIELD4]],
237 // TCHECK: [[A_FIELD_INC:%.+]] = fadd double [[A_FIELD4_VAL]], 1.0{{.+}}+00
238 // TCHECK: store double [[A_FIELD_INC]], double* [[A_FIELD4]],
239 // TCHECK: [[A_FIELD_INC_CONV:%.+]] = fptosi double [[A_FIELD_INC]] to i{{[0-9]+}}
240 // TCHECK: [[C_IND:%.+]] = mul{{.+}} i{{[0-9]+}} 1, [[VLA_ADDR_REF2]]
241 // TCHECK: [[C_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, i{{[0-9]+}}* [[VLA3]], i{{[0-9]+}} [[C_IND]]
242 // TCHECK: [[C_1_1_REF:%.+]] = getelementptr inbounds i{{[0-9]+}}, i{{[0-9]+}}* [[C_1_REF]], i{{[0-9]+}} 1
243 // TCHECK: store i{{[0-9]+}} [[A_FIELD_INC_CONV]], i{{[0-9]+}}* [[C_1_1_REF]],
246 // TCHECK: [[RELOAD_SSTACK:%.+]] = load i8*, i8** [[SSTACK]],
247 // TCHECK: call void @llvm.stackrestore(i8* [[RELOAD_SSTACK]])
258 a += ftemplate<int>(n);
264 // TCHECK: define weak void @__omp_offloading_{{.+}}()
265 // TCHECK: [[A:%.+]] = alloca i{{[0-9]+}},
266 // TCHECK: [[A2:%.+]] = alloca i{{[0-9]+}},
267 // TCHECK: [[B:%.+]] = alloca [10 x i{{[0-9]+}}],
268 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A]],
269 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[A2]],
270 // TCHECK: [[B_GEP:%.+]] = getelementptr inbounds [10 x i{{[0-9]+}}], [10 x i{{[0-9]+}}]* [[B]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
271 // TCHECK: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[B_GEP]],