1 //===-- MachRegisterStatesI386.h --------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Created by Sean Callanan on 3/16/11.
12 //===----------------------------------------------------------------------===//
14 #ifndef __MachRegisterStatesI386_h__
15 #define __MachRegisterStatesI386_h__
19 #define __i386_THREAD_STATE 1
20 #define __i386_FLOAT_STATE 2
21 #define __i386_EXCEPTION_STATE 3
22 #define __i386_DEBUG_STATE 10
23 #define __i386_AVX_STATE 16
42 } __i386_thread_state_t;
45 uint16_t __invalid : 1;
46 uint16_t __denorm : 1;
50 uint16_t __precis : 1;
56 } __i386_fp_control_t;
59 uint16_t __invalid : 1;
60 uint16_t __denorm : 1;
64 uint16_t __precis : 1;
65 uint16_t __stkflt : 1;
66 uint16_t __errsumm : 1;
76 uint8_t __mmst_reg[10];
77 uint8_t __mmst_rsrv[6];
80 typedef struct { uint8_t __xmm_reg[16]; } __i386_xmm_reg;
83 uint32_t __fpu_reserved[2];
84 __i386_fp_control_t __fpu_fcw;
85 __i386_fp_status_t __fpu_fsw;
96 uint32_t __fpu_mxcsrmask;
97 __i386_mmst_reg __fpu_stmm0;
98 __i386_mmst_reg __fpu_stmm1;
99 __i386_mmst_reg __fpu_stmm2;
100 __i386_mmst_reg __fpu_stmm3;
101 __i386_mmst_reg __fpu_stmm4;
102 __i386_mmst_reg __fpu_stmm5;
103 __i386_mmst_reg __fpu_stmm6;
104 __i386_mmst_reg __fpu_stmm7;
105 __i386_xmm_reg __fpu_xmm0;
106 __i386_xmm_reg __fpu_xmm1;
107 __i386_xmm_reg __fpu_xmm2;
108 __i386_xmm_reg __fpu_xmm3;
109 __i386_xmm_reg __fpu_xmm4;
110 __i386_xmm_reg __fpu_xmm5;
111 __i386_xmm_reg __fpu_xmm6;
112 __i386_xmm_reg __fpu_xmm7;
113 uint8_t __fpu_rsrv4[14 * 16];
114 uint32_t __fpu_reserved1;
115 } __i386_float_state_t;
118 uint32_t __fpu_reserved[2];
119 __i386_fp_control_t __fpu_fcw;
120 __i386_fp_status_t __fpu_fsw;
126 uint16_t __fpu_rsrv2;
129 uint16_t __fpu_rsrv3;
130 uint32_t __fpu_mxcsr;
131 uint32_t __fpu_mxcsrmask;
132 __i386_mmst_reg __fpu_stmm0;
133 __i386_mmst_reg __fpu_stmm1;
134 __i386_mmst_reg __fpu_stmm2;
135 __i386_mmst_reg __fpu_stmm3;
136 __i386_mmst_reg __fpu_stmm4;
137 __i386_mmst_reg __fpu_stmm5;
138 __i386_mmst_reg __fpu_stmm6;
139 __i386_mmst_reg __fpu_stmm7;
140 __i386_xmm_reg __fpu_xmm0;
141 __i386_xmm_reg __fpu_xmm1;
142 __i386_xmm_reg __fpu_xmm2;
143 __i386_xmm_reg __fpu_xmm3;
144 __i386_xmm_reg __fpu_xmm4;
145 __i386_xmm_reg __fpu_xmm5;
146 __i386_xmm_reg __fpu_xmm6;
147 __i386_xmm_reg __fpu_xmm7;
148 uint8_t __fpu_rsrv4[14 * 16];
149 uint32_t __fpu_reserved1;
150 uint8_t __avx_reserved1[64];
151 __i386_xmm_reg __fpu_ymmh0;
152 __i386_xmm_reg __fpu_ymmh1;
153 __i386_xmm_reg __fpu_ymmh2;
154 __i386_xmm_reg __fpu_ymmh3;
155 __i386_xmm_reg __fpu_ymmh4;
156 __i386_xmm_reg __fpu_ymmh5;
157 __i386_xmm_reg __fpu_ymmh6;
158 __i386_xmm_reg __fpu_ymmh7;
159 } __i386_avx_state_t;
164 uint32_t __faultvaddr;
165 } __i386_exception_state_t;
176 } __i386_debug_state_t;