tools/tools/ath/ath_ee_9300_print/main.c

   1
   2 /*
   3  * Copyright (c) 2010-2011 Adrian Chadd, Xenion Pty Ltd.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <unistd.h>
  32 #include <string.h>
  33 #include <sys/types.h>
  34 #include <err.h>
  35
  36 struct ath_hal;
  37
  38 #include "ar9300/ar9300eep.h"
  39
  40 static const char *
  41 eeprom_9300_ctl_idx_to_mode(uint8_t idx)
  42 {
  43         switch (idx & 0xf) {
  44         /* 2G CTLs */
  45         case 1: return "CCK";
  46         case 2: return "OFDM";
  47         case 5: return "HT20";
  48         case 7: return "HT40";
  49         /* 5G CTLs */
  50         case 0: return "OFDM";
  51         case 6: return "HT20";
  52         case 8: return "HT40";
  53         default: return "";
  54         }
  55 }
  56
  57 static const char *
  58 eeprom_9300_ctl_idx_to_regdomain(uint8_t idx)
  59 {
  60         switch (idx & 0xf0) {
  61         case 0x10: return "FCC";
  62         case 0x30: return "ETSI";
  63         case 0x40: return "JP";
  64         default: return "";
  65         }
  66 }
  67
  68 static void
  69 eeprom_9300_hdr_print(const uint16_t *buf)
  70 {
  71         const ar9300_eeprom_t *ee = (ar9300_eeprom_t *) buf;
  72
  73         printf("| Version: %d, Template: %d, MAC: %02x:%02x:%02x:%02x:%02x:%02x |\n",
  74             ee->eeprom_version,
  75             ee->template_version,
  76             ee->mac_addr[0],
  77             ee->mac_addr[1],
  78             ee->mac_addr[2],
  79             ee->mac_addr[3],
  80             ee->mac_addr[4],
  81             ee->mac_addr[5]);
  82 }
  83
  84 static void
  85 eeprom_9300_base_print(const uint16_t *buf)
  86 {
  87         const ar9300_eeprom_t *ee = (ar9300_eeprom_t *) buf;
  88         const OSPREY_BASE_EEP_HEADER *ee_base = &ee->base_eep_header;
  89
  90         printf("| RegDomain: 0x%02x 0x%02x TxRxMask: 0x%02x OpFlags: 0x%02x OpMisc: 0x%02x |\n",
  91             ee_base->reg_dmn[0],
  92             ee_base->reg_dmn[1],
  93             ee_base->txrx_mask,
  94             ee_base->op_cap_flags.op_flags,
  95             ee_base->op_cap_flags.eepMisc);
  96
  97         printf("| RfSilent: 0x%02x BtOptions: 0x%02x DeviceCap: 0x%02x DeviceType: 0x%02x |\n",
  98             ee_base->rf_silent,
  99             ee_base->blue_tooth_options,
 100             ee_base->device_cap,
 101             ee_base->device_type);
 102
 103         printf("| pwrTableOffset: %d dB, TuningCaps=0x%02x 0x%02x feature_enable: 0x%02x MiscConfig: 0x%02x |\n",
 104             ee_base->pwrTableOffset,
 105             ee_base->params_for_tuning_caps[0],
 106             ee_base->params_for_tuning_caps[1],
 107             ee_base->feature_enable,
 108             ee_base->misc_configuration);
 109
 110         printf("| EepromWriteGpio: %d, WlanDisableGpio: %d, WlanLedGpio: %d RxBandSelectGpio: %d |\n",
 111             ee_base->eeprom_write_enable_gpio,
 112             ee_base->wlan_disable_gpio,
 113             ee_base->wlan_led_gpio,
 114             ee_base->rx_band_select_gpio);
 115
 116         printf("| TxRxGain: %d, SwReg: %d |\n",
 117             ee_base->txrxgain,
 118             ee_base->swreg);
 119 }
 120
 121 static void
 122 eeprom_9300_modal_print(const OSPREY_MODAL_EEP_HEADER *m)
 123 {
 124         int i;
 125
 126         printf("| AntCtrl: 0x%08x AntCtrl2: 0x%08x |\n",
 127             m->ant_ctrl_common,
 128             m->ant_ctrl_common2);
 129
 130         for (i = 0; i < OSPREY_MAX_CHAINS; i++) {
 131                 printf("| Ch %d: AntCtrl: 0x%08x Atten1: %d, atten1_margin: %d, NfThresh: %d |\n",
 132                     i,
 133                     m->ant_ctrl_chain[i],
 134                     m->xatten1_db[i],
 135                     m->xatten1_margin[i],
 136                     m->noise_floor_thresh_ch[i]);
 137         }
 138
 139         printf("| Spur: ");
 140         for (i = 0; i < OSPREY_EEPROM_MODAL_SPURS; i++) {
 141                 printf("(%d: %d) ", i, m->spur_chans[i]);
 142         }
 143         printf("|\n");
 144
 145         printf("| TempSlope: %d, VoltSlope: %d, QuickDrop: %d, XpaBiasLvl %d |\n",
 146             m->temp_slope,
 147             m->voltSlope,
 148             m->quick_drop,
 149             m->xpa_bias_lvl);
 150
 151         printf("| txFrameToDataStart: %d, TxFrameToPaOn: %d, TxEndToXpaOff: %d, TxEndToRxOn: %d, TxFrameToXpaOn: %d |\n",
 152             m->tx_frame_to_data_start,
 153             m->tx_frame_to_pa_on,
 154             m->tx_end_to_xpa_off,
 155             m->txEndToRxOn,
 156             m->tx_frame_to_xpa_on);
 157
 158         printf("| txClip: %d, AntGain: %d, SwitchSettling: %d, adcDesiredSize: %d |\n",
 159             m->txClip,
 160             m->antenna_gain,
 161             m->switchSettling,
 162             m->adcDesiredSize);
 163
 164         printf("| Thresh62: %d, PaprdMaskHt20: 0x%08x, PaPrdMaskHt40: 0x%08x |\n",
 165             m->thresh62,
 166             m->paprd_rate_mask_ht20,
 167             m->paprd_rate_mask_ht40);
 168
 169         printf("| SwitchComSpdt: %02x, XlnaBiasStrength: %d, RfGainCap: %d, TxGainCap: %x\n",
 170             m->switchcomspdt,
 171             m->xLNA_bias_strength,
 172             m->rf_gain_cap,
 173             m->tx_gain_cap);
 174
 175 #if 0
 176     u_int8_t   reserved[MAX_MODAL_RESERVED];
 177     u_int16_t  switchcomspdt;
 178     u_int8_t   xLNA_bias_strength;                      // bit: 0,1:chain0, 2,3:chain1, 4,5:chain2
 179     u_int8_t   rf_gain_cap;
 180     u_int8_t   tx_gain_cap;                             // bit0:4 txgain cap, txgain index for max_txgain + 20 (10dBm higher than max txgain)
 181     u_int8_t   futureModal[MAX_MODAL_FUTURE];
 182     // last 12 bytes stolen and moved to newly created base extension structure
 183 #endif
 184 }
 185
 186 static void
 187 eeprom_9300_print_2g_target_cck(const ar9300_eeprom_t *ee)
 188 {
 189         int i;
 190
 191         for (i = 0; i < OSPREY_NUM_2G_CCK_TARGET_POWERS; i++) {
 192                 printf("| Freq %u CCK: pow2x 1/5L %u 5S %u 11L %u 11S %u\n",
 193                     FBIN2FREQ(ee->cal_target_freqbin_cck[i], 1),
 194                     ee->cal_target_power_cck[i].t_pow2x[LEGACY_TARGET_RATE_1L_5L],
 195                     ee->cal_target_power_cck[i].t_pow2x[LEGACY_TARGET_RATE_5S],
 196                     ee->cal_target_power_cck[i].t_pow2x[LEGACY_TARGET_RATE_11L],
 197                     ee->cal_target_power_cck[i].t_pow2x[LEGACY_TARGET_RATE_11S]);
 198         }
 199 }
 200
 201 static void
 202 eeprom_9300_print_2g_target_ofdm(const ar9300_eeprom_t *ee)
 203 {
 204         int i;
 205
 206         for (i = 0; i < OSPREY_NUM_2G_20_TARGET_POWERS; i++) {
 207                 printf("| Freq %u OFDM: pow2x 6/12/18/24M %u 36M %u 48M %u 54M %u\n",
 208                     FBIN2FREQ(ee->cal_target_freqbin_2g[i], 1),
 209                     ee->cal_target_power_2g[i].t_pow2x[LEGACY_TARGET_RATE_6_24],
 210                     ee->cal_target_power_2g[i].t_pow2x[LEGACY_TARGET_RATE_36],
 211                     ee->cal_target_power_2g[i].t_pow2x[LEGACY_TARGET_RATE_48],
 212                     ee->cal_target_power_2g[i].t_pow2x[LEGACY_TARGET_RATE_54]);
 213         }
 214 }
 215
 216 static void
 217 eeprom_9300_print_2g_target_ht20(const ar9300_eeprom_t *ee)
 218 {
 219         int i;
 220
 221         for (i = 0; i < OSPREY_NUM_2G_20_TARGET_POWERS; i++) {
 222                 printf("| Freq %u HT20  MCS0-7 pow2x %u %u %u %u %u %u %u %u\n",
 223                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht20[i], 1),
 224                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 225                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 226                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 227                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 228                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_4],
 229                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_5],
 230                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_6],
 231                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_7]);
 232                 printf("| Freq %u HT20  MCS8-15 pow2x %u %u %u %u %u %u %u %u\n",
 233                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht20[i], 1),
 234                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 235                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 236                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 237                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 238                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_12],
 239                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_13],
 240                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_14],
 241                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_15]);
 242                 printf("| Freq %u HT20  MCS16-23 pow2x %u %u %u %u %u %u %u %u\n",
 243                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht20[i], 1),
 244                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 245                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 246                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 247                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 248                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_20],
 249                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_21],
 250                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_22],
 251                     ee->cal_target_power_2g_ht20[i].t_pow2x[HT_TARGET_RATE_23]);
 252         }
 253 }
 254
 255 static void
 256 eeprom_9300_print_2g_target_ht40(const ar9300_eeprom_t *ee)
 257 {
 258         int i;
 259
 260         for (i = 0; i < OSPREY_NUM_2G_40_TARGET_POWERS; i++) {
 261                 printf("| Freq %u HT40  MCS0-7 pow2x %u %u %u %u %u %u %u %u\n",
 262                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht40[i], 1),
 263                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 264                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 265                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 266                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 267                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_4],
 268                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_5],
 269                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_6],
 270                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_7]);
 271                 printf("| Freq %u HT40  MCS8-15 pow2x %u %u %u %u %u %u %u %u\n",
 272                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht40[i], 1),
 273                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 274                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 275                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 276                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 277                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_12],
 278                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_13],
 279                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_14],
 280                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_15]);
 281                 printf("| Freq %u HT40  MCS16-23 pow2x %u %u %u %u %u %u %u %u\n",
 282                     FBIN2FREQ(ee->cal_target_freqbin_2g_ht40[i], 1),
 283                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 284                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 285                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 286                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 287                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_20],
 288                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_21],
 289                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_22],
 290                     ee->cal_target_power_2g_ht40[i].t_pow2x[HT_TARGET_RATE_23]);
 291         }
 292 }
 293
 294 static void
 295 eeprom_9300_print_2g_ctls(const ar9300_eeprom_t *ee)
 296 {
 297         int i, j;
 298
 299         for (i = 0; i < OSPREY_NUM_CTLS_2G; i++) {
 300                 printf("| CTL index 0x%.02x (%s %s)\n",
 301                     ee->ctl_index_2g[i],
 302                     eeprom_9300_ctl_idx_to_regdomain(ee->ctl_index_2g[i]),
 303                     eeprom_9300_ctl_idx_to_mode(ee->ctl_index_2g[i]));
 304                 for (j = 0; j < OSPREY_NUM_BAND_EDGES_2G; j++) {
 305                   printf("|   Freq %u pow2x %u flags 0x%x\n",
 306                       FBIN2FREQ(ee->ctl_freqbin_2G[i][j], 1),
 307                       ee->ctl_power_data_2g[i].ctl_edges[j].t_power,
 308                       ee->ctl_power_data_2g[i].ctl_edges[j].flag);
 309                 }
 310                 printf("\n");
 311         }
 312 }
 313
 314 static void
 315 eeprom_9300_print_5g_target_ofdm(const ar9300_eeprom_t *ee)
 316 {
 317         int i;
 318
 319         for (i = 0; i < OSPREY_NUM_5G_20_TARGET_POWERS; i++) {
 320                 printf("| Freq %u OFDM: pow2x 6/12/18/24M %u 36M %u 48M %u 54M %u\n",
 321                     FBIN2FREQ(ee->cal_target_freqbin_5g[i], 0),
 322                     ee->cal_target_power_5g[i].t_pow2x[LEGACY_TARGET_RATE_6_24],
 323                     ee->cal_target_power_5g[i].t_pow2x[LEGACY_TARGET_RATE_36],
 324                     ee->cal_target_power_5g[i].t_pow2x[LEGACY_TARGET_RATE_48],
 325                     ee->cal_target_power_5g[i].t_pow2x[LEGACY_TARGET_RATE_54]);
 326         }
 327 }
 328
 329 static void
 330 eeprom_9300_print_5g_target_ht20(const ar9300_eeprom_t *ee)
 331 {
 332         int i;
 333
 334         for (i = 0; i < OSPREY_NUM_5G_20_TARGET_POWERS; i++) {
 335                 printf("| Freq %u HT20  MCS0-7 pow2x %u %u %u %u %u %u %u %u\n",
 336                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht20[i], 0),
 337                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 338                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 339                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 340                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 341                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_4],
 342                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_5],
 343                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_6],
 344                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_7]);
 345                 printf("| Freq %u HT20  MCS8-15 pow2x %u %u %u %u %u %u %u %u\n",
 346                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht20[i], 0),
 347                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 348                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 349                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 350                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 351                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_12],
 352                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_13],
 353                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_14],
 354                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_15]);
 355                 printf("| Freq %u HT20  MCS16-23 pow2x %u %u %u %u %u %u %u %u\n",
 356                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht20[i], 0),
 357                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 358                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 359                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 360                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 361                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_20],
 362                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_21],
 363                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_22],
 364                     ee->cal_target_power_5g_ht20[i].t_pow2x[HT_TARGET_RATE_23]);
 365         }
 366 }
 367
 368 static void
 369 eeprom_9300_print_5g_target_ht40(const ar9300_eeprom_t *ee)
 370 {
 371         int i;
 372
 373         for (i = 0; i < OSPREY_NUM_5G_40_TARGET_POWERS; i++) {
 374                 printf("| Freq %u HT40  MCS0-7 pow2x %u %u %u %u %u %u %u %u\n",
 375                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht40[i], 0),
 376                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 377                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 378                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 379                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 380                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_4],
 381                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_5],
 382                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_6],
 383                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_7]);
 384                 printf("| Freq %u HT40  MCS8-15 pow2x %u %u %u %u %u %u %u %u\n",
 385                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht40[i], 0),
 386                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 387                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 388                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 389                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 390                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_12],
 391                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_13],
 392                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_14],
 393                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_15]);
 394                 printf("| Freq %u HT40  MCS16-23 pow2x %u %u %u %u %u %u %u %u\n",
 395                     FBIN2FREQ(ee->cal_target_freqbin_5g_ht40[i], 0),
 396                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_0_8_16],
 397                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 398                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 399                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_1_3_9_11_17_19],
 400                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_20],
 401                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_21],
 402                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_22],
 403                     ee->cal_target_power_5g_ht40[i].t_pow2x[HT_TARGET_RATE_23]);
 404         }
 405 }
 406
 407 static void
 408 eeprom_9300_print_5g_ctls(const ar9300_eeprom_t *ee)
 409 {
 410         int i, j;
 411
 412         for (i = 0; i < OSPREY_NUM_CTLS_5G; i++) {
 413                 printf("| CTL index 0x%.02x (%s %s)\n", ee->ctl_index_5g[i],
 414                     eeprom_9300_ctl_idx_to_regdomain(ee->ctl_index_5g[i]),
 415                     eeprom_9300_ctl_idx_to_mode(ee->ctl_index_5g[i]));
 416                 for (j = 0; j < OSPREY_NUM_BAND_EDGES_5G; j++) {
 417                   printf("|   Freq %u pow2x %u Flags 0x%x\n",
 418                       FBIN2FREQ(ee->ctl_freqbin_5G[i][j], 0),
 419                       ee->ctl_power_data_5g[i].ctl_edges[j].t_power,
 420                       ee->ctl_power_data_5g[i].ctl_edges[j].flag);
 421                 }
 422                 printf("\n");
 423         }
 424 }
 425
 426 static void
 427 load_eeprom_dump(const char *file, uint16_t *buf)
 428 {
 429         unsigned int r[8];
 430         FILE *fp;
 431         char b[1024];
 432         int i;
 433
 434         fp = fopen(file, "r");
 435         if (!fp)
 436                 err(1, "fopen");
 437
 438         while (!feof(fp)) {
 439                 if (fgets(b, 1024, fp) == NULL)
 440                         break;
 441                 if (feof(fp))
 442                         break;
 443                 if (strlen(b) > 0)
 444                         b[strlen(b)-1] = '\0';
 445                 if (strlen(b) == 0)
 446                         break;
 447                 sscanf(b, "%x: %x %x %x %x %x %x %x %x\n",
 448                     &i, &r[0], &r[1], &r[2], &r[3], &r[4],
 449                     &r[5], &r[6], &r[7]);
 450                 buf[i++] = r[0];
 451                 buf[i++] = r[1];
 452                 buf[i++] = r[2];
 453                 buf[i++] = r[3];
 454                 buf[i++] = r[4];
 455                 buf[i++] = r[5];
 456                 buf[i++] = r[6];
 457                 buf[i++] = r[7];
 458         }
 459         fclose(fp);
 460 }
 461
 462 void
 463 usage(char *argv[])
 464 {
 465         printf("Usage: %s <eeprom dump file>\n", argv[0]);
 466         printf("\n");
 467         printf("  The eeprom dump file is a text hexdump of an EEPROM.\n");
 468         printf("  The lines must be formatted as follows:\n");
 469         printf("  0xAAAA: 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD\n");
 470         printf("  where each line must have exactly eight data bytes.\n");
 471         exit(127);
 472 }
 473
 474 int
 475 main(int argc, char *argv[])
 476 {
 477         uint16_t *eep = NULL;
 478         const ar9300_eeprom_t *ee;
 479
 480         eep = calloc(4096, sizeof(int16_t));
 481
 482         if (argc < 2)
 483                 usage(argv);
 484
 485         load_eeprom_dump(argv[1], eep);
 486         ee = (ar9300_eeprom_t *) eep;
 487
 488         eeprom_9300_hdr_print(eep);
 489         eeprom_9300_base_print(eep);
 490
 491         printf("\n2GHz modal:\n");
 492         eeprom_9300_modal_print(&ee->modal_header_2g);
 493         // TODO: open-loop calibration
 494         eeprom_9300_print_2g_target_cck(ee);
 495         eeprom_9300_print_2g_target_ofdm(ee);
 496         eeprom_9300_print_2g_target_ht20(ee);
 497         eeprom_9300_print_2g_target_ht40(ee);
 498         eeprom_9300_print_2g_ctls(ee);
 499
 500         printf("\n5GHz modal:\n");
 501         eeprom_9300_modal_print(&ee->modal_header_5g);
 502         eeprom_9300_print_5g_target_ofdm(ee);
 503         eeprom_9300_print_5g_target_ht20(ee);
 504         eeprom_9300_print_5g_target_ht40(ee);
 505         eeprom_9300_print_5g_ctls(ee);
 506
 507         free(eep);
 508         exit(0);
 509 }