2 * Copyright (c) 2002-2007 Neterion, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include <sys/types.h>
37 #include <sys/socket.h>
38 #include <sys/ioctl.h>
40 #include <netinet/in.h>
41 #include <arpa/inet.h>
44 #if BYTE_ORDER == BIG_ENDIAN
45 #define XGE_OS_HOST_BIG_ENDIAN 1
48 #define u64 unsigned long long
49 #define u32 unsigned int
50 #define u16 unsigned short
51 #define u8 unsigned char
53 #define XGE_COUNT_REGS 386
54 #define XGE_COUNT_STATS 160
55 #define XGE_COUNT_PCICONF 43
56 #define XGE_COUNT_DEVCONF 1677
58 #define XGE_COUNT_INTRSTAT 26
60 #define XGE_COUNT_INTRSTAT 20
62 #define XGE_COUNT_TCODESTAT 54
63 #define DEVICE_ID_XFRAME_II 0x5832
64 #define XGE_COUNT_EXTENDED_STATS 56
66 #define XGE_PRINT(fd, fmt...) \
69 fprintf( fd, "\n" ); \
74 #define XGE_PRINT_LINE(fd) XGE_PRINT(fd, line);
75 /* Read & Write Register */
76 typedef struct barregister
84 typedef struct xge_pci_bar0_t
86 u8 name[32]; /* Register name as in user guides */
87 u64 offset; /* Offset from base address */
88 u64 value; /* Value */
89 char type; /* 1: XframeII, 0: Common */
93 /* Hardware Statistics */
94 typedef struct xge_stats_hw_info_t
96 u8 name[32]; /* Statistics name */
97 u64 be_offset; /* Offset from base address (BE) */
98 u64 le_offset; /* Offset from base address (LE) */
99 u8 type; /* Type: 1, 2, 3 or 4 bytes */
100 u64 value; /* Value */
102 } xge_stats_hw_info_t;
104 /* PCI Configuration Space */
105 typedef struct xge_pci_config_t
107 u8 name[32]; /* Pci conf. name */
108 u64 be_offset; /* Offset from base address (BE) */
109 u64 le_offset; /* Offset from base address (LE) */
110 u64 value; /* Value */
114 /* Device Configuration */
115 typedef struct xge_device_config_t
117 u8 name[32]; /* Device conf. name */
118 u64 value; /* Value */
120 } xge_device_config_t;
122 /* Interrupt Statistics */
123 typedef struct xge_stats_intr_info_t
125 u8 name[32]; /* Interrupt entry name */
126 u64 value; /* Value (count) */
128 } xge_stats_intr_info_t;
129 /* Tcode Statistics */
130 typedef struct xge_stats_tcode_info_t
132 u8 name[32]; /* Tcode entry name */
133 u64 value; /* Value (count) */
134 u8 type; /* Type: 1, 2, 3 or 4 bytes */
137 }xge_stats_tcode_info_t;
139 #ifdef XGE_OS_HOST_BIG_ENDIAN
140 #define GET_OFFSET_STATS(index) statsInfo[(index)].be_offset
141 #define GET_OFFSET_PCICONF(index) pciconfInfo[(index)].be_offset
143 #define GET_OFFSET_STATS(index) statsInfo[(index)].le_offset
144 #define GET_OFFSET_PCICONF(index) pciconfInfo[(index)].le_offset