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4 .TH "TBLGEN" "1" "2018-08-02" "7" "LLVM"
6 tblgen \- Target Description To C++ Code Generator
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36 \fBtblgen\fP [\fIoptions\fP] [\fIfilename\fP]
39 \fBtblgen\fP translates from target description (\fB\&.td\fP) files into C++
40 code that can be included in the definition of an LLVM target library. Most
41 users of LLVM will not need to use this program. It is only for assisting with
42 writing an LLVM target backend.
44 The input and output of \fBtblgen\fP is beyond the scope of this short
45 introduction; please see the introduction to TableGen\&.
47 The \fIfilename\fP argument specifies the name of a Target Description (\fB\&.td\fP)
48 file to read as input.
53 Print a summary of command line options.
58 Specify the output file name. If \fBfilename\fP is \fB\-\fP, then
59 \fBtblgen\fP sends its output to standard output.
64 Specify where to find other target description files for inclusion. The
65 \fBdirectory\fP value should be a full or partial path to a directory that
66 contains target description files.
71 Make \-gen\-asm\-parser emit assembly writer number \fBN\fP\&.
76 Make \-gen\-asm\-writer emit assembly writer number \fBN\fP\&.
81 Print the enumeration list for this class.
86 Print all records to standard output (default).
91 Print a JSON representation of all records, suitable for further
97 Print enumeration values for a class.
102 Print expanded sets for testing DAG exprs.
107 Generate machine code emitter.
111 .B \-gen\-register\-info
112 Generate registers and register classes info.
116 .B \-gen\-instr\-info
117 Generate instruction descriptions.
121 .B \-gen\-asm\-writer
122 Generate the assembly writer.
126 .B \-gen\-disassembler
127 Generate disassembler.
131 .B \-gen\-pseudo\-lowering
132 Generate pseudo instruction lowering.
137 Generate a DAG (Directed Acycle Graph) instruction selector.
141 .B \-gen\-asm\-matcher
142 Generate assembly instruction matcher.
146 .B \-gen\-dfa\-packetizer
147 Generate DFA Packetizer for VLIW targets.
152 Generate a "fast" instruction selector.
157 Generate subtarget enumerations.
161 .B \-gen\-intrinsic\-enums
162 Generate intrinsic enums.
166 .B \-gen\-intrinsic\-impl
167 Generate intrinsic implementation.
171 .B \-gen\-tgt\-intrinsic
172 Generate target intrinsic information.
176 .B \-gen\-enhanced\-disassembly\-info
177 Generate enhanced disassembly info.
182 Show the version number of this program.
186 If \fBtblgen\fP succeeds, it will exit with 0. Otherwise, if an error
187 occurs, it will exit with a non\-zero value.
189 Maintained by The LLVM Team (http://llvm.org/).
191 2003-2018, LLVM Project
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