2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2010 Broadcom Corporation
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
13 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
15 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
16 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 #define SDIOD_FBR_SIZE 0x100
27 #define SDIO_FUNC_ENABLE_1 0x02
28 #define SDIO_FUNC_ENABLE_2 0x04
31 #define SDIO_FUNC_READY_1 0x02
32 #define SDIO_FUNC_READY_2 0x04
35 #define INTR_STATUS_FUNC1 0x2
36 #define INTR_STATUS_FUNC2 0x4
38 /* Maximum number of I/O funcs */
39 #define SDIOD_MAX_IOFUNCS 7
41 /* mask of register map */
42 #define REG_F0_REG_MASK 0x7FF
43 #define REG_F1_MISC_MASK 0x1FFFF
45 /* as of sdiod rev 0, supports 3 functions */
46 #define SBSDIO_NUM_FUNCTION 3
48 /* function 0 vendor specific CCCR registers */
49 #define SDIO_CCCR_BRCM_CARDCAP 0xf0
50 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
51 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
52 #define SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08
53 #define SDIO_CCCR_BRCM_CARDCTRL 0xf1
54 #define SDIO_CCCR_BRCM_CARDCTRL_WLANRESET 0x02
55 #define SDIO_CCCR_BRCM_SEPINT 0xf2
57 #define SDIO_SEPINT_MASK 0x01
58 #define SDIO_SEPINT_OE 0x02
59 #define SDIO_SEPINT_ACT_HI 0x04
61 /* function 1 miscellaneous registers */
63 /* sprom command and status */
64 #define SBSDIO_SPROM_CS 0x10000
65 /* sprom info register */
66 #define SBSDIO_SPROM_INFO 0x10001
67 /* sprom indirect access data byte 0 */
68 #define SBSDIO_SPROM_DATA_LOW 0x10002
69 /* sprom indirect access data byte 1 */
70 #define SBSDIO_SPROM_DATA_HIGH 0x10003
71 /* sprom indirect access addr byte 0 */
72 #define SBSDIO_SPROM_ADDR_LOW 0x10004
74 #define SBSDIO_GPIO_SELECT 0x10005
76 #define SBSDIO_GPIO_OUT 0x10006
78 #define SBSDIO_GPIO_EN 0x10007
79 /* rev < 7, watermark for sdio device */
80 #define SBSDIO_WATERMARK 0x10008
81 /* control busy signal generation */
82 #define SBSDIO_DEVICE_CTL 0x10009
84 /* SB Address Window Low (b15) */
85 #define SBSDIO_FUNC1_SBADDRLOW 0x1000A
86 /* SB Address Window Mid (b23:b16) */
87 #define SBSDIO_FUNC1_SBADDRMID 0x1000B
88 /* SB Address Window High (b31:b24) */
89 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
90 /* Frame Control (frame term/abort) */
91 #define SBSDIO_FUNC1_FRAMECTRL 0x1000D
92 /* ChipClockCSR (ALP/HT ctl/status) */
93 #define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
94 /* SdioPullUp (on cmd, d0-d2) */
95 #define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
96 /* Write Frame Byte Count Low */
97 #define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
98 /* Write Frame Byte Count High */
99 #define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
100 /* Read Frame Byte Count Low */
101 #define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
102 /* Read Frame Byte Count High */
103 #define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
104 /* MesBusyCtl (rev 11) */
105 #define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D
106 /* Sdio Core Rev 12 */
107 #define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E
108 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1
109 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0
110 #define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK 0x2
111 #define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT 1
112 #define SBSDIO_FUNC1_SLEEPCSR 0x1001F
113 #define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1
114 #define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0
115 #define SBSDIO_FUNC1_SLEEPCSR_KSO_EN 1
116 #define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2
117 #define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT 1
119 #define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
120 #define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001F /* f1 misc register end */
122 /* function 1 OCP space */
124 /* sb offset addr is <= 15 bits, 32k */
125 #define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
126 #define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
127 /* with b15, maps to 32-bit SB access */
128 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
130 /* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
132 #define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
133 #define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
134 #define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
135 /* Address bits from SBADDR regs */
136 #define SBSDIO_SBWINDOW_MASK 0xffff8000
138 #define SDIOH_READ 0 /* Read request */
139 #define SDIOH_WRITE 1 /* Write request */
141 #define SDIOH_DATA_FIX 0 /* Fixed addressing */
142 #define SDIOH_DATA_INC 1 /* Incremental addressing */
144 /* internal return code */
148 /* Packet alignment for most efficient SDIO (can change based on platform) */
149 #define BRCMF_SDALIGN (1 << 6)
152 * enum brcmf_sdiod_state - the state of the bus.
154 * @BRCMF_SDIOD_DOWN: Device can be accessed, no DPC.
155 * @BRCMF_SDIOD_DATA: Ready for data transfers, DPC enabled.
156 * @BRCMF_SDIOD_NOMEDIUM: No medium access to dongle possible.
158 enum brcmf_sdiod_state {