usr.sbin/bhyve/hda_reg.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #ifndef _HDA_REG_H_
  32 #define _HDA_REG_H_
  33
  34 /****************************************************************************
  35  * HDA Device Verbs
  36  ****************************************************************************/
  37
  38 /* HDA Command */
  39 #define HDA_CMD_VERB_MASK                               0x000fffff
  40 #define HDA_CMD_VERB_SHIFT                              0
  41 #define HDA_CMD_NID_MASK                                0x0ff00000
  42 #define HDA_CMD_NID_SHIFT                               20
  43 #define HDA_CMD_CAD_MASK                                0xf0000000
  44 #define HDA_CMD_CAD_SHIFT                               28
  45
  46 #define HDA_CMD_VERB_4BIT_SHIFT                         16
  47 #define HDA_CMD_VERB_12BIT_SHIFT                        8
  48
  49 #define HDA_CMD_VERB_4BIT(verb, payload)                                \
  50     (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload))
  51 #define HDA_CMD_4BIT(cad, nid, verb, payload)                           \
  52     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  53     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  54     (HDA_CMD_VERB_4BIT((verb), (payload))))
  55
  56 #define HDA_CMD_VERB_12BIT(verb, payload)                               \
  57     (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload))
  58 #define HDA_CMD_12BIT(cad, nid, verb, payload)                          \
  59     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  60     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  61     (HDA_CMD_VERB_12BIT((verb), (payload))))
  62
  63 /* Get Parameter */
  64 #define HDA_CMD_VERB_GET_PARAMETER                      0xf00
  65
  66 #define HDA_CMD_GET_PARAMETER(cad, nid, payload)                        \
  67     (HDA_CMD_12BIT((cad), (nid),                                        \
  68     HDA_CMD_VERB_GET_PARAMETER, (payload)))
  69
  70 /* Connection Select Control */
  71 #define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL            0xf01
  72 #define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL            0x701
  73
  74 #define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid)                       \
  75     (HDA_CMD_12BIT((cad), (nid),                                        \
  76     HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0))
  77 #define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload)        \
  78     (HDA_CMD_12BIT((cad), (nid),                                        \
  79     HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, (payload)))
  80
  81 /* Connection List Entry */
  82 #define HDA_CMD_VERB_GET_CONN_LIST_ENTRY                0xf02
  83
  84 #define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload)                  \
  85     (HDA_CMD_12BIT((cad), (nid),                                        \
  86     HDA_CMD_VERB_GET_CONN_LIST_ENTRY, (payload)))
  87
  88 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT          1
  89 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG           2
  90
  91 /* Processing State */
  92 #define HDA_CMD_VERB_GET_PROCESSING_STATE               0xf03
  93 #define HDA_CMD_VERB_SET_PROCESSING_STATE               0x703
  94
  95 #define HDA_CMD_GET_PROCESSING_STATE(cad, nid)                          \
  96     (HDA_CMD_12BIT((cad), (nid),                                        \
  97     HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0))
  98 #define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload)                 \
  99     (HDA_CMD_12BIT((cad), (nid),                                        \
 100     HDA_CMD_VERB_SET_PROCESSING_STATE, (payload)))
 101
 102 #define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF          0x00
 103 #define HDA_CMD_GET_PROCESSING_STATE_STATE_ON           0x01
 104 #define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN       0x02
 105
 106 /* Coefficient Index */
 107 #define HDA_CMD_VERB_GET_COEFF_INDEX                    0xd
 108 #define HDA_CMD_VERB_SET_COEFF_INDEX                    0x5
 109
 110 #define HDA_CMD_GET_COEFF_INDEX(cad, nid)                               \
 111     (HDA_CMD_4BIT((cad), (nid),                                         \
 112     HDA_CMD_VERB_GET_COEFF_INDEX, 0x0))
 113 #define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload)                      \
 114     (HDA_CMD_4BIT((cad), (nid),                                         \
 115     HDA_CMD_VERB_SET_COEFF_INDEX, (payload)))
 116
 117 /* Processing Coefficient */
 118 #define HDA_CMD_VERB_GET_PROCESSING_COEFF               0xc
 119 #define HDA_CMD_VERB_SET_PROCESSING_COEFF               0x4
 120
 121 #define HDA_CMD_GET_PROCESSING_COEFF(cad, nid)                          \
 122     (HDA_CMD_4BIT((cad), (nid),                                         \
 123     HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0))
 124 #define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload)                 \
 125     (HDA_CMD_4BIT((cad), (nid),                                         \
 126     HDA_CMD_VERB_SET_PROCESSING_COEFF, (payload)))
 127
 128 /* Amplifier Gain/Mute */
 129 #define HDA_CMD_VERB_GET_AMP_GAIN_MUTE                  0xb
 130 #define HDA_CMD_VERB_SET_AMP_GAIN_MUTE                  0x3
 131
 132 #define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 133     (HDA_CMD_4BIT((cad), (nid),                                         \
 134     HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload)))
 135 #define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 136     (HDA_CMD_4BIT((cad), (nid),                                         \
 137     HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload)))
 138
 139 #define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT         0x0000
 140 #define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT        0x8000
 141 #define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT         0x0000
 142 #define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT          0x2000
 143
 144 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK     0x00000008
 145 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT    7
 146 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK     0x00000007
 147 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 148
 149 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp)                             \
 150     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >>                   \
 151     HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT)
 152 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp)                             \
 153     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >>                   \
 154     HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT)
 155
 156 #define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT        0x8000
 157 #define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT         0x4000
 158 #define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT          0x2000
 159 #define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT         0x1000
 160 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK    0x0f00
 161 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT   8
 162 #define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE          0x0080
 163 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK     0x0007
 164 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 165
 166 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index)                          \
 167     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) &               \
 168     HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK)
 169 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index)                           \
 170     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) &                \
 171     HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK)
 172
 173 /* Converter format */
 174 #define HDA_CMD_VERB_GET_CONV_FMT                       0xa
 175 #define HDA_CMD_VERB_SET_CONV_FMT                       0x2
 176
 177 #define HDA_CMD_GET_CONV_FMT(cad, nid)                                  \
 178     (HDA_CMD_4BIT((cad), (nid),                                         \
 179     HDA_CMD_VERB_GET_CONV_FMT, 0x0))
 180 #define HDA_CMD_SET_CONV_FMT(cad, nid, payload)                         \
 181     (HDA_CMD_4BIT((cad), (nid),                                         \
 182     HDA_CMD_VERB_SET_CONV_FMT, (payload)))
 183
 184 /* Digital Converter Control */
 185 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1              0xf0d
 186 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2              0xf0e
 187 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1              0x70d
 188 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2              0x70e
 189
 190 #define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid)                          \
 191     (HDA_CMD_12BIT((cad), (nid),                                        \
 192     HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1, 0x0))
 193 #define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload)                \
 194     (HDA_CMD_12BIT((cad), (nid),                                        \
 195     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, (payload)))
 196 #define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload)                \
 197     (HDA_CMD_12BIT((cad), (nid),                                        \
 198     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, (payload)))
 199
 200 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK            0x7f00
 201 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT           8
 202 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK             0x0080
 203 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT            7
 204 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK           0x0040
 205 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT          6
 206 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK        0x0020
 207 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT       5
 208 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK          0x0010
 209 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT         4
 210 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK           0x0008
 211 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT          3
 212 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK          0x0004
 213 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT         2
 214 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK             0x0002
 215 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT            1
 216 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK         0x0001
 217 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT        0
 218
 219 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp)                            \
 220     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >>                  \
 221     HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT)
 222 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp)                             \
 223     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >>                   \
 224     HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT)
 225 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp)                           \
 226     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >>                 \
 227     HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT)
 228 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp)                        \
 229     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >>              \
 230     HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT)
 231 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp)                          \
 232     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >>                \
 233     HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT)
 234 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp)                           \
 235     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >>                 \
 236     HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT)
 237 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp)                          \
 238     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >>                \
 239     HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT)
 240 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp)                             \
 241     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >>                   \
 242     HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT)
 243 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp)                         \
 244     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >>               \
 245     HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT)
 246
 247 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_L                 0x80
 248 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO               0x40
 249 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO            0x20
 250 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY              0x10
 251 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE               0x08
 252 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG              0x04
 253 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_V                 0x02
 254 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN             0x01
 255
 256 /* Power State */
 257 #define HDA_CMD_VERB_GET_POWER_STATE                    0xf05
 258 #define HDA_CMD_VERB_SET_POWER_STATE                    0x705
 259
 260 #define HDA_CMD_GET_POWER_STATE(cad, nid)                               \
 261     (HDA_CMD_12BIT((cad), (nid),                                        \
 262     HDA_CMD_VERB_GET_POWER_STATE, 0x0))
 263 #define HDA_CMD_SET_POWER_STATE(cad, nid, payload)                      \
 264     (HDA_CMD_12BIT((cad), (nid),                                        \
 265     HDA_CMD_VERB_SET_POWER_STATE, (payload)))
 266
 267 #define HDA_CMD_POWER_STATE_D0                          0x00
 268 #define HDA_CMD_POWER_STATE_D1                          0x01
 269 #define HDA_CMD_POWER_STATE_D2                          0x02
 270 #define HDA_CMD_POWER_STATE_D3                          0x03
 271
 272 #define HDA_CMD_POWER_STATE_ACT_MASK                    0x000000f0
 273 #define HDA_CMD_POWER_STATE_ACT_SHIFT                   4
 274 #define HDA_CMD_POWER_STATE_SET_MASK                    0x0000000f
 275 #define HDA_CMD_POWER_STATE_SET_SHIFT                   0
 276
 277 #define HDA_CMD_GET_POWER_STATE_ACT(rsp)                                \
 278     (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >>                          \
 279     HDA_CMD_POWER_STATE_ACT_SHIFT)
 280 #define HDA_CMD_GET_POWER_STATE_SET(rsp)                                \
 281     (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >>                          \
 282     HDA_CMD_POWER_STATE_SET_SHIFT)
 283
 284 #define HDA_CMD_SET_POWER_STATE_ACT(ps)                                 \
 285     (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) &                          \
 286     HDA_CMD_POWER_STATE_ACT_MASK)
 287 #define HDA_CMD_SET_POWER_STATE_SET(ps)                                 \
 288     (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) &                          \
 289     HDA_CMD_POWER_STATE_ACT_MASK)
 290
 291 /* Converter Stream, Channel */
 292 #define HDA_CMD_VERB_GET_CONV_STREAM_CHAN               0xf06
 293 #define HDA_CMD_VERB_SET_CONV_STREAM_CHAN               0x706
 294
 295 #define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid)                          \
 296     (HDA_CMD_12BIT((cad), (nid),                                        \
 297     HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0))
 298 #define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload)                 \
 299     (HDA_CMD_12BIT((cad), (nid),                                        \
 300     HDA_CMD_VERB_SET_CONV_STREAM_CHAN, (payload)))
 301
 302 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK            0x000000f0
 303 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT           4
 304 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK              0x0000000f
 305 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT             0
 306
 307 #define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp)                        \
 308     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >>                  \
 309     HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT)
 310 #define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp)                          \
 311     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >>                    \
 312     HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT)
 313
 314 #define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param)                      \
 315     (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) &               \
 316     HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK)
 317 #define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param)                        \
 318     (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) &                 \
 319     HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK)
 320
 321 /* Input Converter SDI Select */
 322 #define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT     0xf04
 323 #define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT     0x704
 324
 325 #define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid)                \
 326     (HDA_CMD_12BIT((cad), (nid),                                        \
 327     HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0))
 328 #define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload)       \
 329     (HDA_CMD_12BIT((cad), (nid),                                        \
 330     HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload)))
 331
 332 /* Pin Widget Control */
 333 #define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL                0xf07
 334 #define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL                0x707
 335
 336 #define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid)                           \
 337     (HDA_CMD_12BIT((cad), (nid),                                        \
 338     HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0))
 339 #define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload)                  \
 340     (HDA_CMD_12BIT((cad), (nid),                                        \
 341     HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, (payload)))
 342
 343 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK    0x00000080
 344 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT   7
 345 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK     0x00000040
 346 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT    6
 347 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK      0x00000020
 348 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT     5
 349 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x00000007
 350 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 351
 352 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp)                    \
 353     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >>          \
 354     HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT)
 355 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp)                     \
 356     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >>           \
 357     HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT)
 358 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp)                      \
 359     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >>            \
 360     HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT)
 361 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp)                    \
 362     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >>          \
 363     HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT)
 364
 365 #define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE         0x80
 366 #define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE          0x40
 367 #define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE           0x20
 368 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x07
 369 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 370
 371 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param)                  \
 372     (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) &       \
 373     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
 374
 375 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ         0
 376 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50          1
 377 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND      2
 378 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80          4
 379 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100         5
 380
 381 /* Unsolicited Response */
 382 #define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE           0xf08
 383 #define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE           0x708
 384
 385 #define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid)                      \
 386     (HDA_CMD_12BIT((cad), (nid),                                        \
 387     HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, 0x0))
 388 #define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload)             \
 389     (HDA_CMD_12BIT((cad), (nid),                                        \
 390     HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, (payload)))
 391
 392 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK    0x00000080
 393 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT   7
 394 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK       0x0000001f
 395 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 396
 397 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp)                    \
 398     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >>          \
 399     HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT)
 400 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp)                       \
 401     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >>             \
 402     HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT)
 403
 404 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE         0x80
 405 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK       0x3f
 406 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 407
 408 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param)                     \
 409     (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) &          \
 410     HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK)
 411
 412 /* Pin Sense */
 413 #define HDA_CMD_VERB_GET_PIN_SENSE                      0xf09
 414 #define HDA_CMD_VERB_SET_PIN_SENSE                      0x709
 415
 416 #define HDA_CMD_GET_PIN_SENSE(cad, nid)                                 \
 417     (HDA_CMD_12BIT((cad), (nid),                                        \
 418     HDA_CMD_VERB_GET_PIN_SENSE, 0x0))
 419 #define HDA_CMD_SET_PIN_SENSE(cad, nid, payload)                        \
 420     (HDA_CMD_12BIT((cad), (nid),                                        \
 421     HDA_CMD_VERB_SET_PIN_SENSE, (payload)))
 422
 423 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT           0x80000000
 424 #define HDA_CMD_GET_PIN_SENSE_ELD_VALID                 0x40000000
 425 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK            0x7fffffff
 426 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT           0
 427
 428 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp)                            \
 429     (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >>                  \
 430     HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT)
 431
 432 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID         0x7fffffff
 433
 434 #define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL              0x00
 435 #define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL             0x01
 436
 437 /* EAPD/BTL Enable */
 438 #define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE                0xf0c
 439 #define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE                0x70c
 440
 441 #define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid)                           \
 442     (HDA_CMD_12BIT((cad), (nid),                                        \
 443     HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0))
 444 #define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload)                  \
 445     (HDA_CMD_12BIT((cad), (nid),                                        \
 446     HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, (payload)))
 447
 448 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK        0x00000004
 449 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT       2
 450 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK           0x00000002
 451 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT          1
 452 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK            0x00000001
 453 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT           0
 454
 455 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp)                        \
 456     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >>              \
 457     HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT)
 458 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp)                           \
 459     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >>                 \
 460     HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT)
 461 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp)                            \
 462     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >>                  \
 463     HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT)
 464
 465 #define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP             0x04
 466 #define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD                0x02
 467 #define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL                 0x01
 468
 469 /* GPI Data */
 470 #define HDA_CMD_VERB_GET_GPI_DATA                       0xf10
 471 #define HDA_CMD_VERB_SET_GPI_DATA                       0x710
 472
 473 #define HDA_CMD_GET_GPI_DATA(cad, nid)                                  \
 474     (HDA_CMD_12BIT((cad), (nid),                                        \
 475     HDA_CMD_VERB_GET_GPI_DATA, 0x0))
 476 #define HDA_CMD_SET_GPI_DATA(cad, nid)                                  \
 477     (HDA_CMD_12BIT((cad), (nid),                                        \
 478     HDA_CMD_VERB_SET_GPI_DATA, (payload)))
 479
 480 /* GPI Wake Enable Mask */
 481 #define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK           0xf11
 482 #define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK           0x711
 483
 484 #define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid)                      \
 485     (HDA_CMD_12BIT((cad), (nid),                                        \
 486     HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, 0x0))
 487 #define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload)             \
 488     (HDA_CMD_12BIT((cad), (nid),                                        \
 489     HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, (payload)))
 490
 491 /* GPI Unsolicited Enable Mask */
 492 #define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK    0xf12
 493 #define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK    0x712
 494
 495 #define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid)               \
 496     (HDA_CMD_12BIT((cad), (nid),                                        \
 497     HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0))
 498 #define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload)      \
 499     (HDA_CMD_12BIT((cad), (nid),                                        \
 500     HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload)))
 501
 502 /* GPI Sticky Mask */
 503 #define HDA_CMD_VERB_GET_GPI_STICKY_MASK                0xf13
 504 #define HDA_CMD_VERB_SET_GPI_STICKY_MASK                0x713
 505
 506 #define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid)                           \
 507     (HDA_CMD_12BIT((cad), (nid),                                        \
 508     HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0))
 509 #define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload)                  \
 510     (HDA_CMD_12BIT((cad), (nid),                                        \
 511     HDA_CMD_VERB_SET_GPI_STICKY_MASK, (payload)))
 512
 513 /* GPO Data */
 514 #define HDA_CMD_VERB_GET_GPO_DATA                       0xf14
 515 #define HDA_CMD_VERB_SET_GPO_DATA                       0x714
 516
 517 #define HDA_CMD_GET_GPO_DATA(cad, nid)                                  \
 518     (HDA_CMD_12BIT((cad), (nid),                                        \
 519     HDA_CMD_VERB_GET_GPO_DATA, 0x0))
 520 #define HDA_CMD_SET_GPO_DATA(cad, nid, payload)                         \
 521     (HDA_CMD_12BIT((cad), (nid),                                        \
 522     HDA_CMD_VERB_SET_GPO_DATA, (payload)))
 523
 524 /* GPIO Data */
 525 #define HDA_CMD_VERB_GET_GPIO_DATA                      0xf15
 526 #define HDA_CMD_VERB_SET_GPIO_DATA                      0x715
 527
 528 #define HDA_CMD_GET_GPIO_DATA(cad, nid)                                 \
 529     (HDA_CMD_12BIT((cad), (nid),                                        \
 530     HDA_CMD_VERB_GET_GPIO_DATA, 0x0))
 531 #define HDA_CMD_SET_GPIO_DATA(cad, nid, payload)                        \
 532     (HDA_CMD_12BIT((cad), (nid),                                        \
 533     HDA_CMD_VERB_SET_GPIO_DATA, (payload)))
 534
 535 /* GPIO Enable Mask */
 536 #define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK               0xf16
 537 #define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK               0x716
 538
 539 #define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid)                          \
 540     (HDA_CMD_12BIT((cad), (nid),                                        \
 541     HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0))
 542 #define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload)                 \
 543     (HDA_CMD_12BIT((cad), (nid),                                        \
 544     HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, (payload)))
 545
 546 /* GPIO Direction */
 547 #define HDA_CMD_VERB_GET_GPIO_DIRECTION                 0xf17
 548 #define HDA_CMD_VERB_SET_GPIO_DIRECTION                 0x717
 549
 550 #define HDA_CMD_GET_GPIO_DIRECTION(cad, nid)                            \
 551     (HDA_CMD_12BIT((cad), (nid),                                        \
 552     HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0))
 553 #define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload)                   \
 554     (HDA_CMD_12BIT((cad), (nid),                                        \
 555     HDA_CMD_VERB_SET_GPIO_DIRECTION, (payload)))
 556
 557 /* GPIO Wake Enable Mask */
 558 #define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK          0xf18
 559 #define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK          0x718
 560
 561 #define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid)                     \
 562     (HDA_CMD_12BIT((cad), (nid),                                        \
 563     HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, 0x0))
 564 #define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload)            \
 565     (HDA_CMD_12BIT((cad), (nid),                                        \
 566     HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, (payload)))
 567
 568 /* GPIO Unsolicited Enable Mask */
 569 #define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK   0xf19
 570 #define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK   0x719
 571
 572 #define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid)              \
 573     (HDA_CMD_12BIT((cad), (nid),                                        \
 574     HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0))
 575 #define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload)     \
 576     (HDA_CMD_12BIT((cad), (nid),                                        \
 577     HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload)))
 578
 579 /* GPIO_STICKY_MASK */
 580 #define HDA_CMD_VERB_GET_GPIO_STICKY_MASK               0xf1a
 581 #define HDA_CMD_VERB_SET_GPIO_STICKY_MASK               0x71a
 582
 583 #define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid)                          \
 584     (HDA_CMD_12BIT((cad), (nid),                                        \
 585     HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0))
 586 #define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload)                 \
 587     (HDA_CMD_12BIT((cad), (nid),                                        \
 588     HDA_CMD_VERB_SET_GPIO_STICKY_MASK, (payload)))
 589
 590 /* Beep Generation */
 591 #define HDA_CMD_VERB_GET_BEEP_GENERATION                0xf0a
 592 #define HDA_CMD_VERB_SET_BEEP_GENERATION                0x70a
 593
 594 #define HDA_CMD_GET_BEEP_GENERATION(cad, nid)                           \
 595     (HDA_CMD_12BIT((cad), (nid),                                        \
 596     HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0))
 597 #define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload)                  \
 598     (HDA_CMD_12BIT((cad), (nid),                                        \
 599     HDA_CMD_VERB_SET_BEEP_GENERATION, (payload)))
 600
 601 /* Volume Knob */
 602 #define HDA_CMD_VERB_GET_VOLUME_KNOB                    0xf0f
 603 #define HDA_CMD_VERB_SET_VOLUME_KNOB                    0x70f
 604
 605 #define HDA_CMD_GET_VOLUME_KNOB(cad, nid)                               \
 606     (HDA_CMD_12BIT((cad), (nid),                                        \
 607     HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0))
 608 #define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload)                      \
 609     (HDA_CMD_12BIT((cad), (nid),                                        \
 610     HDA_CMD_VERB_SET_VOLUME_KNOB, (payload)))
 611
 612 /* Subsystem ID */
 613 #define HDA_CMD_VERB_GET_SUBSYSTEM_ID                   0xf20
 614 #define HDA_CMD_VERB_SET_SUSBYSTEM_ID1                  0x720
 615 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID2                  0x721
 616 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID3                  0x722
 617 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID4                  0x723
 618
 619 #define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid)                              \
 620     (HDA_CMD_12BIT((cad), (nid),                                        \
 621     HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0))
 622 #define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload)                    \
 623     (HDA_CMD_12BIT((cad), (nid),                                        \
 624     HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload)))
 625 #define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload)                    \
 626     (HDA_CMD_12BIT((cad), (nid),                                        \
 627     HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload)))
 628 #define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload)                    \
 629     (HDA_CMD_12BIT((cad), (nid),                                        \
 630     HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload)))
 631 #define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload)                    \
 632     (HDA_CMD_12BIT((cad), (nid),                                        \
 633     HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload)))
 634
 635 /* Configuration Default */
 636 #define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT          0xf1c
 637 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1         0x71c
 638 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2         0x71d
 639 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3         0x71e
 640 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4         0x71f
 641
 642 #define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid)                     \
 643     (HDA_CMD_12BIT((cad), (nid),                                        \
 644     HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, 0x0))
 645 #define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload)           \
 646     (HDA_CMD_12BIT((cad), (nid),                                        \
 647     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, (payload)))
 648 #define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload)           \
 649     (HDA_CMD_12BIT((cad), (nid),                                        \
 650     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, (payload)))
 651 #define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload)           \
 652     (HDA_CMD_12BIT((cad), (nid),                                        \
 653     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, (payload)))
 654 #define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload)           \
 655     (HDA_CMD_12BIT((cad), (nid),                                        \
 656     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, (payload)))
 657
 658 /* Stripe Control */
 659 #define HDA_CMD_VERB_GET_STRIPE_CONTROL                 0xf24
 660 #define HDA_CMD_VERB_SET_STRIPE_CONTROL                 0x724
 661
 662 #define HDA_CMD_GET_STRIPE_CONTROL(cad, nid)                            \
 663     (HDA_CMD_12BIT((cad), (nid),                                        \
 664     HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0))
 665 #define HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload)                   \
 666     (HDA_CMD_12BIT((cad), (nid),                                        \
 667     HDA_CMD_VERB_SET_STRIPE_CONTROL, (payload)))
 668
 669 /* Channel Count Control */
 670 #define HDA_CMD_VERB_GET_CONV_CHAN_COUNT                        0xf2d
 671 #define HDA_CMD_VERB_SET_CONV_CHAN_COUNT                        0x72d
 672
 673 #define HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid)                           \
 674     (HDA_CMD_12BIT((cad), (nid),                                        \
 675     HDA_CMD_VERB_GET_CONV_CHAN_COUNT, 0x0))
 676 #define HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload)                  \
 677     (HDA_CMD_12BIT((cad), (nid),                                        \
 678     HDA_CMD_VERB_SET_CONV_CHAN_COUNT, (payload)))
 679
 680 #define HDA_CMD_VERB_GET_HDMI_DIP_SIZE                  0xf2e
 681
 682 #define HDA_CMD_GET_HDMI_DIP_SIZE(cad, nid, arg)                        \
 683     (HDA_CMD_12BIT((cad), (nid),                                        \
 684     HDA_CMD_VERB_GET_HDMI_DIP_SIZE, (arg)))
 685
 686 #define HDA_CMD_VERB_GET_HDMI_ELDD                      0xf2f
 687
 688 #define HDA_CMD_GET_HDMI_ELDD(cad, nid, off)                            \
 689     (HDA_CMD_12BIT((cad), (nid),                                        \
 690     HDA_CMD_VERB_GET_HDMI_ELDD, (off)))
 691
 692 #define HDA_CMD_VERB_GET_HDMI_DIP_INDEX                 0xf30
 693 #define HDA_CMD_VERB_SET_HDMI_DIP_INDEX                 0x730
 694
 695 #define HDA_CMD_GET_HDMI_DIP_INDEX(cad, nid)                            \
 696     (HDA_CMD_12BIT((cad), (nid),                                        \
 697     HDA_CMD_VERB_GET_HDMI_DIP_INDEX, 0x0))
 698 #define HDA_CMD_SET_HDMI_DIP_INDEX(cad, nid, payload)                   \
 699     (HDA_CMD_12BIT((cad), (nid),                                        \
 700     HDA_CMD_VERB_SET_HDMI_DIP_INDEX, (payload)))
 701
 702 #define HDA_CMD_VERB_GET_HDMI_DIP_DATA                  0xf31
 703 #define HDA_CMD_VERB_SET_HDMI_DIP_DATA                  0x731
 704
 705 #define HDA_CMD_GET_HDMI_DIP_DATA(cad, nid)                             \
 706     (HDA_CMD_12BIT((cad), (nid),                                        \
 707     HDA_CMD_VERB_GET_HDMI_DIP_DATA, 0x0))
 708 #define HDA_CMD_SET_HDMI_DIP_DATA(cad, nid, payload)                    \
 709     (HDA_CMD_12BIT((cad), (nid),                                        \
 710     HDA_CMD_VERB_SET_HDMI_DIP_DATA, (payload)))
 711
 712 #define HDA_CMD_VERB_GET_HDMI_DIP_XMIT                  0xf32
 713 #define HDA_CMD_VERB_SET_HDMI_DIP_XMIT                  0x732
 714
 715 #define HDA_CMD_GET_HDMI_DIP_XMIT(cad, nid)                             \
 716     (HDA_CMD_12BIT((cad), (nid),                                        \
 717     HDA_CMD_VERB_GET_HDMI_DIP_XMIT, 0x0))
 718 #define HDA_CMD_SET_HDMI_DIP_XMIT(cad, nid, payload)                    \
 719     (HDA_CMD_12BIT((cad), (nid),                                        \
 720     HDA_CMD_VERB_SET_HDMI_DIP_XMIT, (payload)))
 721
 722 #define HDA_CMD_VERB_GET_HDMI_CP_CTRL                   0xf33
 723 #define HDA_CMD_VERB_SET_HDMI_CP_CTRL                   0x733
 724
 725 #define HDA_CMD_VERB_GET_HDMI_CHAN_SLOT                 0xf34
 726 #define HDA_CMD_VERB_SET_HDMI_CHAN_SLOT                 0x734
 727
 728 #define HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid)                            \
 729     (HDA_CMD_12BIT((cad), (nid),                                        \
 730     HDA_CMD_VERB_GET_HDMI_CHAN_SLOT, 0x0))
 731 #define HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload)                   \
 732     (HDA_CMD_12BIT((cad), (nid),                                        \
 733     HDA_CMD_VERB_SET_HDMI_CHAN_SLOT, (payload)))
 734
 735 #define HDA_HDMI_CODING_TYPE_REF_STREAM_HEADER          0
 736 #define HDA_HDMI_CODING_TYPE_LPCM                       1
 737 #define HDA_HDMI_CODING_TYPE_AC3                        2
 738 #define HDA_HDMI_CODING_TYPE_MPEG1                      3
 739 #define HDA_HDMI_CODING_TYPE_MP3                        4
 740 #define HDA_HDMI_CODING_TYPE_MPEG2                      5
 741 #define HDA_HDMI_CODING_TYPE_AACLC                      6
 742 #define HDA_HDMI_CODING_TYPE_DTS                        7
 743 #define HDA_HDMI_CODING_TYPE_ATRAC                      8
 744 #define HDA_HDMI_CODING_TYPE_SACD                       9
 745 #define HDA_HDMI_CODING_TYPE_EAC3                       10
 746 #define HDA_HDMI_CODING_TYPE_DTS_HD                     11
 747 #define HDA_HDMI_CODING_TYPE_MLP                        12
 748 #define HDA_HDMI_CODING_TYPE_DST                        13
 749 #define HDA_HDMI_CODING_TYPE_WMAPRO                     14
 750 #define HDA_HDMI_CODING_TYPE_REF_CTX                    15
 751
 752 /* Function Reset */
 753 #define HDA_CMD_VERB_FUNCTION_RESET                     0x7ff
 754
 755 #define HDA_CMD_FUNCTION_RESET(cad, nid)                                \
 756     (HDA_CMD_12BIT((cad), (nid),                                        \
 757     HDA_CMD_VERB_FUNCTION_RESET, 0x0))
 758
 759
 760 /****************************************************************************
 761  * HDA Device Parameters
 762  ****************************************************************************/
 763
 764 /* Vendor ID */
 765 #define HDA_PARAM_VENDOR_ID                             0x00
 766
 767 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK              0xffff0000
 768 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT             16
 769 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK              0x0000ffff
 770 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT             0
 771
 772 #define HDA_PARAM_VENDOR_ID_VENDOR_ID(param)                            \
 773     (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >>                  \
 774     HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT)
 775 #define HDA_PARAM_VENDOR_ID_DEVICE_ID(param)                            \
 776     (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >>                  \
 777     HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT)
 778
 779 /* Revision ID */
 780 #define HDA_PARAM_REVISION_ID                           0x02
 781
 782 #define HDA_PARAM_REVISION_ID_MAJREV_MASK               0x00f00000
 783 #define HDA_PARAM_REVISION_ID_MAJREV_SHIFT              20
 784 #define HDA_PARAM_REVISION_ID_MINREV_MASK               0x000f0000
 785 #define HDA_PARAM_REVISION_ID_MINREV_SHIFT              16
 786 #define HDA_PARAM_REVISION_ID_REVISION_ID_MASK          0x0000ff00
 787 #define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT         8
 788 #define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK          0x000000ff
 789 #define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT         0
 790
 791 #define HDA_PARAM_REVISION_ID_MAJREV(param)                             \
 792     (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >>                   \
 793     HDA_PARAM_REVISION_ID_MAJREV_SHIFT)
 794 #define HDA_PARAM_REVISION_ID_MINREV(param)                             \
 795     (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >>                   \
 796     HDA_PARAM_REVISION_ID_MINREV_SHIFT)
 797 #define HDA_PARAM_REVISION_ID_REVISION_ID(param)                        \
 798     (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >>              \
 799     HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT)
 800 #define HDA_PARAM_REVISION_ID_STEPPING_ID(param)                        \
 801     (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >>              \
 802     HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT)
 803
 804 /* Subordinate Node Cound */
 805 #define HDA_PARAM_SUB_NODE_COUNT                        0x04
 806
 807 #define HDA_PARAM_SUB_NODE_COUNT_START_MASK             0x00ff0000
 808 #define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT            16
 809 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK             0x000000ff
 810 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT            0
 811
 812 #define HDA_PARAM_SUB_NODE_COUNT_START(param)                           \
 813     (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >>                 \
 814     HDA_PARAM_SUB_NODE_COUNT_START_SHIFT)
 815 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param)                           \
 816     (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >>                 \
 817     HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT)
 818
 819 /* Function Group Type */
 820 #define HDA_PARAM_FCT_GRP_TYPE                          0x05
 821
 822 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK               0x00000100
 823 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT              8
 824 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK           0x000000ff
 825 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT  0
 826
 827 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param)                             \
 828     (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >>                   \
 829     HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT)
 830 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param)                         \
 831     (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >>               \
 832     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT)
 833
 834 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO          0x01
 835 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM          0x02
 836
 837 /* Audio Function Group Capabilities */
 838 #define HDA_PARAM_AUDIO_FCT_GRP_CAP                     0x08
 839
 840 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK       0x00010000
 841 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT      16
 842 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK    0x00000f00
 843 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT   8
 844 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK   0x0000000f
 845 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT  0
 846
 847 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param)                     \
 848     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >>           \
 849     HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT)
 850 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param)                  \
 851     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >>        \
 852     HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT)
 853 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param)                 \
 854     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >>       \
 855     HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT)
 856
 857 /* Audio Widget Capabilities */
 858 #define HDA_PARAM_AUDIO_WIDGET_CAP                      0x09
 859
 860 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK            0x00f00000
 861 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT           20
 862 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK           0x000f0000
 863 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT          16
 864 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK          0x0000e000
 865 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT         13
 866 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK              0x00001000
 867 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT             12
 868 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK         0x00000800
 869 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT        11
 870 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK      0x00000400
 871 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT     10
 872 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK         0x00000200
 873 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT        9
 874 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK       0x00000100
 875 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT      8
 876 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK       0x00000080
 877 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT      7
 878 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK     0x00000040
 879 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT    6
 880 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK          0x00000020
 881 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT         5
 882 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK      0x00000010
 883 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT     4
 884 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK         0x00000008
 885 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT        3
 886 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK         0x00000004
 887 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT        2
 888 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK          0x00000002
 889 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT         1
 890 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK          0x00000001
 891 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT         0
 892
 893 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param)                          \
 894     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >>                \
 895     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT)
 896 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param)                         \
 897     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >>               \
 898     HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT)
 899 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC(param)                            \
 900     ((((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK) >>             \
 901     (HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT - 1)) |                    \
 902     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 903     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT))
 904 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP(param)                            \
 905     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK) >>                  \
 906     HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT)
 907 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param)                       \
 908     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >>             \
 909     HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT)
 910 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param)                    \
 911     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >>          \
 912     HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT)
 913 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param)                       \
 914     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >>             \
 915     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT)
 916 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param)                     \
 917     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >>           \
 918     HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT)
 919 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param)                     \
 920     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >>           \
 921     HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT)
 922 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param)                   \
 923     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >>         \
 924     HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT)
 925 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param)                        \
 926     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >>              \
 927     HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT)
 928 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param)                    \
 929     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >>          \
 930     HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT)
 931 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param)                       \
 932     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >>             \
 933     HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT)
 934 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param)                       \
 935     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >>             \
 936     HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT)
 937 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param)                        \
 938     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >>              \
 939     HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT)
 940 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param)                        \
 941     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 942     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)
 943
 944 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT    0x0
 945 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT     0x1
 946 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER     0x2
 947 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR  0x3
 948 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX     0x4
 949 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET    0x5
 950 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET   0x6
 951 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET     0x7
 952 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET   0xf
 953
 954 /* Supported PCM Size, Rates */
 955
 956 #define HDA_PARAM_SUPP_PCM_SIZE_RATE                    0x0a
 957
 958 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK         0x00100000
 959 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT        20
 960 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK         0x00080000
 961 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT        19
 962 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK         0x00040000
 963 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT        18
 964 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK         0x00020000
 965 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT        17
 966 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK          0x00010000
 967 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT         16
 968 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK          0x00000001
 969 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT         0
 970 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK         0x00000002
 971 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT        1
 972 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK         0x00000004
 973 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT        2
 974 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK         0x00000008
 975 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT        3
 976 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK         0x00000010
 977 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT        4
 978 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK         0x00000020
 979 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT        5
 980 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK         0x00000040
 981 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT        6
 982 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK         0x00000080
 983 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT        7
 984 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK         0x00000100
 985 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT        8
 986 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK        0x00000200
 987 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT       9
 988 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK        0x00000400
 989 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT       10
 990 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK        0x00000800
 991 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT       11
 992
 993 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param)                       \
 994     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >>             \
 995     HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT)
 996 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param)                       \
 997     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >>             \
 998     HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT)
 999 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param)                       \
1000     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >>             \
1001     HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT)
1002 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param)                       \
1003     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >>             \
1004     HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT)
1005 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param)                        \
1006     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >>              \
1007     HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT)
1008 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param)                        \
1009     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >>              \
1010     HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT)
1011 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param)                       \
1012     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >>             \
1013     HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT)
1014 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param)                       \
1015     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >>             \
1016     HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT)
1017 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param)                       \
1018     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >>             \
1019     HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT)
1020 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param)                       \
1021     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >>             \
1022     HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT)
1023 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param)                       \
1024     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >>             \
1025     HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT)
1026 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param)                       \
1027     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >>             \
1028     HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT)
1029 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param)                       \
1030     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >>             \
1031     HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT)
1032 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param)                       \
1033     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >>             \
1034     HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT)
1035 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param)                      \
1036     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >>            \
1037     HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT)
1038 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param)                      \
1039     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >>            \
1040     HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT)
1041 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param)                      \
1042     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >>            \
1043     HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT)
1044
1045 /* Supported Stream Formats */
1046 #define HDA_PARAM_SUPP_STREAM_FORMATS                   0x0b
1047
1048 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK          0x00000004
1049 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT         2
1050 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK      0x00000002
1051 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT     1
1052 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK          0x00000001
1053 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT         0
1054
1055 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param)                        \
1056     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >>              \
1057     HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT)
1058 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param)                    \
1059     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >>          \
1060     HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT)
1061 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param)                        \
1062     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >>              \
1063     HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT)
1064
1065 /* Pin Capabilities */
1066 #define HDA_PARAM_PIN_CAP                               0x0c
1067
1068 #define HDA_PARAM_PIN_CAP_HBR_MASK                      0x08000000
1069 #define HDA_PARAM_PIN_CAP_HBR_SHIFT                     27
1070 #define HDA_PARAM_PIN_CAP_DP_MASK                       0x01000000
1071 #define HDA_PARAM_PIN_CAP_DP_SHIFT                      24
1072 #define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK                 0x00010000
1073 #define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT                16
1074 #define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK                0x0000ff00
1075 #define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT               8
1076 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK            0x00002000
1077 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT           13
1078 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK             0x00001000
1079 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT            12
1080 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK         0x00000400
1081 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT        10
1082 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK             0x00000200
1083 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT            9
1084 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK            0x00000100
1085 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT           8
1086 #define HDA_PARAM_PIN_CAP_HDMI_MASK                     0x00000080
1087 #define HDA_PARAM_PIN_CAP_HDMI_SHIFT                    7
1088 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK         0x00000040
1089 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT        6
1090 #define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK                0x00000020
1091 #define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT               5
1092 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK               0x00000010
1093 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT              4
1094 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK            0x00000008
1095 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT           3
1096 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK      0x00000004
1097 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT     2
1098 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK             0x00000002
1099 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT            1
1100 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK            0x00000001
1101 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT           0
1102
1103 #define HDA_PARAM_PIN_CAP_HBR(param)                                    \
1104     (((param) & HDA_PARAM_PIN_CAP_HBR_MASK) >>                          \
1105     HDA_PARAM_PIN_CAP_HBR_SHIFT)
1106 #define HDA_PARAM_PIN_CAP_DP(param)                                     \
1107     (((param) & HDA_PARAM_PIN_CAP_DP_MASK) >>                           \
1108     HDA_PARAM_PIN_CAP_DP_SHIFT)
1109 #define HDA_PARAM_PIN_CAP_EAPD_CAP(param)                               \
1110     (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >>                     \
1111     HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT)
1112 #define HDA_PARAM_PIN_CAP_VREF_CTRL(param)                              \
1113     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >>                    \
1114     HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT)
1115 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param)                          \
1116     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >>                \
1117     HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT)
1118 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param)                           \
1119     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >>                 \
1120     HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT)
1121 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param)                       \
1122     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >>             \
1123     HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT)
1124 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param)                           \
1125     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >>                 \
1126     HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT)
1127 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param)                          \
1128     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >>                \
1129     HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT)
1130 #define HDA_PARAM_PIN_CAP_HDMI(param)                                   \
1131     (((param) & HDA_PARAM_PIN_CAP_HDMI_MASK) >>                         \
1132     HDA_PARAM_PIN_CAP_HDMI_SHIFT)
1133 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param)                       \
1134     (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >>             \
1135     HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT)
1136 #define HDA_PARAM_PIN_CAP_INPUT_CAP(param)                              \
1137     (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >>                    \
1138     HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT)
1139 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param)                             \
1140     (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >>                   \
1141     HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT)
1142 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param)                          \
1143     (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >>                \
1144     HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT)
1145 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param)                    \
1146     (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >>          \
1147     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT)
1148 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param)                           \
1149     (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >>                 \
1150     HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT)
1151 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param)                          \
1152     (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >>                \
1153     HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT)
1154
1155 /* Input Amplifier Capabilities */
1156 #define HDA_PARAM_INPUT_AMP_CAP                         0x0d
1157
1158 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK           0x80000000
1159 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT          31
1160 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK           0x007f0000
1161 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT          16
1162 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK           0x00007f00
1163 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT          8
1164 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK             0x0000007f
1165 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT            0
1166
1167 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param)                         \
1168     (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >>               \
1169     HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT)
1170 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param)                         \
1171     (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >>               \
1172     HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT)
1173 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param)                         \
1174     (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >>               \
1175     HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT)
1176 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param)                           \
1177     (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >>                 \
1178     HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT)
1179
1180 /* Output Amplifier Capabilities */
1181 #define HDA_PARAM_OUTPUT_AMP_CAP                        0x12
1182
1183 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK          0x80000000
1184 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT         31
1185 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK          0x007f0000
1186 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT         16
1187 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK          0x00007f00
1188 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT         8
1189 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK            0x0000007f
1190 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT           0
1191
1192 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param)                        \
1193     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >>              \
1194     HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT)
1195 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param)                        \
1196     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >>              \
1197     HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT)
1198 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param)                        \
1199     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >>              \
1200     HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT)
1201 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param)                          \
1202     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >>                \
1203     HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT)
1204
1205 /* Connection List Length */
1206 #define HDA_PARAM_CONN_LIST_LENGTH                      0x0e
1207
1208 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK       0x00000080
1209 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT      7
1210 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK     0x0000007f
1211 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT    0
1212
1213 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param)                     \
1214     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >>           \
1215     HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT)
1216 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param)                   \
1217     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >>         \
1218     HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT)
1219
1220 /* Supported Power States */
1221 #define HDA_PARAM_SUPP_POWER_STATES                     0x0f
1222
1223 #define HDA_PARAM_SUPP_POWER_STATES_D3_MASK             0x00000008
1224 #define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT            3
1225 #define HDA_PARAM_SUPP_POWER_STATES_D2_MASK             0x00000004
1226 #define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT            2
1227 #define HDA_PARAM_SUPP_POWER_STATES_D1_MASK             0x00000002
1228 #define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT            1
1229 #define HDA_PARAM_SUPP_POWER_STATES_D0_MASK             0x00000001
1230 #define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT            0
1231
1232 #define HDA_PARAM_SUPP_POWER_STATES_D3(param)                           \
1233     (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >>                 \
1234     HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT)
1235 #define HDA_PARAM_SUPP_POWER_STATES_D2(param)                           \
1236     (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >>                 \
1237     HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT)
1238 #define HDA_PARAM_SUPP_POWER_STATES_D1(param)                           \
1239     (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >>                 \
1240     HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT)
1241 #define HDA_PARAM_SUPP_POWER_STATES_D0(param)                           \
1242     (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >>                 \
1243     HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT)
1244
1245 /* Processing Capabilities */
1246 #define HDA_PARAM_PROCESSING_CAP                        0x10
1247
1248 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK          0x0000ff00
1249 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT         8
1250 #define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK            0x00000001
1251 #define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT           0
1252
1253 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param)                        \
1254     (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >>              \
1255     HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT)
1256 #define HDA_PARAM_PROCESSING_CAP_BENIGN(param)                          \
1257     (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >>                \
1258     HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT)
1259
1260 /* GPIO Count */
1261 #define HDA_PARAM_GPIO_COUNT                            0x11
1262
1263 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK              0x80000000
1264 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT             31
1265 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK             0x40000000
1266 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT            30
1267 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK               0x00ff0000
1268 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT              16
1269 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK               0x0000ff00
1270 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT              8
1271 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK              0x000000ff
1272 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT             0
1273
1274 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param)                            \
1275     (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >>                  \
1276     HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT)
1277 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param)                           \
1278     (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >>                 \
1279     HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT)
1280 #define HDA_PARAM_GPIO_COUNT_NUM_GPI(param)                             \
1281     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >>                   \
1282     HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT)
1283 #define HDA_PARAM_GPIO_COUNT_NUM_GPO(param)                             \
1284     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >>                   \
1285     HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT)
1286 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param)                            \
1287     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >>                  \
1288     HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT)
1289
1290 /* Volume Knob Capabilities */
1291 #define HDA_PARAM_VOLUME_KNOB_CAP                       0x13
1292
1293 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK            0x00000080
1294 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT           7
1295 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK        0x0000007f
1296 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT       0
1297
1298 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param)                          \
1299     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >>                \
1300     HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT)
1301 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param)                      \
1302     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >>            \
1303     HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT)
1304
1305
1306 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK            0x0000000f
1307 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT           0
1308 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK         0x000000f0
1309 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT        4
1310 #define HDA_CONFIG_DEFAULTCONF_MISC_MASK                0x00000f00
1311 #define HDA_CONFIG_DEFAULTCONF_MISC_SHIFT               8
1312 #define HDA_CONFIG_DEFAULTCONF_COLOR_MASK               0x0000f000
1313 #define HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT              12
1314 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK     0x000f0000
1315 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT    16
1316 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK              0x00f00000
1317 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT             20
1318 #define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK            0x3f000000
1319 #define HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT           24
1320 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK        0xc0000000
1321 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT       30
1322
1323 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf)                           \
1324     (((conf) & HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK) >>                 \
1325     HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT)
1326 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf)                        \
1327     (((conf) & HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) >>              \
1328     HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT)
1329 #define HDA_CONFIG_DEFAULTCONF_MISC(conf)                               \
1330     (((conf) & HDA_CONFIG_DEFAULTCONF_MISC_MASK) >>                     \
1331     HDA_CONFIG_DEFAULTCONF_MISC_SHIFT)
1332 #define HDA_CONFIG_DEFAULTCONF_COLOR(conf)                              \
1333     (((conf) & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >>                    \
1334     HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT)
1335 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf)                    \
1336     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK) >>          \
1337     HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT)
1338 #define HDA_CONFIG_DEFAULTCONF_DEVICE(conf)                             \
1339     (((conf) & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >>                   \
1340     HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT)
1341 #define HDA_CONFIG_DEFAULTCONF_LOCATION(conf)                           \
1342     (((conf) & HDA_CONFIG_DEFAULTCONF_LOCATION_MASK) >>                 \
1343     HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT)
1344 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)                       \
1345     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >>             \
1346     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT)
1347
1348 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK                (0<<30)
1349 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE                (1<<30)
1350 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED               (2<<30)
1351 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH                (3<<30)
1352
1353 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT                  (0<<20)
1354 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER                   (1<<20)
1355 #define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT                    (2<<20)
1356 #define HDA_CONFIG_DEFAULTCONF_DEVICE_CD                        (3<<20)
1357 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT                 (4<<20)
1358 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT         (5<<20)
1359 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE                (6<<20)
1360 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET             (7<<20)
1361 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN                   (8<<20)
1362 #define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX                       (9<<20)
1363 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN                    (10<<20)
1364 #define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY                 (11<<20)
1365 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN                  (12<<20)
1366 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN          (13<<20)
1367 #define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER                     (15<<20)
1368
1369 #endif /* _HDA_REG_H_ */