2 * Copyright (c) 2012 NetApp, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/types.h>
33 #include <sys/errno.h>
34 #include <x86/mptable.h>
42 #define MPTABLE_BASE 0xF0000
44 /* floating pointer length + maximum length of configuration table */
45 #define MPTABLE_MAX_LENGTH (65536 + 16)
47 #define LAPIC_PADDR 0xFEE00000
48 #define LAPIC_VERSION 16
50 #define IOAPIC_PADDR 0xFEC00000
51 #define IOAPIC_VERSION 0x11
54 #define MPFP_SIG "_MP_"
56 /* Configuration header defines */
57 #define MPCH_SIG "PCMP"
58 #define MPCH_OEMID "BHyVe "
59 #define MPCH_OEMID_LEN 8
60 #define MPCH_PRODID "Hypervisor "
61 #define MPCH_PRODID_LEN 12
63 /* Processor entry defines */
64 #define MPEP_SIG_FAMILY 6 /* XXX bhyve should supply this */
65 #define MPEP_SIG_MODEL 26
66 #define MPEP_SIG_STEPPING 5
68 ((MPEP_SIG_FAMILY << 8) | \
69 (MPEP_SIG_MODEL << 4) | \
72 #define MPEP_FEATURES (0xBFEBFBFF) /* XXX Intel i7 */
74 /* Number of i/o intr entries */
75 #define MPEII_MAX_IRQ 16
77 /* Define processor entry struct since <x86/mptable.h> gets it wrong */
78 typedef struct BPROCENTRY {
83 uint32_t cpu_signature;
84 uint32_t feature_flags;
88 CTASSERT(sizeof(struct BPROCENTRY) == 20);
90 /* Bus entry defines */
91 #define MPE_NUM_BUSES 2
92 #define MPE_BUSNAME_LEN 6
93 #define MPE_BUSNAME_ISA "ISA "
94 #define MPE_BUSNAME_PCI "PCI "
96 static void *oem_tbl_start;
97 static int oem_tbl_size;
100 mpt_compute_checksum(void *base, size_t len)
105 for(bytes = base, sum = 0; len > 0; len--) {
113 mpt_build_mpfp(mpfps_t mpfp, vm_paddr_t gpa)
116 memset(mpfp, 0, sizeof(*mpfp));
117 memcpy(mpfp->signature, MPFP_SIG, 4);
118 mpfp->pap = gpa + sizeof(*mpfp);
120 mpfp->spec_rev = MP_SPECREV;
121 mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(*mpfp));
125 mpt_build_mpch(mpcth_t mpch)
128 memset(mpch, 0, sizeof(*mpch));
129 memcpy(mpch->signature, MPCH_SIG, 4);
130 mpch->spec_rev = MP_SPECREV;
131 memcpy(mpch->oem_id, MPCH_OEMID, MPCH_OEMID_LEN);
132 memcpy(mpch->product_id, MPCH_PRODID, MPCH_PRODID_LEN);
133 mpch->apic_address = LAPIC_PADDR;
137 mpt_build_proc_entries(bproc_entry_ptr mpep, int ncpu)
141 for (i = 0; i < ncpu; i++) {
142 memset(mpep, 0, sizeof(*mpep));
143 mpep->type = MPCT_ENTRY_PROCESSOR;
144 mpep->apic_id = i; // XXX
145 mpep->apic_version = LAPIC_VERSION;
146 mpep->cpu_flags = PROCENTRY_FLAG_EN;
148 mpep->cpu_flags |= PROCENTRY_FLAG_BP;
149 mpep->cpu_signature = MPEP_SIG;
150 mpep->feature_flags = MPEP_FEATURES;
156 mpt_build_bus_entries(bus_entry_ptr mpeb)
159 memset(mpeb, 0, sizeof(*mpeb));
160 mpeb->type = MPCT_ENTRY_BUS;
162 memcpy(mpeb->bus_type, MPE_BUSNAME_PCI, MPE_BUSNAME_LEN);
165 memset(mpeb, 0, sizeof(*mpeb));
166 mpeb->type = MPCT_ENTRY_BUS;
168 memcpy(mpeb->bus_type, MPE_BUSNAME_ISA, MPE_BUSNAME_LEN);
172 mpt_build_ioapic_entries(io_apic_entry_ptr mpei, int id)
175 memset(mpei, 0, sizeof(*mpei));
176 mpei->type = MPCT_ENTRY_IOAPIC;
178 mpei->apic_version = IOAPIC_VERSION;
179 mpei->apic_flags = IOAPICENTRY_FLAG_EN;
180 mpei->apic_address = IOAPIC_PADDR;
184 mpt_build_ioint_entries(int_entry_ptr mpie, int num_pins, int id)
189 * The following config is taken from kernel mptable.c
190 * mptable_parse_default_config_ints(...), for now
191 * just use the default config, tweek later if needed.
194 /* Run through all 16 pins. */
195 for (pin = 0; pin < num_pins; pin++) {
196 memset(mpie, 0, sizeof(*mpie));
197 mpie->type = MPCT_ENTRY_INT;
198 mpie->src_bus_id = 1;
199 mpie->dst_apic_id = id;
202 * All default configs route IRQs from bus 0 to the first 16
203 * pins of the first I/O APIC with an APIC ID of 2.
205 mpie->dst_apic_int = pin;
208 /* Pin 0 is an ExtINT pin. */
209 mpie->int_type = INTENTRY_TYPE_EXTINT;
212 /* IRQ 0 is routed to pin 2. */
213 mpie->int_type = INTENTRY_TYPE_INT;
214 mpie->src_bus_irq = 0;
220 * PCI Irqs set to level triggered.
222 mpie->int_flags = INTENTRY_FLAGS_TRIGGER_LEVEL;
223 mpie->src_bus_id = 0;
226 /* All other pins are identity mapped. */
227 mpie->int_type = INTENTRY_TYPE_INT;
228 mpie->src_bus_irq = pin;
237 mptable_add_oemtbl(void *tbl, int tblsz)
241 oem_tbl_size = tblsz;
245 mptable_build(struct vmctx *ctx, int ncpu)
249 io_apic_entry_ptr mpei;
250 bproc_entry_ptr mpep;
256 startaddr = paddr_guest2host(ctx, MPTABLE_BASE, MPTABLE_MAX_LENGTH);
257 if (startaddr == NULL) {
258 printf("mptable requires mapped mem\n");
262 curraddr = startaddr;
263 mpfp = (mpfps_t)curraddr;
264 mpt_build_mpfp(mpfp, MPTABLE_BASE);
265 curraddr += sizeof(*mpfp);
267 mpch = (mpcth_t)curraddr;
268 mpt_build_mpch(mpch);
269 curraddr += sizeof(*mpch);
271 mpep = (bproc_entry_ptr)curraddr;
272 mpt_build_proc_entries(mpep, ncpu);
273 curraddr += sizeof(*mpep) * ncpu;
274 mpch->entry_count += ncpu;
276 mpeb = (bus_entry_ptr) curraddr;
277 mpt_build_bus_entries(mpeb);
278 curraddr += sizeof(*mpeb) * MPE_NUM_BUSES;
279 mpch->entry_count += MPE_NUM_BUSES;
281 mpei = (io_apic_entry_ptr)curraddr;
282 mpt_build_ioapic_entries(mpei, 0);
283 curraddr += sizeof(*mpei);
286 mpie = (int_entry_ptr) curraddr;
287 mpt_build_ioint_entries(mpie, MPEII_MAX_IRQ, 0);
288 curraddr += sizeof(*mpie) * MPEII_MAX_IRQ;
289 mpch->entry_count += MPEII_MAX_IRQ;
292 mpch->oem_table_pointer = curraddr - startaddr + MPTABLE_BASE;
293 mpch->oem_table_size = oem_tbl_size;
294 memcpy(curraddr, oem_tbl_start, oem_tbl_size);
297 mpch->base_table_length = curraddr - (char *)mpch;
298 mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);