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1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2015 Nahanni Systems, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include <sys/types.h>
35 #include <sys/mman.h>
36
37 #include <machine/vmm.h>
38 #include <vmmapi.h>
39
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43
44 #include <errno.h>
45 #include <unistd.h>
46
47 #include "bhyvegc.h"
48 #include "bhyverun.h"
49 #include "console.h"
50 #include "inout.h"
51 #include "pci_emul.h"
52 #include "rfb.h"
53 #include "vga.h"
54
55 /*
56  * bhyve Framebuffer device emulation.
57  * BAR0 points to the current mode information.
58  * BAR1 is the 32-bit framebuffer address.
59  *
60  *  -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height
61  */
62
63 static int fbuf_debug = 1;
64 #define DEBUG_INFO      1
65 #define DEBUG_VERBOSE   4
66 #define DPRINTF(level, params)  if (level <= fbuf_debug) printf params
67
68
69 #define KB      (1024UL)
70 #define MB      (1024 * 1024UL)
71
72 #define DMEMSZ  128
73
74 #define FB_SIZE         (16*MB)
75
76 #define COLS_MAX        1920
77 #define ROWS_MAX        1200
78
79 #define COLS_DEFAULT    1024
80 #define ROWS_DEFAULT    768
81
82 #define COLS_MIN        640
83 #define ROWS_MIN        480
84
85 struct pci_fbuf_softc {
86         struct pci_devinst *fsc_pi;
87         struct {
88                 uint32_t fbsize;
89                 uint16_t width;
90                 uint16_t height;
91                 uint16_t depth;
92                 uint16_t refreshrate;
93                 uint8_t  reserved[116];
94         } __packed memregs;
95
96         /* rfb server */
97         char      *rfb_host;
98         char      *rfb_password;
99         int       rfb_port;
100         int       rfb_wait;
101         int       vga_enabled;
102         int       vga_full;
103
104         uint32_t  fbaddr;
105         char      *fb_base;
106         uint16_t  gc_width;
107         uint16_t  gc_height;
108         void      *vgasc;
109         struct bhyvegc_image *gc_image;
110 };
111
112 static struct pci_fbuf_softc *fbuf_sc;
113
114 #define PCI_FBUF_MSI_MSGS        4
115
116 static void
117 pci_fbuf_usage(char *opt)
118 {
119
120         fprintf(stderr, "Invalid fbuf emulation \"%s\"\r\n", opt);
121         fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\r\n");
122 }
123
124 static void
125 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
126                int baridx, uint64_t offset, int size, uint64_t value)
127 {
128         struct pci_fbuf_softc *sc;
129         uint8_t *p;
130
131         assert(baridx == 0);
132
133         sc = pi->pi_arg;
134
135         DPRINTF(DEBUG_VERBOSE,
136             ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n",
137             offset, size, value));
138
139         if (offset + size > DMEMSZ) {
140                 printf("fbuf: write too large, offset %ld size %d\n",
141                        offset, size);
142                 return;
143         }
144
145         p = (uint8_t *)&sc->memregs + offset;
146
147         switch (size) {
148         case 1:
149                 *p = value;
150                 break;
151         case 2:
152                 *(uint16_t *)p = value;
153                 break;
154         case 4:
155                 *(uint32_t *)p = value;
156                 break;
157         case 8:
158                 *(uint64_t *)p = value;
159                 break;
160         default:
161                 printf("fbuf: write unknown size %d\n", size);
162                 break;
163         }
164
165         if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
166             sc->memregs.height == 0) {
167                 DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n"));
168                 sc->gc_image->vgamode = 1;
169                 sc->gc_width = 0;
170                 sc->gc_height = 0;
171         } else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
172             sc->memregs.height != 0) {
173                 DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n"));
174                 sc->gc_image->vgamode = 0;
175         }
176 }
177
178 uint64_t
179 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
180               int baridx, uint64_t offset, int size)
181 {
182         struct pci_fbuf_softc *sc;
183         uint8_t *p;
184         uint64_t value;
185
186         assert(baridx == 0);
187
188         sc = pi->pi_arg;
189
190
191         if (offset + size > DMEMSZ) {
192                 printf("fbuf: read too large, offset %ld size %d\n",
193                        offset, size);
194                 return (0);
195         }
196
197         p = (uint8_t *)&sc->memregs + offset;
198         value = 0;
199         switch (size) {
200         case 1:
201                 value = *p;
202                 break;
203         case 2:
204                 value = *(uint16_t *)p;
205                 break;
206         case 4:
207                 value = *(uint32_t *)p;
208                 break;
209         case 8:
210                 value = *(uint64_t *)p;
211                 break;
212         default:
213                 printf("fbuf: read unknown size %d\n", size);
214                 break;
215         }
216
217         DPRINTF(DEBUG_VERBOSE,
218             ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n",
219              offset, size, value));
220
221         return (value);
222 }
223
224 static int
225 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
226 {
227         char    *uopts, *xopts, *config;
228         char    *tmpstr;
229         int     ret;
230
231         ret = 0;
232         uopts = strdup(opts);
233         for (xopts = strtok(uopts, ",");
234              xopts != NULL;
235              xopts = strtok(NULL, ",")) {
236                 if (strcmp(xopts, "wait") == 0) {
237                         sc->rfb_wait = 1;
238                         continue;
239                 }
240
241                 if ((config = strchr(xopts, '=')) == NULL) {
242                         pci_fbuf_usage(xopts);
243                         ret = -1;
244                         goto done;
245                 }
246
247                 *config++ = '\0';
248
249                 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n",
250                    xopts, config));
251
252                 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
253                         /* parse host-ip:port */
254                         tmpstr = strsep(&config, ":");
255                         if (!config)
256                                 sc->rfb_port = atoi(tmpstr);
257                         else {
258                                 sc->rfb_port = atoi(config);
259                                 sc->rfb_host = tmpstr;
260                         }
261                 } else if (!strcmp(xopts, "vga")) {
262                         if (!strcmp(config, "off")) {
263                                 sc->vga_enabled = 0;
264                         } else if (!strcmp(config, "io")) {
265                                 sc->vga_enabled = 1;
266                                 sc->vga_full = 0;
267                         } else if (!strcmp(config, "on")) {
268                                 sc->vga_enabled = 1;
269                                 sc->vga_full = 1;
270                         } else {
271                                 pci_fbuf_usage(opts);
272                                 ret = -1;
273                                 goto done;
274                         }
275                 } else if (!strcmp(xopts, "w")) {
276                         sc->memregs.width = atoi(config);
277                         if (sc->memregs.width > COLS_MAX) {
278                                 pci_fbuf_usage(xopts);
279                                 ret = -1;
280                                 goto done;
281                         } else if (sc->memregs.width == 0)
282                                 sc->memregs.width = 1920;
283                 } else if (!strcmp(xopts, "h")) {
284                         sc->memregs.height = atoi(config);
285                         if (sc->memregs.height > ROWS_MAX) {
286                                 pci_fbuf_usage(xopts);
287                                 ret = -1;
288                                 goto done;
289                         } else if (sc->memregs.height == 0)
290                                 sc->memregs.height = 1080;
291                 } else if (!strcmp(xopts, "password")) {
292                         sc->rfb_password = config;
293                 } else {
294                         pci_fbuf_usage(xopts);
295                         ret = -1;
296                         goto done;
297                 }
298         }
299
300 done:
301         return (ret);
302 }
303
304
305 extern void vga_render(struct bhyvegc *gc, void *arg);
306
307 void
308 pci_fbuf_render(struct bhyvegc *gc, void *arg)
309 {
310         struct pci_fbuf_softc *sc;
311
312         sc = arg;
313
314         if (sc->vga_full && sc->gc_image->vgamode) {
315                 /* TODO: mode switching to vga and vesa should use the special
316                  *      EFI-bhyve protocol port.
317                  */
318                 vga_render(gc, sc->vgasc);
319                 return;
320         }
321         if (sc->gc_width != sc->memregs.width ||
322             sc->gc_height != sc->memregs.height) {
323                 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
324                 sc->gc_width = sc->memregs.width;
325                 sc->gc_height = sc->memregs.height;
326         }
327
328         return;
329 }
330
331 static int
332 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
333 {
334         int error, prot;
335         struct pci_fbuf_softc *sc;
336         
337         if (fbuf_sc != NULL) {
338                 fprintf(stderr, "Only one frame buffer device is allowed.\n");
339                 return (-1);
340         }
341
342         sc = calloc(1, sizeof(struct pci_fbuf_softc));
343
344         pi->pi_arg = sc;
345
346         /* initialize config space */
347         pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
348         pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
349         pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
350         pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
351
352         error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
353         assert(error == 0);
354
355         error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
356         assert(error == 0);
357
358         error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
359         assert(error == 0);
360
361         sc->fbaddr = pi->pi_bar[1].addr;
362         sc->memregs.fbsize = FB_SIZE;
363         sc->memregs.width  = COLS_DEFAULT;
364         sc->memregs.height = ROWS_DEFAULT;
365         sc->memregs.depth  = 32;
366
367         sc->vga_enabled = 1;
368         sc->vga_full = 0;
369
370         sc->fsc_pi = pi;
371
372         error = pci_fbuf_parse_opts(sc, opts);
373         if (error != 0)
374                 goto done;
375
376         /* XXX until VGA rendering is enabled */
377         if (sc->vga_full != 0) {
378                 fprintf(stderr, "pci_fbuf: VGA rendering not enabled");
379                 goto done;
380         }
381
382         sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE);
383         if (sc->fb_base == MAP_FAILED) {
384                 error = -1;
385                 goto done;
386         }
387         DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n",
388                 sc->fb_base, FB_SIZE));
389
390         /*
391          * Map the framebuffer into the guest address space.
392          * XXX This may fail if the BAR is different than a prior
393          * run. In this case flag the error. This will be fixed
394          * when a change_memseg api is available.
395          */
396         prot = PROT_READ | PROT_WRITE;
397         if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
398                 fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n");
399                 error = -1;
400                 goto done;
401         }
402
403         console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
404         console_fb_register(pci_fbuf_render, sc);
405
406         if (sc->vga_enabled)
407                 sc->vgasc = vga_init(!sc->vga_full);
408         sc->gc_image = console_get_image();
409
410         fbuf_sc = sc;
411
412         memset((void *)sc->fb_base, 0, FB_SIZE);
413
414         error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password);
415 done:
416         if (error)
417                 free(sc);
418
419         return (error);
420 }
421
422 struct pci_devemu pci_fbuf = {
423         .pe_emu =       "fbuf",
424         .pe_init =      pci_fbuf_init,
425         .pe_barwrite =  pci_fbuf_write,
426         .pe_barread =   pci_fbuf_read
427 };
428 PCI_EMUL_SET(pci_fbuf);