2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2015 Nahanni Systems, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/types.h>
37 #include <machine/vmm.h>
56 * bhyve Framebuffer device emulation.
57 * BAR0 points to the current mode information.
58 * BAR1 is the 32-bit framebuffer address.
60 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height
63 static int fbuf_debug = 1;
65 #define DEBUG_VERBOSE 4
66 #define DPRINTF(level, params) if (level <= fbuf_debug) printf params
70 #define MB (1024 * 1024UL)
74 #define FB_SIZE (16*MB)
79 #define COLS_DEFAULT 1024
80 #define ROWS_DEFAULT 768
85 struct pci_fbuf_softc {
86 struct pci_devinst *fsc_pi;
93 uint8_t reserved[116];
109 struct bhyvegc_image *gc_image;
112 static struct pci_fbuf_softc *fbuf_sc;
114 #define PCI_FBUF_MSI_MSGS 4
117 pci_fbuf_usage(char *opt)
120 fprintf(stderr, "Invalid fbuf emulation \"%s\"\r\n", opt);
121 fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\r\n");
125 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
126 int baridx, uint64_t offset, int size, uint64_t value)
128 struct pci_fbuf_softc *sc;
135 DPRINTF(DEBUG_VERBOSE,
136 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n",
137 offset, size, value));
139 if (offset + size > DMEMSZ) {
140 printf("fbuf: write too large, offset %ld size %d\n",
145 p = (uint8_t *)&sc->memregs + offset;
152 *(uint16_t *)p = value;
155 *(uint32_t *)p = value;
158 *(uint64_t *)p = value;
161 printf("fbuf: write unknown size %d\n", size);
165 if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
166 sc->memregs.height == 0) {
167 DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n"));
168 sc->gc_image->vgamode = 1;
171 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
172 sc->memregs.height != 0) {
173 DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n"));
174 sc->gc_image->vgamode = 0;
179 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
180 int baridx, uint64_t offset, int size)
182 struct pci_fbuf_softc *sc;
191 if (offset + size > DMEMSZ) {
192 printf("fbuf: read too large, offset %ld size %d\n",
197 p = (uint8_t *)&sc->memregs + offset;
204 value = *(uint16_t *)p;
207 value = *(uint32_t *)p;
210 value = *(uint64_t *)p;
213 printf("fbuf: read unknown size %d\n", size);
217 DPRINTF(DEBUG_VERBOSE,
218 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n",
219 offset, size, value));
225 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
227 char *uopts, *xopts, *config;
232 uopts = strdup(opts);
233 for (xopts = strtok(uopts, ",");
235 xopts = strtok(NULL, ",")) {
236 if (strcmp(xopts, "wait") == 0) {
241 if ((config = strchr(xopts, '=')) == NULL) {
242 pci_fbuf_usage(xopts);
249 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n",
252 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
253 /* parse host-ip:port */
254 tmpstr = strsep(&config, ":");
256 sc->rfb_port = atoi(tmpstr);
258 sc->rfb_port = atoi(config);
259 sc->rfb_host = tmpstr;
261 } else if (!strcmp(xopts, "vga")) {
262 if (!strcmp(config, "off")) {
264 } else if (!strcmp(config, "io")) {
267 } else if (!strcmp(config, "on")) {
271 pci_fbuf_usage(opts);
275 } else if (!strcmp(xopts, "w")) {
276 sc->memregs.width = atoi(config);
277 if (sc->memregs.width > COLS_MAX) {
278 pci_fbuf_usage(xopts);
281 } else if (sc->memregs.width == 0)
282 sc->memregs.width = 1920;
283 } else if (!strcmp(xopts, "h")) {
284 sc->memregs.height = atoi(config);
285 if (sc->memregs.height > ROWS_MAX) {
286 pci_fbuf_usage(xopts);
289 } else if (sc->memregs.height == 0)
290 sc->memregs.height = 1080;
291 } else if (!strcmp(xopts, "password")) {
292 sc->rfb_password = config;
294 pci_fbuf_usage(xopts);
305 extern void vga_render(struct bhyvegc *gc, void *arg);
308 pci_fbuf_render(struct bhyvegc *gc, void *arg)
310 struct pci_fbuf_softc *sc;
314 if (sc->vga_full && sc->gc_image->vgamode) {
315 /* TODO: mode switching to vga and vesa should use the special
316 * EFI-bhyve protocol port.
318 vga_render(gc, sc->vgasc);
321 if (sc->gc_width != sc->memregs.width ||
322 sc->gc_height != sc->memregs.height) {
323 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
324 sc->gc_width = sc->memregs.width;
325 sc->gc_height = sc->memregs.height;
332 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
335 struct pci_fbuf_softc *sc;
337 if (fbuf_sc != NULL) {
338 fprintf(stderr, "Only one frame buffer device is allowed.\n");
342 sc = calloc(1, sizeof(struct pci_fbuf_softc));
346 /* initialize config space */
347 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
348 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
349 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
350 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
352 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
355 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
358 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
361 sc->fbaddr = pi->pi_bar[1].addr;
362 sc->memregs.fbsize = FB_SIZE;
363 sc->memregs.width = COLS_DEFAULT;
364 sc->memregs.height = ROWS_DEFAULT;
365 sc->memregs.depth = 32;
372 error = pci_fbuf_parse_opts(sc, opts);
376 /* XXX until VGA rendering is enabled */
377 if (sc->vga_full != 0) {
378 fprintf(stderr, "pci_fbuf: VGA rendering not enabled");
382 sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE);
383 if (sc->fb_base == MAP_FAILED) {
387 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n",
388 sc->fb_base, FB_SIZE));
391 * Map the framebuffer into the guest address space.
392 * XXX This may fail if the BAR is different than a prior
393 * run. In this case flag the error. This will be fixed
394 * when a change_memseg api is available.
396 prot = PROT_READ | PROT_WRITE;
397 if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
398 fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n");
403 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
404 console_fb_register(pci_fbuf_render, sc);
407 sc->vgasc = vga_init(!sc->vga_full);
408 sc->gc_image = console_get_image();
412 memset((void *)sc->fb_base, 0, FB_SIZE);
414 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password);
422 struct pci_devemu pci_fbuf = {
424 .pe_init = pci_fbuf_init,
425 .pe_barwrite = pci_fbuf_write,
426 .pe_barread = pci_fbuf_read
428 PCI_EMUL_SET(pci_fbuf);