2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
5 * Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 #include <sys/types.h>
32 #include <machine/vmm.h>
33 #include <machine/vmm_snapshot.h>
50 #include "pci_passthru.h"
51 #include "pctestdev.h"
52 #include "tpm_device.h"
53 #include "uart_emul.h"
58 SET_DECLARE(lpc_dsdt_set, struct lpc_dsdt);
59 SET_DECLARE(lpc_sysres_set, struct lpc_sysres);
61 #define ELCR_PORT 0x4d0
62 SYSRES_IO(ELCR_PORT, 2);
64 #define IO_TIMER1_PORT 0x40
66 #define NMISC_PORT 0x61
67 SYSRES_IO(NMISC_PORT, 1);
69 static struct pci_devinst *lpc_bridge;
71 #define LPC_UART_NUM 4
72 static struct lpc_uart_softc {
73 struct uart_softc *uart_softc;
77 } lpc_uart_softc[LPC_UART_NUM];
79 static const char *lpc_uart_names[LPC_UART_NUM] = {
80 "com1", "com2", "com3", "com4"
83 static const char *lpc_uart_acpi_names[LPC_UART_NUM] = {
84 "COM1", "COM2", "COM3", "COM4"
88 * LPC device configuration is in the following form:
89 * <lpc_device_name>[,<options>]
90 * For e.g. "com1,stdio" or "bootrom,/var/romfile"
93 lpc_device_parse(const char *opts)
96 char *str, *cpy, *lpcdev, *node_name;
97 const char *romfile, *varfile, *tpm_type, *tpm_path;
100 str = cpy = strdup(opts);
101 lpcdev = strsep(&str, ",");
102 if (lpcdev != NULL) {
103 if (strcasecmp(lpcdev, "bootrom") == 0) {
104 romfile = strsep(&str, ",");
105 if (romfile == NULL) {
106 errx(4, "invalid bootrom option \"%s\"", opts);
108 set_config_value("lpc.bootrom", romfile);
110 varfile = strsep(&str, ",");
111 if (varfile == NULL) {
115 if (strchr(varfile, '=') == NULL) {
116 set_config_value("lpc.bootvars", varfile);
118 /* varfile doesn't exist, it's another config
120 pci_parse_legacy_config(find_config_node("lpc"),
124 pci_parse_legacy_config(find_config_node("lpc"), str);
128 if (strcasecmp(lpcdev, "tpm") == 0) {
129 nvlist_t *nvl = create_config_node("tpm");
131 tpm_type = strsep(&str, ",");
132 if (tpm_type == NULL) {
133 errx(4, "invalid tpm type \"%s\"", opts);
135 set_config_value_node(nvl, "type", tpm_type);
137 tpm_path = strsep(&str, ",");
138 if (tpm_path == NULL) {
139 errx(4, "invalid tpm path \"%s\"", opts);
141 set_config_value_node(nvl, "path", tpm_path);
143 pci_parse_legacy_config(find_config_node("tpm"), str);
145 set_config_value_node_if_unset(nvl, "version", "2.0");
149 for (unit = 0; unit < LPC_UART_NUM; unit++) {
150 if (strcasecmp(lpcdev, lpc_uart_names[unit]) == 0) {
151 asprintf(&node_name, "lpc.%s.path",
152 lpc_uart_names[unit]);
153 set_config_value(node_name, str);
159 if (strcasecmp(lpcdev, pctestdev_getname()) == 0) {
160 asprintf(&node_name, "lpc.%s", pctestdev_getname());
161 set_config_bool(node_name, true);
175 lpc_print_supported_devices(void)
180 for (i = 0; i < LPC_UART_NUM; i++)
181 printf("%s\n", lpc_uart_names[i]);
183 printf("%s\n", pctestdev_getname());
190 return (get_config_value("lpc.bootrom"));
196 return (get_config_value("lpc.fwcfg"));
200 lpc_uart_intr_assert(void *arg)
202 struct lpc_uart_softc *sc = arg;
204 assert(sc->irq >= 0);
206 vm_isa_pulse_irq(lpc_bridge->pi_vmctx, sc->irq, sc->irq);
210 lpc_uart_intr_deassert(void *arg __unused)
213 * The COM devices on the LPC bus generate edge triggered interrupts,
214 * so nothing more to do here.
219 lpc_uart_io_handler(struct vmctx *ctx __unused, int in,
220 int port, int bytes, uint32_t *eax, void *arg)
223 struct lpc_uart_softc *sc = arg;
225 offset = port - sc->iobase;
230 *eax = uart_read(sc->uart_softc, offset);
232 uart_write(sc->uart_softc, offset, *eax);
236 *eax = uart_read(sc->uart_softc, offset);
237 *eax |= uart_read(sc->uart_softc, offset + 1) << 8;
239 uart_write(sc->uart_softc, offset, *eax);
240 uart_write(sc->uart_softc, offset + 1, *eax >> 8);
251 lpc_init(struct vmctx *ctx)
253 struct lpc_uart_softc *sc;
254 struct inout_port iop;
255 const char *backend, *name;
260 nvl = find_config_node("lpc");
261 if (nvl != NULL && nvlist_exists(nvl, "bootrom")) {
262 error = bootrom_loadrom(ctx, nvl);
268 for (unit = 0; unit < LPC_UART_NUM; unit++) {
269 sc = &lpc_uart_softc[unit];
270 name = lpc_uart_names[unit];
272 if (uart_legacy_alloc(unit, &sc->iobase, &sc->irq) != 0) {
273 EPRINTLN("Unable to allocate resources for "
274 "LPC device %s", name);
277 pci_irq_reserve(sc->irq);
279 sc->uart_softc = uart_init(lpc_uart_intr_assert,
280 lpc_uart_intr_deassert, sc);
282 asprintf(&node_name, "lpc.%s.path", name);
283 backend = get_config_value(node_name);
285 if (uart_set_backend(sc->uart_softc, backend) != 0) {
286 EPRINTLN("Unable to initialize backend '%s' "
287 "for LPC device %s", backend, name);
291 bzero(&iop, sizeof(struct inout_port));
293 iop.port = sc->iobase;
294 iop.size = UART_IO_BAR_SIZE;
295 iop.flags = IOPORT_F_INOUT;
296 iop.handler = lpc_uart_io_handler;
299 error = register_inout(&iop);
305 asprintf(&node_name, "lpc.%s", pctestdev_getname());
306 if (get_config_bool_default(node_name, false)) {
307 error = pctestdev_init(ctx);
317 pci_lpc_write_dsdt(struct pci_devinst *pi)
319 struct lpc_dsdt **ldpp, *ldp;
322 dsdt_line("Device (ISA)");
324 dsdt_line(" Name (_ADR, 0x%04X%04X)", pi->pi_slot, pi->pi_func);
325 dsdt_line(" OperationRegion (LPCR, PCI_Config, 0x00, 0x100)");
326 dsdt_line(" Field (LPCR, AnyAcc, NoLock, Preserve)");
328 dsdt_line(" Offset (0x60),");
329 dsdt_line(" PIRA, 8,");
330 dsdt_line(" PIRB, 8,");
331 dsdt_line(" PIRC, 8,");
332 dsdt_line(" PIRD, 8,");
333 dsdt_line(" Offset (0x68),");
334 dsdt_line(" PIRE, 8,");
335 dsdt_line(" PIRF, 8,");
336 dsdt_line(" PIRG, 8,");
337 dsdt_line(" PIRH, 8");
342 SET_FOREACH(ldpp, lpc_dsdt_set) {
348 dsdt_line("Device (PIC)");
350 dsdt_line(" Name (_HID, EisaId (\"PNP0000\"))");
351 dsdt_line(" Name (_CRS, ResourceTemplate ()");
354 dsdt_fixed_ioport(IO_ICU1, 2);
355 dsdt_fixed_ioport(IO_ICU2, 2);
362 dsdt_line("Device (TIMR)");
364 dsdt_line(" Name (_HID, EisaId (\"PNP0100\"))");
365 dsdt_line(" Name (_CRS, ResourceTemplate ()");
368 dsdt_fixed_ioport(IO_TIMER1_PORT, 4);
379 pci_lpc_sysres_dsdt(void)
381 struct lpc_sysres **lspp, *lsp;
384 dsdt_line("Device (SIO)");
386 dsdt_line(" Name (_HID, EisaId (\"PNP0C02\"))");
387 dsdt_line(" Name (_CRS, ResourceTemplate ()");
391 SET_FOREACH(lspp, lpc_sysres_set) {
395 dsdt_fixed_ioport(lsp->base, lsp->length);
398 dsdt_fixed_mem32(lsp->base, lsp->length);
407 LPC_DSDT(pci_lpc_sysres_dsdt);
410 pci_lpc_uart_dsdt(void)
412 struct lpc_uart_softc *sc;
415 for (unit = 0; unit < LPC_UART_NUM; unit++) {
416 sc = &lpc_uart_softc[unit];
420 dsdt_line("Device (%s)", lpc_uart_acpi_names[unit]);
422 dsdt_line(" Name (_HID, EisaId (\"PNP0501\"))");
423 dsdt_line(" Name (_UID, %d)", unit + 1);
424 dsdt_line(" Name (_CRS, ResourceTemplate ()");
427 dsdt_fixed_ioport(sc->iobase, UART_IO_BAR_SIZE);
428 dsdt_fixed_irq(sc->irq);
434 LPC_DSDT(pci_lpc_uart_dsdt);
437 pci_lpc_cfgwrite(struct pci_devinst *pi, int coff, int bytes, uint32_t val)
443 if (coff >= 0x60 && coff <= 0x63)
444 pirq_pin = coff - 0x60 + 1;
445 if (coff >= 0x68 && coff <= 0x6b)
446 pirq_pin = coff - 0x68 + 5;
448 pirq_write(pi->pi_vmctx, pirq_pin, val);
449 pci_set_cfgdata8(pi, coff, pirq_read(pirq_pin));
457 pci_lpc_write(struct pci_devinst *pi __unused, int baridx __unused,
458 uint64_t offset __unused, int size __unused, uint64_t value __unused)
463 pci_lpc_read(struct pci_devinst *pi __unused, int baridx __unused,
464 uint64_t offset __unused, int size __unused)
469 #define LPC_DEV 0x7000
470 #define LPC_VENDOR 0x8086
471 #define LPC_REVID 0x00
472 #define LPC_SUBVEND_0 0x0000
473 #define LPC_SUBDEV_0 0x0000
476 pci_lpc_get_sel(struct pcisel *const sel)
480 memset(sel, 0, sizeof(*sel));
482 for (uint8_t slot = 0; slot <= PCI_SLOTMAX; ++slot) {
483 uint8_t max_func = 0;
488 if (read_config(sel, PCIR_HDRTYPE, 1) & PCIM_MFDEV)
489 max_func = PCI_FUNCMAX;
491 for (uint8_t func = 0; func <= max_func; ++func) {
494 if ((read_config(sel, PCIR_CLASS, 1) == PCIC_BRIDGE) &&
495 (read_config(sel, PCIR_SUBCLASS, 1) ==
502 warnx("%s: Unable to find host selector of LPC bridge.", __func__);
508 pci_lpc_init(struct pci_devinst *pi, nvlist_t *nvl)
510 struct pcisel sel = { 0 };
511 struct pcisel *selp = NULL;
512 uint16_t device, subdevice, subvendor, vendor;
516 * Do not allow more than one LPC bridge to be configured.
518 if (lpc_bridge != NULL) {
519 EPRINTLN("Only one LPC bridge is allowed.");
524 * Enforce that the LPC can only be configured on bus 0. This
525 * simplifies the ACPI DSDT because it can provide a decode for
526 * all legacy i/o ports behind bus 0.
528 if (pi->pi_bus != 0) {
529 EPRINTLN("LPC bridge can be present only on bus 0.");
533 if (lpc_init(pi->pi_vmctx) != 0)
536 if (pci_lpc_get_sel(&sel) == 0)
539 vendor = pci_config_read_reg(selp, nvl, PCIR_VENDOR, 2, LPC_VENDOR);
540 device = pci_config_read_reg(selp, nvl, PCIR_DEVICE, 2, LPC_DEV);
541 revid = pci_config_read_reg(selp, nvl, PCIR_REVID, 1, LPC_REVID);
542 subvendor = pci_config_read_reg(selp, nvl, PCIR_SUBVEND_0, 2,
544 subdevice = pci_config_read_reg(selp, nvl, PCIR_SUBDEV_0, 2,
547 /* initialize config space */
548 pci_set_cfgdata16(pi, PCIR_VENDOR, vendor);
549 pci_set_cfgdata16(pi, PCIR_DEVICE, device);
550 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE);
551 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_ISA);
552 pci_set_cfgdata8(pi, PCIR_REVID, revid);
553 pci_set_cfgdata16(pi, PCIR_SUBVEND_0, subvendor);
554 pci_set_cfgdata16(pi, PCIR_SUBDEV_0, subdevice);
562 lpc_pirq_name(int pin)
566 if (lpc_bridge == NULL)
568 asprintf(&name, "\\_SB.PC00.ISA.LNK%c,", 'A' + pin - 1);
573 lpc_pirq_routed(void)
577 if (lpc_bridge == NULL)
580 for (pin = 0; pin < 4; pin++)
581 pci_set_cfgdata8(lpc_bridge, 0x60 + pin, pirq_read(pin + 1));
582 for (pin = 0; pin < 4; pin++)
583 pci_set_cfgdata8(lpc_bridge, 0x68 + pin, pirq_read(pin + 5));
586 #ifdef BHYVE_SNAPSHOT
588 pci_lpc_snapshot(struct vm_snapshot_meta *meta)
591 struct uart_softc *sc;
593 for (unit = 0; unit < LPC_UART_NUM; unit++) {
594 sc = lpc_uart_softc[unit].uart_softc;
596 ret = uart_snapshot(sc, meta);
606 static const struct pci_devemu pci_de_lpc = {
608 .pe_init = pci_lpc_init,
609 .pe_write_dsdt = pci_lpc_write_dsdt,
610 .pe_cfgwrite = pci_lpc_cfgwrite,
611 .pe_barwrite = pci_lpc_write,
612 .pe_barread = pci_lpc_read,
613 #ifdef BHYVE_SNAPSHOT
614 .pe_snapshot = pci_lpc_snapshot,
617 PCI_EMUL_SET(pci_de_lpc);