2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011 NetApp, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/types.h>
36 #include <machine/cpufunc.h>
37 #include <machine/vmm.h>
38 #include <machine/specialreg.h>
48 static int cpu_vendor_intel, cpu_vendor_amd;
51 emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val)
54 if (cpu_vendor_intel) {
56 case 0xd04: /* Sandy Bridge uncore PMCs */
59 case MSR_BIOS_UPDT_TRIG:
66 } else if (cpu_vendor_amd) {
70 * Ignore writes to hardware configuration MSR.
76 return (0); /* Ignore writes */
82 /* Ignore writes to the PerfEvtSel MSRs */
89 /* Ignore writes to the PerfCtr MSRs */
92 case MSR_P_STATE_CONTROL:
93 /* Ignore write to change the P-state */
104 emulate_rdmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t *val)
108 if (cpu_vendor_intel) {
111 case MSR_IA32_PLATFORM_ID:
112 case MSR_PKG_ENERGY_STATUS:
113 case MSR_PP0_ENERGY_STATUS:
114 case MSR_PP1_ENERGY_STATUS:
115 case MSR_DRAM_ENERGY_STATUS:
118 case MSR_RAPL_POWER_UNIT:
120 * Use the default value documented in section
121 * "RAPL Interfaces" in Intel SDM vol3.
129 } else if (cpu_vendor_amd) {
136 * Bios and Kernel Developer's Guides for AMD Families
137 * 12H, 14H, 15H and 16H.
139 *val = 0x01000010; /* Reset value */
140 *val |= 1 << 9; /* MONITOR/MWAIT disable */
146 * The reset value is processor family dependent so
157 * PerfEvtSel MSRs are not properly virtualized so just
163 case MSR_K7_PERFCTR0:
164 case MSR_K7_PERFCTR1:
165 case MSR_K7_PERFCTR2:
166 case MSR_K7_PERFCTR3:
168 * PerfCtr MSRs are not properly virtualized so just
177 * Return the reset value defined in the AMD Bios and
178 * Kernel Developer's Guide.
183 case MSR_P_STATE_LIMIT:
184 case MSR_P_STATE_CONTROL:
185 case MSR_P_STATE_STATUS:
186 case MSR_P_STATE_CONFIG(0): /* P0 configuration */
191 * OpenBSD guests test bit 0 of this MSR to detect if the
192 * workaround for erratum 721 is already applied.
193 * https://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf
217 ((u_int *)&cpu_vendor)[0] = regs[1];
218 ((u_int *)&cpu_vendor)[1] = regs[3];
219 ((u_int *)&cpu_vendor)[2] = regs[2];
220 cpu_vendor[12] = '\0';
223 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
225 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
226 cpu_vendor_intel = 1;
228 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor);