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30 .Nd control utility for the
43 .Fl m Ar msr Ns = Ns Ar value
49 .Fl m Ar msr Ns &= Ns Ar mask
55 .Fl m Ar msr Ns |= Ns Ar mask
67 .Fl i Ar level,level_type
85 utility can be used to read and write arbitrary machine-specific
89 It can also be used to apply CPU firmware updates.
91 The following options are available:
92 .Bl -tag -width indent
94 Directory paths where to look for microcode images.
95 The option can be specified multiple times.
96 The paths are added in order of the options appearance on the command
97 line, default directories are appended after the user-supplied paths.
99 Do not look for the microcode images in the standard directories.
100 Currently standard directory to look for the microcode update files is
101 .Pa /usr/local/share/cpucontrol .
103 Show value of the specified MSR.
104 MSR register number should be given as a hexadecimal number.
105 The high word is printed first, then the low word is printed second.
106 .It Fl m Ar msr Ns = Ns Ar value
109 in the specified MSR register.
112 argument can be prefixed with ~ operator.
113 In this case the inverted value of argument will be stored in the register.
114 .It Fl m Ar msr Ns &= Ns Ar mask
115 Store the result of bitwise AND operation between
117 and the current MSR value in the MSR register.
120 argument can be prefixed with ~ operator.
121 In this case the inverted value of mask will be used.
122 .It Fl m Ar msr Ns |= Ns Ar mask
123 Store the result of bitwise OR operation between
125 and the current MSR value in the MSR register.
128 argument can be prefixed with ~ operator.
129 In this case the inverted value of mask will be used.
132 Level should be given as a hex number.
133 .It Fl i Ar level,level_type
135 Level and level_type should be given as hex numbers.
137 Apply CPU firmware updates.
140 utility will walk through the configured data directories
141 and apply all firmware updates available for this CPU.
143 Re-evaluate the kernel flags indicating the present CPU features.
144 This command is typically executed after a firmware update was applied
145 which changes information reported by the
152 command after the microcode update was applied to all CPUs in the system.
153 The kernel does not operate correctly if the features of processors are
157 Increase the verbosity level.
166 .Dq Li "cpucontrol -m 0x10 /dev/cpuctl0"
168 will read the contents of TSC MSR from CPU 0.
170 To set the CPU 0 TSC MSR register value to 0x1 issue
172 .Dq Li "cpucontrol -m 0x10=0x1 /dev/cpuctl0" .
174 The following command will clear the second bit of TSC register:
176 .Dq Li "cpucontrol -m 0x10&=~0x02 /dev/cpuctl0" .
178 The following command will set the forth and second bit of TSC register:
180 .Dq Li "cpucontrol -m 0x10|=0x0a /dev/cpuctl0" .
184 .Dq Li "cpucontrol -i 0x1 /dev/cpuctl1"
186 will retrieve the CPUID level 0x1 from CPU 1.
188 To perform firmware updates on CPU 0 from images located at
189 .Pa /usr/local/share/cpuctl
190 use the following command:
192 .Dq Li "cpucontrol -nd /usr/local/share/cpuctl -u /dev/cpuctl0"
198 utility first appeared in
203 utility and this manual page was written by
204 .An Stanislav Sedov Aq Mt stas@FreeBSD.org .