2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/ioctl.h>
34 #include <sys/socket.h>
37 #include <arpa/inet.h>
38 #include <net/ethernet.h>
39 #include <net/sff8472.h>
40 #include <netinet/in.h>
56 #include "tcb_common.h"
58 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
59 #define max(x, y) ((x) > (y) ? (x) : (y))
61 static const char *progname, *nexus;
62 static int chip_id; /* 4 for T4, 5 for T5 */
72 const struct reg_info *ri;
76 const char *name; /* Field name */
77 unsigned short start; /* Start bit position */
78 unsigned short end; /* End bit position */
79 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
80 unsigned char hex; /* Print field in hex instead of decimal */
81 unsigned char islog2; /* Field contains the base-2 log of the value */
84 #include "reg_defs_t4.c"
85 #include "reg_defs_t5.c"
86 #include "reg_defs_t6.c"
87 #include "reg_defs_t4vf.c"
92 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
94 "\tclearstats <port> clear port statistics\n"
95 "\tcontext <type> <id> show an SGE context\n"
96 "\tdumpstate <dump.bin> dump chip state\n"
97 "\tfilter <idx> [<param> <val>] ... set a filter\n"
98 "\tfilter <idx> delete|clear delete a filter\n"
99 "\tfilter list list all filters\n"
100 "\tfilter mode [<match>] ... get/set global filter mode\n"
101 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
102 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n"
103 "\tloadboot clear [pf|offset <val>] remove boot image\n"
104 "\tloadboot-cfg <bc.bin> install boot config\n"
105 "\tloadboot-cfg clear remove boot config\n"
106 "\tloadcfg <fw-config.txt> install configuration file\n"
107 "\tloadcfg clear remove configuration file\n"
108 "\tloadfw <fw-image.bin> install firmware\n"
109 "\tmemdump <addr> <len> dump a memory range\n"
110 "\tmodinfo <port> [raw] optics/cable information\n"
111 "\tpolicy <policy.txt> install offload policy\n"
112 "\tpolicy clear remove offload policy\n"
113 "\treg <address>[=<val>] read/write register\n"
114 "\treg64 <address>[=<val>] read/write 64 bit register\n"
115 "\tregdump [<module>] ... dump registers\n"
116 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
117 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
118 "\tstdio interactive mode\n"
119 "\ttcb <tid> read TCB\n"
120 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
121 "\ttracer <idx> disable|enable disable or enable a tracer\n"
122 "\ttracer list list all tracers\n"
126 static inline unsigned int
127 get_card_vers(unsigned int version)
129 return (version & 0x3ff);
133 real_doit(unsigned long cmd, void *data, const char *cmdstr)
141 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
142 if ((fd = open(buf, O_RDWR)) < 0) {
143 warn("open(%s)", nexus);
147 chip_id = nexus[1] - '0';
150 rc = ioctl(fd, cmd, data);
158 #define doit(x, y) real_doit(x, y, #x)
161 str_to_number(const char *s, long *val, long long *vall)
166 *vall = strtoll(s, &p, 0);
168 *val = strtol(s, &p, 0);
176 read_reg(long addr, int size, long long *val)
181 reg.addr = (uint32_t) addr;
182 reg.size = (uint32_t) size;
185 rc = doit(CHELSIO_T4_GETREG, ®);
193 write_reg(long addr, int size, long long val)
197 reg.addr = (uint32_t) addr;
198 reg.size = (uint32_t) size;
199 reg.val = (uint64_t) val;
201 return doit(CHELSIO_T4_SETREG, ®);
205 register_io(int argc, const char *argv[], int size)
213 /* <reg> OR <reg>=<value> */
215 p = str_to_number(argv[0], &addr, NULL);
218 warnx("invalid register \"%s\"", argv[0]);
224 p = str_to_number(v, NULL, &val);
227 warnx("invalid value \"%s\"", v);
232 } else if (argc == 2) {
237 p = str_to_number(argv[0], &addr, NULL);
239 warnx("invalid register \"%s\"", argv[0]);
243 p = str_to_number(argv[1], NULL, &val);
245 warnx("invalid value \"%s\"", argv[1]);
249 warnx("reg: invalid number of arguments (%d)", argc);
254 rc = write_reg(addr, size, val);
256 rc = read_reg(addr, size, &val);
258 printf("0x%llx [%llu]\n", val, val);
264 static inline uint32_t
265 xtract(uint32_t val, int shift, int len)
267 return (val >> shift) & ((1 << len) - 1);
271 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
273 uint32_t reg_val = 0;
275 for ( ; reg_array->name; ++reg_array)
276 if (!reg_array->len) {
277 reg_val = regs[reg_array->addr / 4];
278 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
279 reg_array->name, reg_val, reg_val);
281 uint32_t v = xtract(reg_val, reg_array->addr,
284 printf(" %*u:%u %-47s %#-10x %u\n",
285 reg_array->addr < 10 ? 3 : 2,
286 reg_array->addr + reg_array->len - 1,
287 reg_array->addr, reg_array->name, v, v);
294 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
295 const struct mod_regs *modtab, int nmodules)
299 for (i = 0; i < argc; i++) {
300 for (j = 0; j < nmodules; j++) {
301 if (!strcmp(argv[i], modtab[j].name))
306 warnx("invalid register block \"%s\"", argv[i]);
307 fprintf(stderr, "\nAvailable blocks:");
308 for ( ; nmodules; nmodules--, modtab++)
309 fprintf(stderr, " %s", modtab->name);
310 fprintf(stderr, "\n");
315 for ( ; nmodules; nmodules--, modtab++) {
317 match = argc == 0 ? 1 : 0;
318 for (i = 0; !match && i < argc; i++) {
319 if (!strcmp(argv[i], modtab->name))
324 dump_block_regs(modtab->ri, regs);
330 #define T4_MODREGS(name) { #name, t4_##name##_regs }
332 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
334 static struct mod_regs t4_mod[] = {
336 { "pci", t4_pcie_regs },
340 { "edc0", t4_edc_0_regs },
341 { "edc1", t4_edc_1_regs },
346 { "pmrx", t4_pm_rx_regs },
347 { "pmtx", t4_pm_tx_regs },
349 { "cplsw", t4_cpl_switch_regs },
351 { "i2c", t4_i2cm_regs },
362 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
366 #define T5_MODREGS(name) { #name, t5_##name##_regs }
368 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
370 static struct mod_regs t5_mod[] = {
372 { "pci", t5_pcie_regs },
374 { "mc0", t5_mc_0_regs },
375 { "mc1", t5_mc_1_regs },
377 { "edc0", t5_edc_t50_regs },
378 { "edc1", t5_edc_t51_regs },
381 { "ulprx", t5_ulp_rx_regs },
382 { "ulptx", t5_ulp_tx_regs },
383 { "pmrx", t5_pm_rx_regs },
384 { "pmtx", t5_pm_tx_regs },
386 { "cplsw", t5_cpl_switch_regs },
388 { "i2c", t5_i2cm_regs },
397 { "hma", t5_hma_t5_regs }
400 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
404 #define T6_MODREGS(name) { #name, t6_##name##_regs }
406 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
408 static struct mod_regs t6_mod[] = {
410 { "pci", t6_pcie_regs },
412 { "mc0", t6_mc_0_regs },
414 { "edc0", t6_edc_t60_regs },
415 { "edc1", t6_edc_t61_regs },
418 { "ulprx", t6_ulp_rx_regs },
419 { "ulptx", t6_ulp_tx_regs },
420 { "pmrx", t6_pm_rx_regs },
421 { "pmtx", t6_pm_tx_regs },
423 { "cplsw", t6_cpl_switch_regs },
425 { "i2c", t6_i2cm_regs },
434 { "hma", t6_hma_t6_regs }
437 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
442 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
444 static struct mod_regs t4vf_mod[] = {
445 { "sge", t4vf_sge_regs },
446 { "mps", t4vf_mps_regs },
447 { "pl", t4vf_pl_regs },
448 { "mbdata", t4vf_mbdata_regs },
449 { "cim", t4vf_cim_regs },
452 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
456 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
458 static struct mod_regs t5vf_mod[] = {
459 { "sge", t5vf_sge_regs },
460 { "mps", t4vf_mps_regs },
461 { "pl", t5vf_pl_regs },
462 { "mbdata", t4vf_mbdata_regs },
463 { "cim", t4vf_cim_regs },
466 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
470 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
472 static struct mod_regs t6vf_mod[] = {
473 { "sge", t5vf_sge_regs },
474 { "mps", t4vf_mps_regs },
475 { "pl", t6vf_pl_regs },
476 { "mbdata", t4vf_mbdata_regs },
477 { "cim", t4vf_cim_regs },
480 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
484 dump_regs(int argc, const char *argv[])
486 int vers, revision, rc;
487 struct t4_regdump regs;
490 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
491 regs.data = calloc(1, len);
492 if (regs.data == NULL) {
493 warnc(ENOMEM, "regdump");
498 rc = doit(CHELSIO_T4_REGDUMP, ®s);
502 vers = get_card_vers(regs.version);
503 revision = (regs.version >> 10) & 0x3f;
506 if (revision == 0x3f)
507 rc = dump_regs_t4vf(argc, argv, regs.data);
509 rc = dump_regs_t4(argc, argv, regs.data);
510 } else if (vers == 5) {
511 if (revision == 0x3f)
512 rc = dump_regs_t5vf(argc, argv, regs.data);
514 rc = dump_regs_t5(argc, argv, regs.data);
515 } else if (vers == 6) {
516 if (revision == 0x3f)
517 rc = dump_regs_t6vf(argc, argv, regs.data);
519 rc = dump_regs_t6(argc, argv, regs.data);
521 warnx("%s (type %d, rev %d) is not a known card.",
522 nexus, vers, revision);
531 do_show_info_header(uint32_t mode)
535 printf("%4s %8s", "Idx", "Hits");
536 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
547 if (mode & T4_FILTER_IC_VNIC)
548 printf(" VFvld:PF:VF");
550 printf(" vld:oVLAN");
557 case T4_FILTER_IP_TOS:
561 case T4_FILTER_IP_PROTO:
565 case T4_FILTER_ETH_TYPE:
569 case T4_FILTER_MAC_IDX:
573 case T4_FILTER_MPS_HIT_TYPE:
577 case T4_FILTER_IP_FRAGMENT:
582 /* compressed filter field not enabled */
586 printf(" %20s %20s %9s %9s %s\n",
587 "DIP", "SIP", "DPORT", "SPORT", "Action");
591 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
592 * ordered tuple. If the parameter name in the argument sub-vector does not
593 * match the passed in parameter name, then a zero is returned for the
594 * function and no parsing is performed. If there is a match, then the value
595 * and optional mask are parsed and returned in the provided return value
596 * pointers. If no optional mask is specified, then a default mask of all 1s
599 * An error in parsing the value[:mask] will result in an error message and
600 * program termination.
603 parse_val_mask(const char *param, const char *args[], uint32_t *val,
608 if (strcmp(param, args[0]) != 0)
611 *val = strtoul(args[1], &p, 0);
618 if (p[0] == ':' && p[1] != 0) {
619 *mask = strtoul(p+1, &p, 0);
625 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
632 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
633 * ordered tuple. If the parameter name in the argument sub-vector does not
634 * match the passed in parameter name, then a zero is returned for the
635 * function and no parsing is performed. If there is a match, then the value
636 * and optional mask are parsed and returned in the provided return value
637 * pointers. If no optional mask is specified, then a default mask of all 1s
640 * The value return parameter "afp" is used to specify the expected address
641 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
642 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
643 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
644 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
645 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
646 * returned in the first four bytes of the address and mask return values with
647 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
648 * 1, 2, 3}, respectively.
650 * An error in parsing the value[:mask] will result in an error message and
651 * program termination.
654 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
657 const char *colon, *afn;
661 unsigned int masksize;
664 * Is this our parameter?
666 if (strcmp(param, args[0]) != 0)
670 * Fundamental IPv4 versus IPv6 selection.
672 colon = strchr(args[1], ':');
682 if (*afp == AF_UNSPEC)
684 else if (*afp != af) {
685 warnx("address %s is not of expected family %s",
686 args[1], *afp == AF_INET ? "IP" : "IPv6");
691 * Parse address (temporarily stripping off any "/mask"
694 slash = strchr(args[1], '/');
697 ret = inet_pton(af, args[1], addr);
701 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
706 * Parse optional mask specification.
710 unsigned int prefix = strtoul(slash + 1, &p, 10);
712 if (p == slash + 1) {
713 warnx("missing address prefix for %s", param);
717 warnx("%s is not a valid address prefix", slash + 1);
720 if (prefix > masksize) {
721 warnx("prefix %u is too long for an %s address",
725 memset(mask, 0, masksize / 8);
732 for (m = mask; masksize >= 8; m++, masksize -= 8)
735 *m = ~0 << (8 - masksize);
741 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
742 * tuple. If the parameter name in the argument sub-vector does not match the
743 * passed in parameter name, then a zero is returned for the function and no
744 * parsing is performed. If there is a match, then the value is parsed and
745 * returned in the provided return value pointer.
748 parse_val(const char *param, const char *args[], uint32_t *val)
752 if (strcmp(param, args[0]) != 0)
755 *val = strtoul(args[1], &p, 0);
756 if (p > args[1] && p[0] == 0)
759 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
764 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
775 for (octet = 0; octet < noctets; octet++)
776 printf("%02x", addr[octet]);
778 for (octet = 0; octet < noctets; octet++)
779 printf("%02x", addrm[octet]);
783 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
787 printf("%4d", t->idx);
788 if (t->hits == UINT64_MAX)
791 printf(" %8ju", t->hits);
794 * Compressed header portion of filter.
796 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
799 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
803 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
807 if (mode & T4_FILTER_IC_VNIC) {
808 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
810 (t->fs.val.vnic >> 13) & 0x7,
811 t->fs.val.vnic & 0x1fff,
813 (t->fs.mask.vnic >> 13) & 0x7,
814 t->fs.mask.vnic & 0x1fff);
816 printf(" %1d:%04x/%1d:%04x",
817 t->fs.val.ovlan_vld, t->fs.val.vnic,
818 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
823 printf(" %1d:%04x/%1d:%04x",
824 t->fs.val.vlan_vld, t->fs.val.vlan,
825 t->fs.mask.vlan_vld, t->fs.mask.vlan);
828 case T4_FILTER_IP_TOS:
829 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
832 case T4_FILTER_IP_PROTO:
833 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
836 case T4_FILTER_ETH_TYPE:
837 printf(" %04x/%04x", t->fs.val.ethtype,
841 case T4_FILTER_MAC_IDX:
842 printf(" %03x/%03x", t->fs.val.macidx,
846 case T4_FILTER_MPS_HIT_TYPE:
847 printf(" %1x/%1x", t->fs.val.matchtype,
848 t->fs.mask.matchtype);
851 case T4_FILTER_IP_FRAGMENT:
852 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
856 /* compressed filter field not enabled */
862 * Fixed portion of filter.
864 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
865 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
866 printf(" %04x/%04x %04x/%04x",
867 t->fs.val.dport, t->fs.mask.dport,
868 t->fs.val.sport, t->fs.mask.sport);
871 * Variable length filter action.
873 if (t->fs.action == FILTER_DROP)
875 else if (t->fs.action == FILTER_SWITCH) {
876 printf(" Switch: port=%d", t->fs.eport);
879 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
881 t->fs.dmac[0], t->fs.dmac[1],
882 t->fs.dmac[2], t->fs.dmac[3],
883 t->fs.dmac[4], t->fs.dmac[5],
887 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
889 t->fs.smac[0], t->fs.smac[1],
890 t->fs.smac[2], t->fs.smac[3],
891 t->fs.smac[4], t->fs.smac[5],
893 if (t->fs.newvlan == VLAN_REMOVE)
894 printf(", vlan=none");
895 else if (t->fs.newvlan == VLAN_INSERT)
896 printf(", vlan=insert(%x)", t->fs.vlan);
897 else if (t->fs.newvlan == VLAN_REWRITE)
898 printf(", vlan=rewrite(%x)", t->fs.vlan);
901 if (t->fs.dirsteer == 0) {
904 printf("(TCB=hash)");
906 printf("%d", t->fs.iq);
907 if (t->fs.dirsteerhash == 0)
923 uint32_t mode = 0, header = 0;
927 /* Get the global filter mode first */
928 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
933 for (t.idx = 0; ; t.idx++) {
934 rc = doit(CHELSIO_T4_GET_FILTER, &t);
935 if (rc != 0 || t.idx == 0xffffffff)
939 do_show_info_header(mode);
942 do_show_one_filter_info(&t, mode);
949 get_filter_mode(void)
954 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
958 if (mode & T4_FILTER_IPv4)
961 if (mode & T4_FILTER_IPv6)
964 if (mode & T4_FILTER_IP_SADDR)
967 if (mode & T4_FILTER_IP_DADDR)
970 if (mode & T4_FILTER_IP_SPORT)
973 if (mode & T4_FILTER_IP_DPORT)
976 if (mode & T4_FILTER_IP_FRAGMENT)
979 if (mode & T4_FILTER_MPS_HIT_TYPE)
980 printf("matchtype ");
982 if (mode & T4_FILTER_MAC_IDX)
985 if (mode & T4_FILTER_ETH_TYPE)
988 if (mode & T4_FILTER_IP_PROTO)
991 if (mode & T4_FILTER_IP_TOS)
994 if (mode & T4_FILTER_VLAN)
997 if (mode & T4_FILTER_VNIC) {
998 if (mode & T4_FILTER_IC_VNIC)
1004 if (mode & T4_FILTER_PORT)
1007 if (mode & T4_FILTER_FCoE)
1016 set_filter_mode(int argc, const char *argv[])
1019 int vnic = 0, ovlan = 0;
1021 for (; argc; argc--, argv++) {
1022 if (!strcmp(argv[0], "frag"))
1023 mode |= T4_FILTER_IP_FRAGMENT;
1025 if (!strcmp(argv[0], "matchtype"))
1026 mode |= T4_FILTER_MPS_HIT_TYPE;
1028 if (!strcmp(argv[0], "macidx"))
1029 mode |= T4_FILTER_MAC_IDX;
1031 if (!strcmp(argv[0], "ethtype"))
1032 mode |= T4_FILTER_ETH_TYPE;
1034 if (!strcmp(argv[0], "proto"))
1035 mode |= T4_FILTER_IP_PROTO;
1037 if (!strcmp(argv[0], "tos"))
1038 mode |= T4_FILTER_IP_TOS;
1040 if (!strcmp(argv[0], "vlan"))
1041 mode |= T4_FILTER_VLAN;
1043 if (!strcmp(argv[0], "ovlan")) {
1044 mode |= T4_FILTER_VNIC;
1048 if (!strcmp(argv[0], "vnic_id")) {
1049 mode |= T4_FILTER_VNIC;
1050 mode |= T4_FILTER_IC_VNIC;
1054 if (!strcmp(argv[0], "iport"))
1055 mode |= T4_FILTER_PORT;
1057 if (!strcmp(argv[0], "fcoe"))
1058 mode |= T4_FILTER_FCoE;
1061 if (vnic > 0 && ovlan > 0) {
1062 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1066 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1070 del_filter(uint32_t idx)
1076 return doit(CHELSIO_T4_DEL_FILTER, &t);
1080 set_filter(uint32_t idx, int argc, const char *argv[])
1082 int af = AF_UNSPEC, start_arg = 0;
1086 warnc(EINVAL, "%s", __func__);
1089 bzero(&t, sizeof (t));
1093 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1094 const char **args = &argv[start_arg];
1097 if (!strcmp(argv[start_arg], "type")) {
1099 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1101 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1104 warnx("invalid type \"%s\"; "
1105 "must be one of \"ipv4\" or \"ipv6\"",
1106 argv[start_arg + 1]);
1110 if (af != AF_UNSPEC && af != newaf) {
1111 warnx("conflicting IPv4/IPv6 specifications.");
1115 } else if (!parse_val_mask("fcoe", args, &val, &mask)) {
1116 t.fs.val.fcoe = val;
1117 t.fs.mask.fcoe = mask;
1118 } else if (!parse_val_mask("iport", args, &val, &mask)) {
1119 t.fs.val.iport = val;
1120 t.fs.mask.iport = mask;
1121 } else if (!parse_val_mask("ovlan", args, &val, &mask)) {
1122 t.fs.val.vnic = val;
1123 t.fs.mask.vnic = mask;
1124 t.fs.val.ovlan_vld = 1;
1125 t.fs.mask.ovlan_vld = 1;
1126 } else if (!parse_val_mask("ivlan", args, &val, &mask)) {
1127 t.fs.val.vlan = val;
1128 t.fs.mask.vlan = mask;
1129 t.fs.val.vlan_vld = 1;
1130 t.fs.mask.vlan_vld = 1;
1131 } else if (!parse_val_mask("pf", args, &val, &mask)) {
1132 t.fs.val.vnic &= 0x1fff;
1133 t.fs.val.vnic |= (val & 0x7) << 13;
1134 t.fs.mask.vnic &= 0x1fff;
1135 t.fs.mask.vnic |= (mask & 0x7) << 13;
1136 t.fs.val.pfvf_vld = 1;
1137 t.fs.mask.pfvf_vld = 1;
1138 } else if (!parse_val_mask("vf", args, &val, &mask)) {
1139 t.fs.val.vnic &= 0xe000;
1140 t.fs.val.vnic |= val & 0x1fff;
1141 t.fs.mask.vnic &= 0xe000;
1142 t.fs.mask.vnic |= mask & 0x1fff;
1143 t.fs.val.pfvf_vld = 1;
1144 t.fs.mask.pfvf_vld = 1;
1145 } else if (!parse_val_mask("tos", args, &val, &mask)) {
1147 t.fs.mask.tos = mask;
1148 } else if (!parse_val_mask("proto", args, &val, &mask)) {
1149 t.fs.val.proto = val;
1150 t.fs.mask.proto = mask;
1151 } else if (!parse_val_mask("ethtype", args, &val, &mask)) {
1152 t.fs.val.ethtype = val;
1153 t.fs.mask.ethtype = mask;
1154 } else if (!parse_val_mask("macidx", args, &val, &mask)) {
1155 t.fs.val.macidx = val;
1156 t.fs.mask.macidx = mask;
1157 } else if (!parse_val_mask("matchtype", args, &val, &mask)) {
1158 t.fs.val.matchtype = val;
1159 t.fs.mask.matchtype = mask;
1160 } else if (!parse_val_mask("frag", args, &val, &mask)) {
1161 t.fs.val.frag = val;
1162 t.fs.mask.frag = mask;
1163 } else if (!parse_val_mask("dport", args, &val, &mask)) {
1164 t.fs.val.dport = val;
1165 t.fs.mask.dport = mask;
1166 } else if (!parse_val_mask("sport", args, &val, &mask)) {
1167 t.fs.val.sport = val;
1168 t.fs.mask.sport = mask;
1169 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1172 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1175 } else if (!strcmp(argv[start_arg], "action")) {
1176 if (!strcmp(argv[start_arg + 1], "pass"))
1177 t.fs.action = FILTER_PASS;
1178 else if (!strcmp(argv[start_arg + 1], "drop"))
1179 t.fs.action = FILTER_DROP;
1180 else if (!strcmp(argv[start_arg + 1], "switch"))
1181 t.fs.action = FILTER_SWITCH;
1183 warnx("invalid action \"%s\"; must be one of"
1184 " \"pass\", \"drop\" or \"switch\"",
1185 argv[start_arg + 1]);
1188 } else if (!parse_val("hitcnts", args, &val)) {
1190 } else if (!parse_val("prio", args, &val)) {
1192 } else if (!parse_val("rpttid", args, &val)) {
1194 } else if (!parse_val("queue", args, &val)) {
1197 } else if (!parse_val("tcbhash", args, &val)) {
1199 t.fs.dirsteerhash = 1;
1200 } else if (!parse_val("eport", args, &val)) {
1202 } else if (!strcmp(argv[start_arg], "dmac")) {
1203 struct ether_addr *daddr;
1205 daddr = ether_aton(argv[start_arg + 1]);
1206 if (daddr == NULL) {
1207 warnx("invalid dmac address \"%s\"",
1208 argv[start_arg + 1]);
1211 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1213 } else if (!strcmp(argv[start_arg], "smac")) {
1214 struct ether_addr *saddr;
1216 saddr = ether_aton(argv[start_arg + 1]);
1217 if (saddr == NULL) {
1218 warnx("invalid smac address \"%s\"",
1219 argv[start_arg + 1]);
1222 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1224 } else if (!strcmp(argv[start_arg], "vlan")) {
1226 if (!strcmp(argv[start_arg + 1], "none")) {
1227 t.fs.newvlan = VLAN_REMOVE;
1228 } else if (argv[start_arg + 1][0] == '=') {
1229 t.fs.newvlan = VLAN_REWRITE;
1230 } else if (argv[start_arg + 1][0] == '+') {
1231 t.fs.newvlan = VLAN_INSERT;
1232 } else if (isdigit(argv[start_arg + 1][0]) &&
1233 !parse_val_mask("vlan", args, &val, &mask)) {
1234 t.fs.val.vlan = val;
1235 t.fs.mask.vlan = mask;
1236 t.fs.val.vlan_vld = 1;
1237 t.fs.mask.vlan_vld = 1;
1239 warnx("unknown vlan parameter \"%s\"; must"
1240 " be one of \"none\", \"=<vlan>\", "
1241 " \"+<vlan>\", or \"<vlan>\"",
1242 argv[start_arg + 1]);
1245 if (t.fs.newvlan == VLAN_REWRITE ||
1246 t.fs.newvlan == VLAN_INSERT) {
1247 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1249 if (p == argv[start_arg + 1] + 1 || p[0] != 0) {
1250 warnx("invalid vlan \"%s\"",
1251 argv[start_arg + 1]);
1256 warnx("invalid parameter \"%s\"", argv[start_arg]);
1260 if (start_arg != argc) {
1261 warnx("no value for \"%s\"", argv[start_arg]);
1266 * Check basic sanity of option combinations.
1268 if (t.fs.action != FILTER_SWITCH &&
1269 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan)) {
1270 warnx("prio, port dmac, smac and vlan only make sense with"
1271 " \"action switch\"");
1274 if (t.fs.action != FILTER_PASS &&
1275 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1276 warnx("rpttid, queue and tcbhash don't make sense with"
1277 " action \"drop\" or \"switch\"");
1280 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1281 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1285 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1286 return doit(CHELSIO_T4_SET_FILTER, &t);
1290 filter_cmd(int argc, const char *argv[])
1297 warnx("filter: no arguments.");
1302 if (strcmp(argv[0], "list") == 0) {
1304 warnx("trailing arguments after \"list\" ignored.");
1306 return show_filters();
1310 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1311 return get_filter_mode();
1314 if (strcmp(argv[0], "mode") == 0)
1315 return set_filter_mode(argc - 1, argv + 1);
1318 s = str_to_number(argv[0], NULL, &val);
1319 if (*s || val > 0xffffffffU) {
1320 warnx("\"%s\" is neither an index nor a filter subcommand.",
1324 idx = (uint32_t) val;
1326 /* <idx> delete|clear */
1328 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1329 return del_filter(idx);
1332 /* <idx> [<param> <val>] ... */
1333 return set_filter(idx, argc - 1, argv + 1);
1337 * Shows the fields of a multi-word structure. The structure is considered to
1338 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1339 * whose fields are described by @fd. The 32-bit words are given in @words
1340 * starting with the least significant 32-bit word.
1343 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1346 const struct field_desc *p;
1348 for (p = fd; p->name; p++)
1349 w = max(w, strlen(p->name));
1352 unsigned long long data;
1353 int first_word = fd->start / 32;
1354 int shift = fd->start % 32;
1355 int width = fd->end - fd->start + 1;
1356 unsigned long long mask = (1ULL << width) - 1;
1358 data = (words[first_word] >> shift) |
1359 ((uint64_t)words[first_word + 1] << (32 - shift));
1361 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1365 printf("%-*s ", w, fd->name);
1366 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1371 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1372 #define FIELD1(name, start) FIELD(name, start, start)
1375 show_t5t6_ctxt(const struct t4_sge_context *p, int vers)
1377 static struct field_desc egress_t5[] = {
1378 FIELD("DCA_ST:", 181, 191),
1379 FIELD1("StatusPgNS:", 180),
1380 FIELD1("StatusPgRO:", 179),
1381 FIELD1("FetchNS:", 178),
1382 FIELD1("FetchRO:", 177),
1383 FIELD1("Valid:", 176),
1384 FIELD("PCIeDataChannel:", 174, 175),
1385 FIELD1("StatusPgTPHintEn:", 173),
1386 FIELD("StatusPgTPHint:", 171, 172),
1387 FIELD1("FetchTPHintEn:", 170),
1388 FIELD("FetchTPHint:", 168, 169),
1389 FIELD1("FCThreshOverride:", 167),
1390 { "WRLength:", 162, 166, 9, 0, 1 },
1391 FIELD1("WRLengthKnown:", 161),
1392 FIELD1("ReschedulePending:", 160),
1393 FIELD1("OnChipQueue:", 159),
1394 FIELD1("FetchSizeMode:", 158),
1395 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1396 FIELD1("FLMPacking:", 155),
1397 FIELD("FetchBurstMax:", 153, 154),
1398 FIELD("uPToken:", 133, 152),
1399 FIELD1("uPTokenEn:", 132),
1400 FIELD1("UserModeIO:", 131),
1401 FIELD("uPFLCredits:", 123, 130),
1402 FIELD1("uPFLCreditEn:", 122),
1403 FIELD("FID:", 111, 121),
1404 FIELD("HostFCMode:", 109, 110),
1405 FIELD1("HostFCOwner:", 108),
1406 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1407 FIELD("CIDX:", 89, 104),
1408 FIELD("PIDX:", 73, 88),
1409 { "BaseAddress:", 18, 72, 9, 1 },
1410 FIELD("QueueSize:", 2, 17),
1411 FIELD1("QueueType:", 1),
1412 FIELD1("CachePriority:", 0),
1415 static struct field_desc egress_t6[] = {
1416 FIELD("DCA_ST:", 181, 191),
1417 FIELD1("StatusPgNS:", 180),
1418 FIELD1("StatusPgRO:", 179),
1419 FIELD1("FetchNS:", 178),
1420 FIELD1("FetchRO:", 177),
1421 FIELD1("Valid:", 176),
1422 FIELD1("ReschedulePending_1:", 175),
1423 FIELD1("PCIeDataChannel:", 174),
1424 FIELD1("StatusPgTPHintEn:", 173),
1425 FIELD("StatusPgTPHint:", 171, 172),
1426 FIELD1("FetchTPHintEn:", 170),
1427 FIELD("FetchTPHint:", 168, 169),
1428 FIELD1("FCThreshOverride:", 167),
1429 { "WRLength:", 162, 166, 9, 0, 1 },
1430 FIELD1("WRLengthKnown:", 161),
1431 FIELD1("ReschedulePending:", 160),
1432 FIELD("TimerIx:", 157, 159),
1433 FIELD1("FetchBurstMin:", 156),
1434 FIELD1("FLMPacking:", 155),
1435 FIELD("FetchBurstMax:", 153, 154),
1436 FIELD("uPToken:", 133, 152),
1437 FIELD1("uPTokenEn:", 132),
1438 FIELD1("UserModeIO:", 131),
1439 FIELD("uPFLCredits:", 123, 130),
1440 FIELD1("uPFLCreditEn:", 122),
1441 FIELD("FID:", 111, 121),
1442 FIELD("HostFCMode:", 109, 110),
1443 FIELD1("HostFCOwner:", 108),
1444 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1445 FIELD("CIDX:", 89, 104),
1446 FIELD("PIDX:", 73, 88),
1447 { "BaseAddress:", 18, 72, 9, 1 },
1448 FIELD("QueueSize:", 2, 17),
1449 FIELD1("QueueType:", 1),
1450 FIELD1("FetchSizeMode:", 0),
1453 static struct field_desc fl_t5[] = {
1454 FIELD("DCA_ST:", 181, 191),
1455 FIELD1("StatusPgNS:", 180),
1456 FIELD1("StatusPgRO:", 179),
1457 FIELD1("FetchNS:", 178),
1458 FIELD1("FetchRO:", 177),
1459 FIELD1("Valid:", 176),
1460 FIELD("PCIeDataChannel:", 174, 175),
1461 FIELD1("StatusPgTPHintEn:", 173),
1462 FIELD("StatusPgTPHint:", 171, 172),
1463 FIELD1("FetchTPHintEn:", 170),
1464 FIELD("FetchTPHint:", 168, 169),
1465 FIELD1("FCThreshOverride:", 167),
1466 FIELD1("ReschedulePending:", 160),
1467 FIELD1("OnChipQueue:", 159),
1468 FIELD1("FetchSizeMode:", 158),
1469 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1470 FIELD1("FLMPacking:", 155),
1471 FIELD("FetchBurstMax:", 153, 154),
1472 FIELD1("FLMcongMode:", 152),
1473 FIELD("MaxuPFLCredits:", 144, 151),
1474 FIELD("FLMcontextID:", 133, 143),
1475 FIELD1("uPTokenEn:", 132),
1476 FIELD1("UserModeIO:", 131),
1477 FIELD("uPFLCredits:", 123, 130),
1478 FIELD1("uPFLCreditEn:", 122),
1479 FIELD("FID:", 111, 121),
1480 FIELD("HostFCMode:", 109, 110),
1481 FIELD1("HostFCOwner:", 108),
1482 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1483 FIELD("CIDX:", 89, 104),
1484 FIELD("PIDX:", 73, 88),
1485 { "BaseAddress:", 18, 72, 9, 1 },
1486 FIELD("QueueSize:", 2, 17),
1487 FIELD1("QueueType:", 1),
1488 FIELD1("CachePriority:", 0),
1491 static struct field_desc ingress_t5[] = {
1492 FIELD("DCA_ST:", 143, 153),
1493 FIELD1("ISCSICoalescing:", 142),
1494 FIELD1("Queue_Valid:", 141),
1495 FIELD1("TimerPending:", 140),
1496 FIELD1("DropRSS:", 139),
1497 FIELD("PCIeChannel:", 137, 138),
1498 FIELD1("SEInterruptArmed:", 136),
1499 FIELD1("CongestionMgtEnable:", 135),
1500 FIELD1("NoSnoop:", 134),
1501 FIELD1("RelaxedOrdering:", 133),
1502 FIELD1("GTSmode:", 132),
1503 FIELD1("TPHintEn:", 131),
1504 FIELD("TPHint:", 129, 130),
1505 FIELD1("UpdateScheduling:", 128),
1506 FIELD("UpdateDelivery:", 126, 127),
1507 FIELD1("InterruptSent:", 125),
1508 FIELD("InterruptIDX:", 114, 124),
1509 FIELD1("InterruptDestination:", 113),
1510 FIELD1("InterruptArmed:", 112),
1511 FIELD("RxIntCounter:", 106, 111),
1512 FIELD("RxIntCounterThreshold:", 104, 105),
1513 FIELD1("Generation:", 103),
1514 { "BaseAddress:", 48, 102, 9, 1 },
1515 FIELD("PIDX:", 32, 47),
1516 FIELD("CIDX:", 16, 31),
1517 { "QueueSize:", 4, 15, 4, 0 },
1518 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1519 FIELD1("QueueEntryOverride:", 1),
1520 FIELD1("CachePriority:", 0),
1523 static struct field_desc ingress_t6[] = {
1524 FIELD1("SP_NS:", 158),
1525 FIELD1("SP_RO:", 157),
1526 FIELD1("SP_TPHintEn:", 156),
1527 FIELD("SP_TPHint:", 154, 155),
1528 FIELD("DCA_ST:", 143, 153),
1529 FIELD1("ISCSICoalescing:", 142),
1530 FIELD1("Queue_Valid:", 141),
1531 FIELD1("TimerPending:", 140),
1532 FIELD1("DropRSS:", 139),
1533 FIELD("PCIeChannel:", 137, 138),
1534 FIELD1("SEInterruptArmed:", 136),
1535 FIELD1("CongestionMgtEnable:", 135),
1536 FIELD1("NoSnoop:", 134),
1537 FIELD1("RelaxedOrdering:", 133),
1538 FIELD1("GTSmode:", 132),
1539 FIELD1("TPHintEn:", 131),
1540 FIELD("TPHint:", 129, 130),
1541 FIELD1("UpdateScheduling:", 128),
1542 FIELD("UpdateDelivery:", 126, 127),
1543 FIELD1("InterruptSent:", 125),
1544 FIELD("InterruptIDX:", 114, 124),
1545 FIELD1("InterruptDestination:", 113),
1546 FIELD1("InterruptArmed:", 112),
1547 FIELD("RxIntCounter:", 106, 111),
1548 FIELD("RxIntCounterThreshold:", 104, 105),
1549 FIELD1("Generation:", 103),
1550 { "BaseAddress:", 48, 102, 9, 1 },
1551 FIELD("PIDX:", 32, 47),
1552 FIELD("CIDX:", 16, 31),
1553 { "QueueSize:", 4, 15, 4, 0 },
1554 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1555 FIELD1("QueueEntryOverride:", 1),
1556 FIELD1("CachePriority:", 0),
1559 static struct field_desc flm_t5[] = {
1560 FIELD1("Valid:", 89),
1561 FIELD("SplitLenMode:", 87, 88),
1562 FIELD1("TPHintEn:", 86),
1563 FIELD("TPHint:", 84, 85),
1564 FIELD1("NoSnoop:", 83),
1565 FIELD1("RelaxedOrdering:", 82),
1566 FIELD("DCA_ST:", 71, 81),
1567 FIELD("EQid:", 54, 70),
1568 FIELD("SplitEn:", 52, 53),
1569 FIELD1("PadEn:", 51),
1570 FIELD1("PackEn:", 50),
1571 FIELD1("Cache_Lock :", 49),
1572 FIELD1("CongDrop:", 48),
1573 FIELD("PackOffset:", 16, 47),
1574 FIELD("CIDX:", 8, 15),
1575 FIELD("PIDX:", 0, 7),
1578 static struct field_desc flm_t6[] = {
1579 FIELD1("Valid:", 89),
1580 FIELD("SplitLenMode:", 87, 88),
1581 FIELD1("TPHintEn:", 86),
1582 FIELD("TPHint:", 84, 85),
1583 FIELD1("NoSnoop:", 83),
1584 FIELD1("RelaxedOrdering:", 82),
1585 FIELD("DCA_ST:", 71, 81),
1586 FIELD("EQid:", 54, 70),
1587 FIELD("SplitEn:", 52, 53),
1588 FIELD1("PadEn:", 51),
1589 FIELD1("PackEn:", 50),
1590 FIELD1("Cache_Lock :", 49),
1591 FIELD1("CongDrop:", 48),
1592 FIELD1("Inflight:", 47),
1593 FIELD1("CongEn:", 46),
1594 FIELD1("CongMode:", 45),
1595 FIELD("PackOffset:", 20, 39),
1596 FIELD("CIDX:", 8, 15),
1597 FIELD("PIDX:", 0, 7),
1600 static struct field_desc conm_t5[] = {
1601 FIELD1("CngMPSEnable:", 21),
1602 FIELD("CngTPMode:", 19, 20),
1603 FIELD1("CngDBPHdr:", 18),
1604 FIELD1("CngDBPData:", 17),
1605 FIELD1("CngIMSG:", 16),
1606 { "CngChMap:", 0, 15, 0, 1, 0 },
1610 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1612 show_struct(p->data, 6, fl_t5);
1614 show_struct(p->data, 6, egress_t5);
1616 show_struct(p->data, 6, egress_t6);
1617 } else if (p->mem_id == SGE_CONTEXT_FLM)
1618 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1619 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1620 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1621 else if (p->mem_id == SGE_CONTEXT_CNM)
1622 show_struct(p->data, 1, conm_t5);
1626 show_t4_ctxt(const struct t4_sge_context *p)
1628 static struct field_desc egress_t4[] = {
1629 FIELD1("StatusPgNS:", 180),
1630 FIELD1("StatusPgRO:", 179),
1631 FIELD1("FetchNS:", 178),
1632 FIELD1("FetchRO:", 177),
1633 FIELD1("Valid:", 176),
1634 FIELD("PCIeDataChannel:", 174, 175),
1635 FIELD1("DCAEgrQEn:", 173),
1636 FIELD("DCACPUID:", 168, 172),
1637 FIELD1("FCThreshOverride:", 167),
1638 FIELD("WRLength:", 162, 166),
1639 FIELD1("WRLengthKnown:", 161),
1640 FIELD1("ReschedulePending:", 160),
1641 FIELD1("OnChipQueue:", 159),
1642 FIELD1("FetchSizeMode", 158),
1643 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1644 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1645 FIELD("uPToken:", 133, 152),
1646 FIELD1("uPTokenEn:", 132),
1647 FIELD1("UserModeIO:", 131),
1648 FIELD("uPFLCredits:", 123, 130),
1649 FIELD1("uPFLCreditEn:", 122),
1650 FIELD("FID:", 111, 121),
1651 FIELD("HostFCMode:", 109, 110),
1652 FIELD1("HostFCOwner:", 108),
1653 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1654 FIELD("CIDX:", 89, 104),
1655 FIELD("PIDX:", 73, 88),
1656 { "BaseAddress:", 18, 72, 9, 1 },
1657 FIELD("QueueSize:", 2, 17),
1658 FIELD1("QueueType:", 1),
1659 FIELD1("CachePriority:", 0),
1662 static struct field_desc fl_t4[] = {
1663 FIELD1("StatusPgNS:", 180),
1664 FIELD1("StatusPgRO:", 179),
1665 FIELD1("FetchNS:", 178),
1666 FIELD1("FetchRO:", 177),
1667 FIELD1("Valid:", 176),
1668 FIELD("PCIeDataChannel:", 174, 175),
1669 FIELD1("DCAEgrQEn:", 173),
1670 FIELD("DCACPUID:", 168, 172),
1671 FIELD1("FCThreshOverride:", 167),
1672 FIELD1("ReschedulePending:", 160),
1673 FIELD1("OnChipQueue:", 159),
1674 FIELD1("FetchSizeMode", 158),
1675 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1676 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1677 FIELD1("FLMcongMode:", 152),
1678 FIELD("MaxuPFLCredits:", 144, 151),
1679 FIELD("FLMcontextID:", 133, 143),
1680 FIELD1("uPTokenEn:", 132),
1681 FIELD1("UserModeIO:", 131),
1682 FIELD("uPFLCredits:", 123, 130),
1683 FIELD1("uPFLCreditEn:", 122),
1684 FIELD("FID:", 111, 121),
1685 FIELD("HostFCMode:", 109, 110),
1686 FIELD1("HostFCOwner:", 108),
1687 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1688 FIELD("CIDX:", 89, 104),
1689 FIELD("PIDX:", 73, 88),
1690 { "BaseAddress:", 18, 72, 9, 1 },
1691 FIELD("QueueSize:", 2, 17),
1692 FIELD1("QueueType:", 1),
1693 FIELD1("CachePriority:", 0),
1696 static struct field_desc ingress_t4[] = {
1697 FIELD1("NoSnoop:", 145),
1698 FIELD1("RelaxedOrdering:", 144),
1699 FIELD1("GTSmode:", 143),
1700 FIELD1("ISCSICoalescing:", 142),
1701 FIELD1("Valid:", 141),
1702 FIELD1("TimerPending:", 140),
1703 FIELD1("DropRSS:", 139),
1704 FIELD("PCIeChannel:", 137, 138),
1705 FIELD1("SEInterruptArmed:", 136),
1706 FIELD1("CongestionMgtEnable:", 135),
1707 FIELD1("DCAIngQEnable:", 134),
1708 FIELD("DCACPUID:", 129, 133),
1709 FIELD1("UpdateScheduling:", 128),
1710 FIELD("UpdateDelivery:", 126, 127),
1711 FIELD1("InterruptSent:", 125),
1712 FIELD("InterruptIDX:", 114, 124),
1713 FIELD1("InterruptDestination:", 113),
1714 FIELD1("InterruptArmed:", 112),
1715 FIELD("RxIntCounter:", 106, 111),
1716 FIELD("RxIntCounterThreshold:", 104, 105),
1717 FIELD1("Generation:", 103),
1718 { "BaseAddress:", 48, 102, 9, 1 },
1719 FIELD("PIDX:", 32, 47),
1720 FIELD("CIDX:", 16, 31),
1721 { "QueueSize:", 4, 15, 4, 0 },
1722 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1723 FIELD1("QueueEntryOverride:", 1),
1724 FIELD1("CachePriority:", 0),
1727 static struct field_desc flm_t4[] = {
1728 FIELD1("NoSnoop:", 79),
1729 FIELD1("RelaxedOrdering:", 78),
1730 FIELD1("Valid:", 77),
1731 FIELD("DCACPUID:", 72, 76),
1732 FIELD1("DCAFLEn:", 71),
1733 FIELD("EQid:", 54, 70),
1734 FIELD("SplitEn:", 52, 53),
1735 FIELD1("PadEn:", 51),
1736 FIELD1("PackEn:", 50),
1737 FIELD1("DBpriority:", 48),
1738 FIELD("PackOffset:", 16, 47),
1739 FIELD("CIDX:", 8, 15),
1740 FIELD("PIDX:", 0, 7),
1743 static struct field_desc conm_t4[] = {
1744 FIELD1("CngDBPHdr:", 6),
1745 FIELD1("CngDBPData:", 5),
1746 FIELD1("CngIMSG:", 4),
1747 { "CngChMap:", 0, 3, 0, 1, 0},
1751 if (p->mem_id == SGE_CONTEXT_EGRESS)
1752 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
1753 else if (p->mem_id == SGE_CONTEXT_FLM)
1754 show_struct(p->data, 3, flm_t4);
1755 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1756 show_struct(p->data, 5, ingress_t4);
1757 else if (p->mem_id == SGE_CONTEXT_CNM)
1758 show_struct(p->data, 1, conm_t4);
1765 get_sge_context(int argc, const char *argv[])
1770 struct t4_sge_context cntxt = {0};
1773 warnx("sge_context: incorrect number of arguments.");
1777 if (!strcmp(argv[0], "egress"))
1778 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1779 else if (!strcmp(argv[0], "ingress"))
1780 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1781 else if (!strcmp(argv[0], "fl"))
1782 cntxt.mem_id = SGE_CONTEXT_FLM;
1783 else if (!strcmp(argv[0], "cong"))
1784 cntxt.mem_id = SGE_CONTEXT_CNM;
1786 warnx("unknown context type \"%s\"; known types are egress, "
1787 "ingress, fl, and cong.", argv[0]);
1791 p = str_to_number(argv[1], &cid, NULL);
1793 warnx("invalid context id \"%s\"", argv[1]);
1798 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1803 show_t4_ctxt(&cntxt);
1805 show_t5t6_ctxt(&cntxt, chip_id);
1811 loadfw(int argc, const char *argv[])
1814 struct t4_data data = {0};
1815 const char *fname = argv[0];
1816 struct stat st = {0};
1819 warnx("loadfw: incorrect number of arguments.");
1823 fd = open(fname, O_RDONLY);
1825 warn("open(%s)", fname);
1829 if (fstat(fd, &st) < 0) {
1835 data.len = st.st_size;
1836 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1837 if (data.data == MAP_FAILED) {
1843 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1844 munmap(data.data, data.len);
1850 loadcfg(int argc, const char *argv[])
1853 struct t4_data data = {0};
1854 const char *fname = argv[0];
1855 struct stat st = {0};
1858 warnx("loadcfg: incorrect number of arguments.");
1862 if (strcmp(fname, "clear") == 0)
1863 return (doit(CHELSIO_T4_LOAD_CFG, &data));
1865 fd = open(fname, O_RDONLY);
1867 warn("open(%s)", fname);
1871 if (fstat(fd, &st) < 0) {
1877 data.len = st.st_size;
1878 data.len &= ~3; /* Clip off to make it a multiple of 4 */
1879 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1880 if (data.data == MAP_FAILED) {
1886 rc = doit(CHELSIO_T4_LOAD_CFG, &data);
1887 munmap(data.data, data.len);
1893 dumpstate(int argc, const char *argv[])
1896 struct t4_cudbg_dump dump = {0};
1897 const char *fname = argv[0];
1900 warnx("dumpstate: incorrect number of arguments.");
1905 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap));
1906 dump.len = 8 * 1024 * 1024;
1907 dump.data = malloc(dump.len);
1908 if (dump.data == NULL) {
1912 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump);
1916 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY,
1917 S_IRUSR | S_IRGRP | S_IROTH);
1919 warn("open(%s)", fname);
1923 write(fd, dump.data, dump.len);
1931 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
1934 struct t4_mem_range mr;
1938 mr.data = malloc(mr.len);
1941 warn("read_mem: malloc");
1945 rc = doit(CHELSIO_T4_GET_MEM, &mr);
1950 (*output)(mr.data, mr.len);
1957 loadboot(int argc, const char *argv[])
1962 struct t4_bootrom br = {0};
1963 const char *fname = argv[0];
1964 struct stat st = {0};
1969 } else if (argc == 3) {
1970 if (!strcmp(argv[1], "pf"))
1972 else if (!strcmp(argv[1], "offset"))
1977 p = str_to_number(argv[2], &l, NULL);
1982 warnx("loadboot: incorrect number of arguments.");
1986 if (strcmp(fname, "clear") == 0)
1987 return (doit(CHELSIO_T4_LOAD_BOOT, &br));
1989 fd = open(fname, O_RDONLY);
1991 warn("open(%s)", fname);
1995 if (fstat(fd, &st) < 0) {
2001 br.len = st.st_size;
2002 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0);
2003 if (br.data == MAP_FAILED) {
2009 rc = doit(CHELSIO_T4_LOAD_BOOT, &br);
2010 munmap(br.data, br.len);
2016 loadbootcfg(int argc, const char *argv[])
2019 struct t4_data bc = {0};
2020 const char *fname = argv[0];
2021 struct stat st = {0};
2024 warnx("loadbootcfg: incorrect number of arguments.");
2028 if (strcmp(fname, "clear") == 0)
2029 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc));
2031 fd = open(fname, O_RDONLY);
2033 warn("open(%s)", fname);
2037 if (fstat(fd, &st) < 0) {
2043 bc.len = st.st_size;
2044 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0);
2045 if (bc.data == MAP_FAILED) {
2051 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc);
2052 munmap(bc.data, bc.len);
2058 * Display memory as list of 'n' 4-byte values per line.
2061 show_mem(uint32_t *buf, uint32_t len)
2067 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2069 printf("%s%08x", s, htonl(*buf));
2076 memdump(int argc, const char *argv[])
2083 warnx("incorrect number of arguments.");
2087 p = str_to_number(argv[0], &l, NULL);
2089 warnx("invalid address \"%s\"", argv[0]);
2094 p = str_to_number(argv[1], &l, NULL);
2096 warnx("memdump: invalid length \"%s\"", argv[1]);
2101 return (read_mem(addr, len, show_mem));
2105 * Display TCB as list of 'n' 4-byte values per line.
2108 show_tcb(uint32_t *buf, uint32_t len)
2110 unsigned char *tcb = (unsigned char *)buf;
2115 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2117 printf("%s%08x", s, htonl(*buf));
2121 set_tcb_info(TIDTYPE_TCB, chip_id);
2122 set_print_style(PRNTSTYL_COMP);
2124 parse_n_display_xcb(tcb);
2127 #define A_TP_CMM_TCB_BASE 0x7d10
2128 #define TCB_SIZE 128
2130 read_tcb(int argc, const char *argv[])
2140 warnx("incorrect number of arguments.");
2144 p = str_to_number(argv[0], &l, NULL);
2146 warnx("invalid tid \"%s\"", argv[0]);
2151 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
2155 addr = val + tid * TCB_SIZE;
2157 return (read_mem(addr, TCB_SIZE, show_tcb));
2161 read_i2c(int argc, const char *argv[])
2165 struct t4_i2c_data i2cd;
2168 if (argc < 3 || argc > 4) {
2169 warnx("incorrect number of arguments.");
2173 p = str_to_number(argv[0], &l, NULL);
2174 if (*p || l > UCHAR_MAX) {
2175 warnx("invalid port id \"%s\"", argv[0]);
2180 p = str_to_number(argv[1], &l, NULL);
2181 if (*p || l > UCHAR_MAX) {
2182 warnx("invalid i2c device address \"%s\"", argv[1]);
2187 p = str_to_number(argv[2], &l, NULL);
2188 if (*p || l > UCHAR_MAX) {
2189 warnx("invalid byte offset \"%s\"", argv[2]);
2195 p = str_to_number(argv[3], &l, NULL);
2196 if (*p || l > sizeof(i2cd.data)) {
2197 warnx("invalid number of bytes \"%s\"", argv[3]);
2204 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2208 for (i = 0; i < i2cd.len; i++)
2209 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2215 clearstats(int argc, const char *argv[])
2222 warnx("incorrect number of arguments.");
2226 p = str_to_number(argv[0], &l, NULL);
2228 warnx("invalid port id \"%s\"", argv[0]);
2233 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2241 int rc, port_idx, i;
2244 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2245 rc = read_reg(0x9800, 4, &val);
2248 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2251 for (t.idx = 0; ; t.idx++) {
2252 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2253 if (rc != 0 || t.idx == 0xff)
2256 if (t.tp.port < 4) {
2258 port_idx = t.tp.port;
2259 } else if (t.tp.port < 8) {
2261 port_idx = t.tp.port - 4;
2262 } else if (t.tp.port < 12) {
2264 port_idx = t.tp.port - 8;
2265 } else if (t.tp.port < 16) {
2267 port_idx = t.tp.port - 12;
2268 } else if (t.tp.port < 20) {
2270 port_idx = t.tp.port - 16;
2273 port_idx = t.tp.port;
2276 printf("\ntracer %u (currently %s) captures ", t.idx,
2277 t.enabled ? "ENABLED" : "DISABLED");
2279 printf("port %u %s, ", port_idx, s);
2281 printf("%s %u, ", s, port_idx);
2282 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2284 printf("packets captured %smatch filter\n",
2285 t.tp.invert ? "do not " : "");
2286 if (t.tp.skip_ofst) {
2287 printf("filter pattern: ");
2288 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2289 printf("%08x%08x", t.tp.data[i],
2292 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2293 printf("%08x%08x", t.tp.mask[i],
2297 printf("filter pattern: ");
2298 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2299 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2301 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2302 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2303 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2310 tracer_onoff(uint8_t idx, int enabled)
2315 t.enabled = enabled;
2318 return doit(CHELSIO_T4_SET_TRACER, &t);
2322 create_tracing_ifnet()
2325 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL
2327 char *env[] = {NULL};
2330 close(STDERR_FILENO);
2331 execve(cmd[0], cmd, env);
2337 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2338 * matching). Right now this is a quick-n-dirty implementation that traces the
2339 * first 128B of all tx or rx on a port
2342 set_tracer(uint8_t idx, int argc, const char *argv[])
2347 bzero(&t, sizeof (t));
2353 warnx("must specify tx<n> or rx<n>.");
2357 len = strlen(argv[0]);
2359 warnx("argument must be 3 characters (tx<n> or rx<n>)");
2363 if (strncmp(argv[0], "tx", 2) == 0) {
2364 port = argv[0][2] - '0';
2365 if (port < 0 || port > 3) {
2366 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2370 } else if (strncmp(argv[0], "rx", 2) == 0) {
2371 port = argv[0][2] - '0';
2372 if (port < 0 || port > 3) {
2373 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2377 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2381 t.tp.snap_len = 128;
2388 create_tracing_ifnet();
2389 return doit(CHELSIO_T4_SET_TRACER, &t);
2393 tracer_cmd(int argc, const char *argv[])
2400 warnx("tracer: no arguments.");
2405 if (strcmp(argv[0], "list") == 0) {
2407 warnx("trailing arguments after \"list\" ignored.");
2409 return show_tracers();
2413 s = str_to_number(argv[0], NULL, &val);
2414 if (*s || val > 0xff) {
2415 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2422 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2423 return tracer_onoff(idx, 0);
2426 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2427 return tracer_onoff(idx, 1);
2430 return set_tracer(idx, argc - 1, argv + 1);
2434 modinfo_raw(int port_id)
2437 struct t4_i2c_data i2cd;
2440 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2441 bzero(&i2cd, sizeof(i2cd));
2442 i2cd.port_id = port_id;
2443 i2cd.dev_addr = 0xa0;
2444 i2cd.offset = offset;
2445 i2cd.len = sizeof(i2cd.data);
2446 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2449 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2450 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2451 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2454 printf(" %c%c%c%c %c%c%c%c\n",
2455 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2456 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2457 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2458 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2459 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2460 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2461 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2462 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2469 modinfo(int argc, const char *argv[])
2472 char string[16], *p;
2473 struct t4_i2c_data i2cd;
2475 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2478 warnx("must supply a port");
2483 warnx("too many arguments");
2487 p = str_to_number(argv[0], &port, NULL);
2488 if (*p || port > UCHAR_MAX) {
2489 warnx("invalid port id \"%s\"", argv[0]);
2494 if (!strcmp(argv[1], "raw"))
2495 return (modinfo_raw(port));
2497 warnx("second argument can only be \"raw\"");
2502 bzero(&i2cd, sizeof(i2cd));
2504 i2cd.port_id = port;
2505 i2cd.dev_addr = SFF_8472_BASE;
2507 i2cd.offset = SFF_8472_ID;
2508 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2511 if (i2cd.data[0] > SFF_8472_ID_LAST)
2512 printf("Unknown ID\n");
2514 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2516 bzero(&string, sizeof(string));
2517 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2519 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2521 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2523 printf("Vendor %s\n", string);
2525 bzero(&string, sizeof(string));
2526 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2528 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2530 string[i - SFF_8472_SN_START] = i2cd.data[0];
2532 printf("SN %s\n", string);
2534 bzero(&string, sizeof(string));
2535 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2537 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2539 string[i - SFF_8472_PN_START] = i2cd.data[0];
2541 printf("PN %s\n", string);
2543 bzero(&string, sizeof(string));
2544 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2546 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2548 string[i - SFF_8472_REV_START] = i2cd.data[0];
2550 printf("Rev %s\n", string);
2552 i2cd.offset = SFF_8472_DIAG_TYPE;
2553 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2556 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2557 SFF_8472_DIAG_INTERNAL)) {
2559 /* Switch to reading from the Diagnostic address. */
2560 i2cd.dev_addr = SFF_8472_DIAG;
2563 i2cd.offset = SFF_8472_TEMP;
2564 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2566 temp = i2cd.data[0] << 8;
2568 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2572 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2573 SFF_8472_TEMP_SHIFT);
2575 i2cd.offset = SFF_8472_VCC;
2576 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2578 vcc = i2cd.data[0] << 8;
2579 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2581 i2cd.offset = SFF_8472_TX_BIAS;
2582 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2584 tx_bias = i2cd.data[0] << 8;
2585 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2587 i2cd.offset = SFF_8472_TX_POWER;
2588 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2590 tx_power = i2cd.data[0] << 8;
2591 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2593 i2cd.offset = SFF_8472_RX_POWER;
2594 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2596 rx_power = i2cd.data[0] << 8;
2597 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2600 printf("Diagnostics not supported.\n");
2606 warnx("No module/cable in port %ld", port);
2611 /* XXX: pass in a low/high and do range checks as well */
2613 get_sched_param(const char *param, const char *args[], long *val)
2617 if (strcmp(param, args[0]) != 0)
2620 p = str_to_number(args[1], val, NULL);
2622 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2631 sched_class(int argc, const char *argv[])
2633 struct t4_sched_params op;
2636 memset(&op, 0xff, sizeof(op));
2640 warnx("missing scheduling sub-command");
2643 if (!strcmp(argv[0], "config")) {
2644 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2645 op.u.config.minmax = -1;
2646 } else if (!strcmp(argv[0], "params")) {
2647 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2648 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2649 op.u.params.ratemode = op.u.params.channel =
2650 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2651 op.u.params.weight = op.u.params.pktsize = -1;
2653 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2657 /* Decode remaining arguments ... */
2659 for (i = 1; i < argc; i += 2) {
2660 const char **args = &argv[i];
2663 if (i + 1 == argc) {
2664 warnx("missing argument for \"%s\"", args[0]);
2669 if (!strcmp(args[0], "type")) {
2670 if (!strcmp(args[1], "packet"))
2671 op.type = SCHED_CLASS_TYPE_PACKET;
2673 warnx("invalid type parameter \"%s\"", args[1]);
2680 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2681 if(!get_sched_param("minmax", args, &l))
2682 op.u.config.minmax = (int8_t)l;
2684 warnx("unknown scheduler config parameter "
2692 /* Rest applies only to SUBCMD_PARAMS */
2693 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
2696 if (!strcmp(args[0], "level")) {
2697 if (!strcmp(args[1], "cl-rl"))
2698 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
2699 else if (!strcmp(args[1], "cl-wrr"))
2700 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
2701 else if (!strcmp(args[1], "ch-rl"))
2702 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
2704 warnx("invalid level parameter \"%s\"",
2708 } else if (!strcmp(args[0], "mode")) {
2709 if (!strcmp(args[1], "class"))
2710 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
2711 else if (!strcmp(args[1], "flow"))
2712 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
2714 warnx("invalid mode parameter \"%s\"", args[1]);
2717 } else if (!strcmp(args[0], "rate-unit")) {
2718 if (!strcmp(args[1], "bits"))
2719 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
2720 else if (!strcmp(args[1], "pkts"))
2721 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
2723 warnx("invalid rate-unit parameter \"%s\"",
2727 } else if (!strcmp(args[0], "rate-mode")) {
2728 if (!strcmp(args[1], "relative"))
2729 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
2730 else if (!strcmp(args[1], "absolute"))
2731 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
2733 warnx("invalid rate-mode parameter \"%s\"",
2737 } else if (!get_sched_param("channel", args, &l))
2738 op.u.params.channel = (int8_t)l;
2739 else if (!get_sched_param("class", args, &l))
2740 op.u.params.cl = (int8_t)l;
2741 else if (!get_sched_param("min-rate", args, &l))
2742 op.u.params.minrate = (int32_t)l;
2743 else if (!get_sched_param("max-rate", args, &l))
2744 op.u.params.maxrate = (int32_t)l;
2745 else if (!get_sched_param("weight", args, &l))
2746 op.u.params.weight = (int16_t)l;
2747 else if (!get_sched_param("pkt-size", args, &l))
2748 op.u.params.pktsize = (int16_t)l;
2750 warnx("unknown scheduler parameter \"%s\"", args[0]);
2756 * Catch some logical fallacies in terms of argument combinations here
2757 * so we can offer more than just the EINVAL return from the driver.
2758 * The driver will be able to catch a lot more issues since it knows
2759 * the specifics of the device hardware capabilities like how many
2760 * channels, classes, etc. the device supports.
2763 warnx("sched \"type\" parameter missing");
2766 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2767 if (op.u.config.minmax < 0) {
2768 warnx("sched config \"minmax\" parameter missing");
2772 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
2773 if (op.u.params.level < 0) {
2774 warnx("sched params \"level\" parameter missing");
2777 if (op.u.params.mode < 0) {
2778 warnx("sched params \"mode\" parameter missing");
2781 if (op.u.params.rateunit < 0) {
2782 warnx("sched params \"rate-unit\" parameter missing");
2785 if (op.u.params.ratemode < 0) {
2786 warnx("sched params \"rate-mode\" parameter missing");
2789 if (op.u.params.channel < 0) {
2790 warnx("sched params \"channel\" missing");
2793 if (op.u.params.cl < 0) {
2794 warnx("sched params \"class\" missing");
2797 if (op.u.params.maxrate < 0 &&
2798 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2799 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2800 warnx("sched params \"max-rate\" missing for "
2801 "rate-limit level");
2804 if (op.u.params.weight < 0 &&
2805 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
2806 warnx("sched params \"weight\" missing for "
2807 "weighted-round-robin level");
2810 if (op.u.params.pktsize < 0 &&
2811 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2812 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2813 warnx("sched params \"pkt-size\" missing for "
2814 "rate-limit level");
2817 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2818 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2819 warnx("sched params mode flow needs rate-mode absolute");
2822 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2823 !in_range(op.u.params.maxrate, 1, 100)) {
2824 warnx("sched params \"max-rate\" takes "
2825 "percentage value(1-100) for rate-mode relative");
2828 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2829 !in_range(op.u.params.maxrate, 1, 100000000)) {
2830 warnx("sched params \"max-rate\" takes "
2831 "value(1-100000000) for rate-mode absolute");
2834 if (op.u.params.maxrate > 0 &&
2835 op.u.params.maxrate < op.u.params.minrate) {
2836 warnx("sched params \"max-rate\" is less than "
2843 warnx("%d error%s in sched-class command", errs,
2844 errs == 1 ? "" : "s");
2848 return doit(CHELSIO_T4_SCHED_CLASS, &op);
2852 sched_queue(int argc, const char *argv[])
2854 struct t4_sched_queue op = {0};
2859 /* need "<port> <queue> <class> */
2860 warnx("incorrect number of arguments.");
2864 p = str_to_number(argv[0], &val, NULL);
2865 if (*p || val > UCHAR_MAX) {
2866 warnx("invalid port id \"%s\"", argv[0]);
2869 op.port = (uint8_t)val;
2871 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
2874 p = str_to_number(argv[1], &val, NULL);
2875 if (*p || val < -1) {
2876 warnx("invalid queue \"%s\"", argv[1]);
2879 op.queue = (int8_t)val;
2882 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
2885 p = str_to_number(argv[2], &val, NULL);
2886 if (*p || val < -1) {
2887 warnx("invalid class \"%s\"", argv[2]);
2890 op.cl = (int8_t)val;
2893 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
2897 parse_offload_settings_word(const char *s, char **pnext, const char *ws,
2898 int *pneg, struct offload_settings *os)
2906 if (!strcmp(s, "not")) {
2911 if (!strcmp(s, "offload")) {
2912 os->offload = (*pneg + 1) & 1;
2914 } else if (!strcmp(s , "coalesce")) {
2915 os->rx_coalesce = (*pneg + 1) & 1;
2917 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) {
2918 os->tstamp = (*pneg + 1) & 1;
2920 } else if (!strcmp(s, "sack")) {
2921 os->sack = (*pneg + 1) & 1;
2923 } else if (!strcmp(s, "nagle")) {
2924 os->nagle = (*pneg + 1) & 1;
2926 } else if (!strcmp(s, "ecn")) {
2927 os->ecn = (*pneg + 1) & 1;
2929 } else if (!strcmp(s, "ddp")) {
2930 os->ddp = (*pneg + 1) & 1;
2932 } else if (!strcmp(s, "tls")) {
2933 os->tls = (*pneg + 1) & 1;
2939 /* Settings with additional parameter handled here. */
2942 warnx("\"%s\" is not a valid keyword, or it does not "
2943 "support negation.", s);
2947 while ((param = strsep(pnext, ws)) != NULL) {
2951 if (param == NULL) {
2952 warnx("\"%s\" is not a valid keyword, or it requires a "
2953 "parameter that has not been provided.", s);
2957 if (!strcmp(s, "cong")) {
2958 if (!strcmp(param, "reno"))
2960 else if (!strcmp(param, "tahoe"))
2962 else if (!strcmp(param, "newreno"))
2964 else if (!strcmp(param, "highspeed"))
2967 warnx("unknown congestion algorithm \"%s\".", s);
2970 } else if (!strcmp(s, "class")) {
2972 p = str_to_number(param, &val, NULL);
2973 /* (nsched_cls - 1) is spelled 15 here. */
2974 if (*p || val < 0 || val > 15) {
2975 warnx("invalid scheduling class \"%s\". "
2976 "\"class\" needs an integer value where "
2977 "0 <= value <= 15", param);
2980 os->sched_class = val;
2981 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") ||
2982 !strcmp(s, "rxq")) {
2984 if (strcmp(param, "random")) {
2985 p = str_to_number(param, &val, NULL);
2986 if (*p || val < 0 || val > 0xffff) {
2987 warnx("invalid queue specification "
2988 "\"%s\". \"%s\" needs an integer"
2989 " value, or \"random\".",
2994 if (!strcmp(s, "bind")) {
2997 } else if (!strcmp(s, "txq")) {
2999 } else if (!strcmp(s, "rxq")) {
3004 } else if (!strcmp(s, "mss")) {
3006 p = str_to_number(param, &val, NULL);
3007 if (*p || val <= 0) {
3008 warnx("invalid MSS specification \"%s\". "
3009 "\"mss\" needs a positive integer value",
3015 warnx("unknown settings keyword: \"%s\"", s);
3024 parse_offload_settings(const char *settings_ro, struct offload_settings *os)
3026 const char *ws = " \f\n\r\v\t";
3027 char *settings, *s, *next;
3028 int rc, nsettings, neg;
3029 static const struct offload_settings default_settings = {
3030 .offload = 0, /* No settings imply !offload */
3045 *os = default_settings;
3047 next = settings = strdup(settings_ro);
3048 if (settings == NULL) {
3056 while ((s = strsep(&next, ws)) != NULL) {
3060 rc = parse_offload_settings_word(s, &next, ws, &neg, os);
3064 if (nsettings == 0) {
3065 warnx("no settings provided");
3070 warnx("%d stray negation(s) at end of offload settings", neg);
3080 isempty_line(char *line, size_t llen)
3083 /* skip leading whitespace */
3084 while (isspace(*line)) {
3088 if (llen == 0 || *line == '#' || *line == '\n')
3095 special_offload_rule(char *str)
3098 /* skip leading whitespaces */
3099 while (isspace(*str))
3102 /* check for special strings: "-", "all", "any" */
3105 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) {
3111 /* skip trailing whitespaces */
3112 while (isspace(*str))
3115 return (*str == '\0');
3119 * A rule has 3 parts: an open-type, a match expression, and offload settings.
3121 * [<open-type>] <expr> => <settings>
3124 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd,
3125 struct offload_rule *r)
3127 char *expr, *settings, *s;
3129 bzero(r, sizeof(*r));
3131 /* Skip leading whitespace. */
3132 while (isspace(*line))
3134 /* Trim trailing whitespace */
3135 s = &line[llen - 1];
3136 while (isspace(*s)) {
3142 * First part of the rule: '[X]' where X = A/D/L/P
3144 if (*line++ != '[') {
3145 warnx("missing \"[\" on line %zd", lno);
3153 r->open_type = *line;
3156 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno);
3160 if (*line++ != ']') {
3161 warnx("missing \"]\" after \"[%c\" on line %zd",
3166 /* Skip whitespace. */
3167 while (isspace(*line))
3171 * Rest of the rule: <expr> => <settings>
3174 s = strstr(line, "=>");
3178 while (isspace(*settings))
3183 * <expr> is either a special name (all, any) or a pcap-filter(7).
3184 * In case of a special name the bpf_prog stays all-zero.
3186 if (!special_offload_rule(expr)) {
3187 if (pcap_compile(pd, &r->bpf_prog, expr, 1,
3188 PCAP_NETMASK_UNKNOWN) < 0) {
3189 warnx("failed to compile \"%s\" on line %zd: %s", expr,
3190 lno, pcap_geterr(pd));
3195 /* settings to apply on a match. */
3196 if (parse_offload_settings(settings, &r->settings) != 0) {
3197 warnx("failed to parse offload settings \"%s\" on line %zd",
3199 pcap_freecode(&r->bpf_prog);
3208 * Note that op itself is not dynamically allocated.
3211 free_offload_policy(struct t4_offload_policy *op)
3215 for (i = 0; i < op->nrules; i++) {
3217 * pcap_freecode can cope with empty bpf_prog, which is the case
3218 * for an rule that matches on 'any/all/-'.
3220 pcap_freecode(&op->rule[i].bpf_prog);
3227 #define REALLOC_STRIDE 32
3230 * Fills up op->nrules and op->rule.
3233 parse_offload_policy(const char *fname, struct t4_offload_policy *op)
3237 int lno, maxrules, rc;
3239 struct offload_rule *r;
3242 fp = fopen(fname, "r");
3244 warn("Unable to open file \"%s\"", fname);
3247 pd = pcap_open_dead(DLT_EN10MB, 128);
3249 warnx("Failed to open pcap device");
3262 while ((llen = getline(&line, &lcap, fp)) != -1) {
3265 /* Skip empty lines. */
3266 if (isempty_line(line, llen))
3269 if (op->nrules == maxrules) {
3270 maxrules += REALLOC_STRIDE;
3271 r = realloc(op->rule,
3272 maxrules * sizeof(struct offload_rule));
3274 warnx("failed to allocate memory for %d rules",
3282 r = &op->rule[op->nrules];
3283 rc = parse_offload_policy_line(lno, line, llen, pd, r);
3285 warnx("Error parsing line %d of \"%s\"", lno, fname);
3294 warn("Error while reading from file \"%s\" at line %d",
3300 if (op->nrules == 0) {
3301 warnx("No valid rules found in \"%s\"", fname);
3308 free_offload_policy(op);
3315 load_offload_policy(int argc, const char *argv[])
3318 const char *fname = argv[0];
3319 struct t4_offload_policy op = {0};
3322 warnx("incorrect number of arguments.");
3326 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) {
3327 /* op.nrules is 0 and that means clear policy */
3328 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op));
3331 rc = parse_offload_policy(fname, &op);
3333 /* Error message displayed already */
3337 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op);
3338 free_offload_policy(&op);
3344 run_cmd(int argc, const char *argv[])
3347 const char *cmd = argv[0];
3353 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
3354 rc = register_io(argc, argv, 4);
3355 else if (!strcmp(cmd, "reg64"))
3356 rc = register_io(argc, argv, 8);
3357 else if (!strcmp(cmd, "regdump"))
3358 rc = dump_regs(argc, argv);
3359 else if (!strcmp(cmd, "filter"))
3360 rc = filter_cmd(argc, argv);
3361 else if (!strcmp(cmd, "context"))
3362 rc = get_sge_context(argc, argv);
3363 else if (!strcmp(cmd, "loadfw"))
3364 rc = loadfw(argc, argv);
3365 else if (!strcmp(cmd, "memdump"))
3366 rc = memdump(argc, argv);
3367 else if (!strcmp(cmd, "tcb"))
3368 rc = read_tcb(argc, argv);
3369 else if (!strcmp(cmd, "i2c"))
3370 rc = read_i2c(argc, argv);
3371 else if (!strcmp(cmd, "clearstats"))
3372 rc = clearstats(argc, argv);
3373 else if (!strcmp(cmd, "tracer"))
3374 rc = tracer_cmd(argc, argv);
3375 else if (!strcmp(cmd, "modinfo"))
3376 rc = modinfo(argc, argv);
3377 else if (!strcmp(cmd, "sched-class"))
3378 rc = sched_class(argc, argv);
3379 else if (!strcmp(cmd, "sched-queue"))
3380 rc = sched_queue(argc, argv);
3381 else if (!strcmp(cmd, "loadcfg"))
3382 rc = loadcfg(argc, argv);
3383 else if (!strcmp(cmd, "loadboot"))
3384 rc = loadboot(argc, argv);
3385 else if (!strcmp(cmd, "loadboot-cfg"))
3386 rc = loadbootcfg(argc, argv);
3387 else if (!strcmp(cmd, "dumpstate"))
3388 rc = dumpstate(argc, argv);
3389 else if (!strcmp(cmd, "policy"))
3390 rc = load_offload_policy(argc, argv);
3393 warnx("invalid command \"%s\"", cmd);
3404 char buffer[128], *buf;
3405 const char *args[MAX_ARGS + 1];
3408 * Simple loop: displays a "> " prompt and processes any input as a
3409 * cxgbetool command. You're supposed to enter only the part after
3410 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
3413 fprintf(stdout, "> ");
3415 buf = fgets(buffer, sizeof(buffer), stdin);
3417 if (ferror(stdin)) {
3418 warn("stdin error");
3419 rc = errno; /* errno from fgets */
3425 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
3426 if (args[i][0] != 0 && ++i == MAX_ARGS)
3432 continue; /* skip empty line */
3434 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
3437 rc = run_cmd(i, args);
3440 /* rc normally comes from the last command (not including quit/exit) */
3445 main(int argc, const char *argv[])
3452 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
3465 /* progname and nexus */
3469 if (argc == 1 && !strcmp(argv[0], "stdio"))
3470 rc = run_cmd_loop();
3472 rc = run_cmd(argc, argv);