2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/ioctl.h>
34 #include <sys/socket.h>
37 #include <arpa/inet.h>
38 #include <net/ethernet.h>
39 #include <net/sff8472.h>
40 #include <netinet/in.h>
55 #include "tcb_common.h"
57 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
58 #define max(x, y) ((x) > (y) ? (x) : (y))
60 static const char *progname, *nexus;
61 static int chip_id; /* 4 for T4, 5 for T5 */
71 const struct reg_info *ri;
75 const char *name; /* Field name */
76 unsigned short start; /* Start bit position */
77 unsigned short end; /* End bit position */
78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
79 unsigned char hex; /* Print field in hex instead of decimal */
80 unsigned char islog2; /* Field contains the base-2 log of the value */
83 #include "reg_defs_t4.c"
84 #include "reg_defs_t5.c"
85 #include "reg_defs_t6.c"
86 #include "reg_defs_t4vf.c"
91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
93 "\tclearstats <port> clear port statistics\n"
94 "\tcontext <type> <id> show an SGE context\n"
95 "\tdumpstate <dump.bin> dump chip state\n"
96 "\tfilter <idx> [<param> <val>] ... set a filter\n"
97 "\tfilter <idx> delete|clear [prio 1] delete a filter\n"
98 "\tfilter list list all filters\n"
99 "\tfilter mode [<match>] ... get/set global filter mode\n"
100 "\thashfilter [<param> <val>] ... set a hashfilter\n"
101 "\thashfilter <idx> delete|clear delete a hashfilter\n"
102 "\thashfilter list list all hashfilters\n"
103 "\thashfilter mode get global hashfilter mode\n"
104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n"
106 "\tloadboot clear [pf|offset <val>] remove boot image\n"
107 "\tloadboot-cfg <bc.bin> install boot config\n"
108 "\tloadboot-cfg clear remove boot config\n"
109 "\tloadcfg <fw-config.txt> install configuration file\n"
110 "\tloadcfg clear remove configuration file\n"
111 "\tloadfw <fw-image.bin> install firmware\n"
112 "\tmemdump <addr> <len> dump a memory range\n"
113 "\tmodinfo <port> [raw] optics/cable information\n"
114 "\tpolicy <policy.txt> install offload policy\n"
115 "\tpolicy clear remove offload policy\n"
116 "\treg <address>[=<val>] read/write register\n"
117 "\treg64 <address>[=<val>] read/write 64 bit register\n"
118 "\tregdump [<module>] ... dump registers\n"
119 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
121 "\tstdio interactive mode\n"
122 "\ttcb <tid> read TCB\n"
123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
124 "\ttracer <idx> disable|enable disable or enable a tracer\n"
125 "\ttracer list list all tracers\n"
129 static inline unsigned int
130 get_card_vers(unsigned int version)
132 return (version & 0x3ff);
136 real_doit(unsigned long cmd, void *data, const char *cmdstr)
144 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
145 if ((fd = open(buf, O_RDWR)) < 0) {
146 warn("open(%s)", nexus);
152 rc = ioctl(fd, cmd, data);
160 #define doit(x, y) real_doit(x, y, #x)
163 str_to_number(const char *s, long *val, long long *vall)
168 *vall = strtoll(s, &p, 0);
170 *val = strtol(s, &p, 0);
178 read_reg(long addr, int size, long long *val)
183 reg.addr = (uint32_t) addr;
184 reg.size = (uint32_t) size;
187 rc = doit(CHELSIO_T4_GETREG, ®);
195 write_reg(long addr, int size, long long val)
199 reg.addr = (uint32_t) addr;
200 reg.size = (uint32_t) size;
201 reg.val = (uint64_t) val;
203 return doit(CHELSIO_T4_SETREG, ®);
207 register_io(int argc, const char *argv[], int size)
215 /* <reg> OR <reg>=<value> */
217 p = str_to_number(argv[0], &addr, NULL);
220 warnx("invalid register \"%s\"", argv[0]);
226 p = str_to_number(v, NULL, &val);
229 warnx("invalid value \"%s\"", v);
234 } else if (argc == 2) {
239 p = str_to_number(argv[0], &addr, NULL);
241 warnx("invalid register \"%s\"", argv[0]);
245 p = str_to_number(argv[1], NULL, &val);
247 warnx("invalid value \"%s\"", argv[1]);
251 warnx("reg: invalid number of arguments (%d)", argc);
256 rc = write_reg(addr, size, val);
258 rc = read_reg(addr, size, &val);
260 printf("0x%llx [%llu]\n", val, val);
266 static inline uint32_t
267 xtract(uint32_t val, int shift, int len)
269 return (val >> shift) & ((1 << len) - 1);
273 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
275 uint32_t reg_val = 0;
277 for ( ; reg_array->name; ++reg_array)
278 if (!reg_array->len) {
279 reg_val = regs[reg_array->addr / 4];
280 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
281 reg_array->name, reg_val, reg_val);
283 uint32_t v = xtract(reg_val, reg_array->addr,
286 printf(" %*u:%u %-47s %#-10x %u\n",
287 reg_array->addr < 10 ? 3 : 2,
288 reg_array->addr + reg_array->len - 1,
289 reg_array->addr, reg_array->name, v, v);
296 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
297 const struct mod_regs *modtab, int nmodules)
301 for (i = 0; i < argc; i++) {
302 for (j = 0; j < nmodules; j++) {
303 if (!strcmp(argv[i], modtab[j].name))
308 warnx("invalid register block \"%s\"", argv[i]);
309 fprintf(stderr, "\nAvailable blocks:");
310 for ( ; nmodules; nmodules--, modtab++)
311 fprintf(stderr, " %s", modtab->name);
312 fprintf(stderr, "\n");
317 for ( ; nmodules; nmodules--, modtab++) {
319 match = argc == 0 ? 1 : 0;
320 for (i = 0; !match && i < argc; i++) {
321 if (!strcmp(argv[i], modtab->name))
326 dump_block_regs(modtab->ri, regs);
332 #define T4_MODREGS(name) { #name, t4_##name##_regs }
334 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
336 static struct mod_regs t4_mod[] = {
338 { "pci", t4_pcie_regs },
342 { "edc0", t4_edc_0_regs },
343 { "edc1", t4_edc_1_regs },
348 { "pmrx", t4_pm_rx_regs },
349 { "pmtx", t4_pm_tx_regs },
351 { "cplsw", t4_cpl_switch_regs },
353 { "i2c", t4_i2cm_regs },
364 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
368 #define T5_MODREGS(name) { #name, t5_##name##_regs }
370 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
372 static struct mod_regs t5_mod[] = {
374 { "pci", t5_pcie_regs },
376 { "mc0", t5_mc_0_regs },
377 { "mc1", t5_mc_1_regs },
379 { "edc0", t5_edc_t50_regs },
380 { "edc1", t5_edc_t51_regs },
383 { "ulprx", t5_ulp_rx_regs },
384 { "ulptx", t5_ulp_tx_regs },
385 { "pmrx", t5_pm_rx_regs },
386 { "pmtx", t5_pm_tx_regs },
388 { "cplsw", t5_cpl_switch_regs },
390 { "i2c", t5_i2cm_regs },
399 { "hma", t5_hma_t5_regs }
402 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
406 #define T6_MODREGS(name) { #name, t6_##name##_regs }
408 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
410 static struct mod_regs t6_mod[] = {
412 { "pci", t6_pcie_regs },
414 { "mc0", t6_mc_0_regs },
416 { "edc0", t6_edc_t60_regs },
417 { "edc1", t6_edc_t61_regs },
420 { "ulprx", t6_ulp_rx_regs },
421 { "ulptx", t6_ulp_tx_regs },
422 { "pmrx", t6_pm_rx_regs },
423 { "pmtx", t6_pm_tx_regs },
425 { "cplsw", t6_cpl_switch_regs },
427 { "i2c", t6_i2cm_regs },
436 { "hma", t6_hma_t6_regs }
439 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
444 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
446 static struct mod_regs t4vf_mod[] = {
447 { "sge", t4vf_sge_regs },
448 { "mps", t4vf_mps_regs },
449 { "pl", t4vf_pl_regs },
450 { "mbdata", t4vf_mbdata_regs },
451 { "cim", t4vf_cim_regs },
454 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
458 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
460 static struct mod_regs t5vf_mod[] = {
461 { "sge", t5vf_sge_regs },
462 { "mps", t4vf_mps_regs },
463 { "pl", t5vf_pl_regs },
464 { "mbdata", t4vf_mbdata_regs },
465 { "cim", t4vf_cim_regs },
468 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
472 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
474 static struct mod_regs t6vf_mod[] = {
475 { "sge", t5vf_sge_regs },
476 { "mps", t4vf_mps_regs },
477 { "pl", t6vf_pl_regs },
478 { "mbdata", t4vf_mbdata_regs },
479 { "cim", t4vf_cim_regs },
482 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
486 dump_regs(int argc, const char *argv[])
488 int vers, revision, rc;
489 struct t4_regdump regs;
492 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
493 regs.data = calloc(1, len);
494 if (regs.data == NULL) {
495 warnc(ENOMEM, "regdump");
500 rc = doit(CHELSIO_T4_REGDUMP, ®s);
504 vers = get_card_vers(regs.version);
505 revision = (regs.version >> 10) & 0x3f;
508 if (revision == 0x3f)
509 rc = dump_regs_t4vf(argc, argv, regs.data);
511 rc = dump_regs_t4(argc, argv, regs.data);
512 } else if (vers == 5) {
513 if (revision == 0x3f)
514 rc = dump_regs_t5vf(argc, argv, regs.data);
516 rc = dump_regs_t5(argc, argv, regs.data);
517 } else if (vers == 6) {
518 if (revision == 0x3f)
519 rc = dump_regs_t6vf(argc, argv, regs.data);
521 rc = dump_regs_t6(argc, argv, regs.data);
523 warnx("%s (type %d, rev %d) is not a known card.",
524 nexus, vers, revision);
533 do_show_info_header(uint32_t mode)
537 printf("%4s %8s", "Idx", "Hits");
538 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
549 if (mode & T4_FILTER_IC_VNIC)
550 printf(" VFvld:PF:VF");
552 printf(" vld:oVLAN");
559 case T4_FILTER_IP_TOS:
563 case T4_FILTER_IP_PROTO:
567 case T4_FILTER_ETH_TYPE:
571 case T4_FILTER_MAC_IDX:
575 case T4_FILTER_MPS_HIT_TYPE:
579 case T4_FILTER_IP_FRAGMENT:
584 /* compressed filter field not enabled */
588 printf(" %20s %20s %9s %9s %s\n",
589 "DIP", "SIP", "DPORT", "SPORT", "Action");
593 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
594 * ordered tuple. If the parameter name in the argument sub-vector does not
595 * match the passed in parameter name, then a zero is returned for the
596 * function and no parsing is performed. If there is a match, then the value
597 * and optional mask are parsed and returned in the provided return value
598 * pointers. If no optional mask is specified, then a default mask of all 1s
601 * An error in parsing the value[:mask] will result in an error message and
602 * program termination.
605 parse_val_mask(const char *param, const char *args[], uint32_t *val,
606 uint32_t *mask, int hashfilter)
611 if (strcmp(param, args[0]) != 0)
614 p = str_to_number(args[1], &l, NULL);
615 if (l >= 0 && l <= UINT32_MAX) {
623 if (p[0] == ':' && p[1] != 0) {
625 warnx("param %s: mask not allowed for "
626 "hashfilter or nat params", param);
629 p = str_to_number(p + 1, &l, NULL);
630 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) {
638 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
645 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
646 * ordered tuple. If the parameter name in the argument sub-vector does not
647 * match the passed in parameter name, then a zero is returned for the
648 * function and no parsing is performed. If there is a match, then the value
649 * and optional mask are parsed and returned in the provided return value
650 * pointers. If no optional mask is specified, then a default mask of all 1s
653 * The value return parameter "afp" is used to specify the expected address
654 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
655 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
656 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
657 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
658 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
659 * returned in the first four bytes of the address and mask return values with
660 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
661 * 1, 2, 3}, respectively.
663 * An error in parsing the value[:mask] will result in an error message and
664 * program termination.
667 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
668 uint8_t mask[], int maskless)
670 const char *colon, *afn;
674 unsigned int masksize;
677 * Is this our parameter?
679 if (strcmp(param, args[0]) != 0)
683 * Fundamental IPv4 versus IPv6 selection.
685 colon = strchr(args[1], ':');
695 if (*afp == AF_UNSPEC)
697 else if (*afp != af) {
698 warnx("address %s is not of expected family %s",
699 args[1], *afp == AF_INET ? "IP" : "IPv6");
704 * Parse address (temporarily stripping off any "/mask"
707 slash = strchr(args[1], '/');
710 ret = inet_pton(af, args[1], addr);
714 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
719 * Parse optional mask specification.
723 unsigned int prefix = strtoul(slash + 1, &p, 10);
726 warnx("mask cannot be provided for maskless specification");
730 if (p == slash + 1) {
731 warnx("missing address prefix for %s", param);
735 warnx("%s is not a valid address prefix", slash + 1);
738 if (prefix > masksize) {
739 warnx("prefix %u is too long for an %s address",
743 memset(mask, 0, masksize / 8);
751 for (m = mask; masksize >= 8; m++, masksize -= 8)
754 *m = ~0 << (8 - masksize);
761 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
762 * tuple. If the parameter name in the argument sub-vector does not match the
763 * passed in parameter name, then a zero is returned for the function and no
764 * parsing is performed. If there is a match, then the value is parsed and
765 * returned in the provided return value pointer.
768 parse_val(const char *param, const char *args[], uint32_t *val)
773 if (strcmp(param, args[0]) != 0)
776 p = str_to_number(args[1], &l, NULL);
777 if (*p || l < 0 || l > UINT32_MAX) {
778 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
787 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
798 for (octet = 0; octet < noctets; octet++)
799 printf("%02x", addr[octet]);
801 for (octet = 0; octet < noctets; octet++)
802 printf("%02x", addrm[octet]);
806 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
810 printf("%4d", t->idx);
811 if (t->hits == UINT64_MAX)
814 printf(" %8ju", t->hits);
817 * Compressed header portion of filter.
819 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
822 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
826 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
830 if (mode & T4_FILTER_IC_VNIC) {
831 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
833 (t->fs.val.vnic >> 13) & 0x7,
834 t->fs.val.vnic & 0x1fff,
836 (t->fs.mask.vnic >> 13) & 0x7,
837 t->fs.mask.vnic & 0x1fff);
839 printf(" %1d:%04x/%1d:%04x",
840 t->fs.val.ovlan_vld, t->fs.val.vnic,
841 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
846 printf(" %1d:%04x/%1d:%04x",
847 t->fs.val.vlan_vld, t->fs.val.vlan,
848 t->fs.mask.vlan_vld, t->fs.mask.vlan);
851 case T4_FILTER_IP_TOS:
852 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
855 case T4_FILTER_IP_PROTO:
856 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
859 case T4_FILTER_ETH_TYPE:
860 printf(" %04x/%04x", t->fs.val.ethtype,
864 case T4_FILTER_MAC_IDX:
865 printf(" %03x/%03x", t->fs.val.macidx,
869 case T4_FILTER_MPS_HIT_TYPE:
870 printf(" %1x/%1x", t->fs.val.matchtype,
871 t->fs.mask.matchtype);
874 case T4_FILTER_IP_FRAGMENT:
875 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
879 /* compressed filter field not enabled */
885 * Fixed portion of filter.
887 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
888 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
889 printf(" %04x/%04x %04x/%04x",
890 t->fs.val.dport, t->fs.mask.dport,
891 t->fs.val.sport, t->fs.mask.sport);
894 * Variable length filter action.
896 if (t->fs.action == FILTER_DROP)
898 else if (t->fs.action == FILTER_SWITCH) {
899 printf(" Switch: port=%d", t->fs.eport);
902 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
904 t->fs.dmac[0], t->fs.dmac[1],
905 t->fs.dmac[2], t->fs.dmac[3],
906 t->fs.dmac[4], t->fs.dmac[5],
910 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
912 t->fs.smac[0], t->fs.smac[1],
913 t->fs.smac[2], t->fs.smac[3],
914 t->fs.smac[4], t->fs.smac[5],
916 if (t->fs.newvlan == VLAN_REMOVE)
917 printf(", vlan=none");
918 else if (t->fs.newvlan == VLAN_INSERT)
919 printf(", vlan=insert(%x)", t->fs.vlan);
920 else if (t->fs.newvlan == VLAN_REWRITE)
921 printf(", vlan=rewrite(%x)", t->fs.vlan);
924 if (t->fs.dirsteer == 0) {
927 printf("(region %d)", t->fs.iq << 1);
929 printf("%d", t->fs.iq);
930 if (t->fs.dirsteerhash == 0)
936 if (chip_id <= 5 && t->fs.prio)
944 show_filters(int hash)
946 uint32_t mode = 0, header, hpfilter = 0;
950 /* Get the global filter mode first */
951 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
955 if (!hash && chip_id >= 6) {
957 bzero(&t, sizeof (t));
961 for (t.idx = 0; ; t.idx++) {
962 rc = doit(CHELSIO_T4_GET_FILTER, &t);
963 if (rc != 0 || t.idx == 0xffffffff)
967 printf("High Priority TCAM Region:\n");
968 do_show_info_header(mode);
972 do_show_one_filter_info(&t, mode);
977 bzero(&t, sizeof (t));
980 for (t.idx = 0; ; t.idx++) {
981 rc = doit(CHELSIO_T4_GET_FILTER, &t);
982 if (rc != 0 || t.idx == 0xffffffff)
987 printf("\nNormal Priority TCAM Region:\n");
988 do_show_info_header(mode);
991 do_show_one_filter_info(&t, mode);
998 get_filter_mode(int hashfilter)
1000 uint32_t mode = hashfilter;
1003 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
1007 if (mode & T4_FILTER_IPv4)
1010 if (mode & T4_FILTER_IPv6)
1013 if (mode & T4_FILTER_IP_SADDR)
1016 if (mode & T4_FILTER_IP_DADDR)
1019 if (mode & T4_FILTER_IP_SPORT)
1022 if (mode & T4_FILTER_IP_DPORT)
1025 if (mode & T4_FILTER_IP_FRAGMENT)
1028 if (mode & T4_FILTER_MPS_HIT_TYPE)
1029 printf("matchtype ");
1031 if (mode & T4_FILTER_MAC_IDX)
1034 if (mode & T4_FILTER_ETH_TYPE)
1037 if (mode & T4_FILTER_IP_PROTO)
1040 if (mode & T4_FILTER_IP_TOS)
1043 if (mode & T4_FILTER_VLAN)
1046 if (mode & T4_FILTER_VNIC) {
1047 if (mode & T4_FILTER_IC_VNIC)
1053 if (mode & T4_FILTER_PORT)
1056 if (mode & T4_FILTER_FCoE)
1065 set_filter_mode(int argc, const char *argv[])
1068 int vnic = 0, ovlan = 0;
1070 for (; argc; argc--, argv++) {
1071 if (!strcmp(argv[0], "frag"))
1072 mode |= T4_FILTER_IP_FRAGMENT;
1074 if (!strcmp(argv[0], "matchtype"))
1075 mode |= T4_FILTER_MPS_HIT_TYPE;
1077 if (!strcmp(argv[0], "macidx"))
1078 mode |= T4_FILTER_MAC_IDX;
1080 if (!strcmp(argv[0], "ethtype"))
1081 mode |= T4_FILTER_ETH_TYPE;
1083 if (!strcmp(argv[0], "proto"))
1084 mode |= T4_FILTER_IP_PROTO;
1086 if (!strcmp(argv[0], "tos"))
1087 mode |= T4_FILTER_IP_TOS;
1089 if (!strcmp(argv[0], "vlan"))
1090 mode |= T4_FILTER_VLAN;
1092 if (!strcmp(argv[0], "ovlan")) {
1093 mode |= T4_FILTER_VNIC;
1097 if (!strcmp(argv[0], "vnic_id")) {
1098 mode |= T4_FILTER_VNIC;
1099 mode |= T4_FILTER_IC_VNIC;
1103 if (!strcmp(argv[0], "iport"))
1104 mode |= T4_FILTER_PORT;
1106 if (!strcmp(argv[0], "fcoe"))
1107 mode |= T4_FILTER_FCoE;
1110 if (vnic > 0 && ovlan > 0) {
1111 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1115 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1119 del_filter(uint32_t idx, int prio, int hashfilter)
1124 t.fs.hash = hashfilter;
1127 return doit(CHELSIO_T4_DEL_FILTER, &t);
1130 #define MAX_VLANID (4095)
1133 set_filter(uint32_t idx, int argc, const char *argv[], int hash)
1135 int rc, af = AF_UNSPEC, start_arg = 0;
1139 warnc(EINVAL, "%s", __func__);
1142 bzero(&t, sizeof (t));
1147 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1148 const char **args = &argv[start_arg];
1151 if (!strcmp(argv[start_arg], "type")) {
1153 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1155 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1158 warnx("invalid type \"%s\"; "
1159 "must be one of \"ipv4\" or \"ipv6\"",
1160 argv[start_arg + 1]);
1164 if (af != AF_UNSPEC && af != newaf) {
1165 warnx("conflicting IPv4/IPv6 specifications.");
1169 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) {
1170 t.fs.val.fcoe = val;
1171 t.fs.mask.fcoe = mask;
1172 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) {
1173 t.fs.val.iport = val;
1174 t.fs.mask.iport = mask;
1175 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) {
1176 t.fs.val.vnic = val;
1177 t.fs.mask.vnic = mask;
1178 t.fs.val.ovlan_vld = 1;
1179 t.fs.mask.ovlan_vld = 1;
1180 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) {
1181 t.fs.val.vlan = val;
1182 t.fs.mask.vlan = mask;
1183 t.fs.val.vlan_vld = 1;
1184 t.fs.mask.vlan_vld = 1;
1185 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) {
1186 t.fs.val.vnic &= 0x1fff;
1187 t.fs.val.vnic |= (val & 0x7) << 13;
1188 t.fs.mask.vnic &= 0x1fff;
1189 t.fs.mask.vnic |= (mask & 0x7) << 13;
1190 t.fs.val.pfvf_vld = 1;
1191 t.fs.mask.pfvf_vld = 1;
1192 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) {
1193 t.fs.val.vnic &= 0xe000;
1194 t.fs.val.vnic |= val & 0x1fff;
1195 t.fs.mask.vnic &= 0xe000;
1196 t.fs.mask.vnic |= mask & 0x1fff;
1197 t.fs.val.pfvf_vld = 1;
1198 t.fs.mask.pfvf_vld = 1;
1199 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) {
1201 t.fs.mask.tos = mask;
1202 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) {
1203 t.fs.val.proto = val;
1204 t.fs.mask.proto = mask;
1205 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) {
1206 t.fs.val.ethtype = val;
1207 t.fs.mask.ethtype = mask;
1208 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) {
1209 t.fs.val.macidx = val;
1210 t.fs.mask.macidx = mask;
1211 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) {
1212 t.fs.val.matchtype = val;
1213 t.fs.mask.matchtype = mask;
1214 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) {
1215 t.fs.val.frag = val;
1216 t.fs.mask.frag = mask;
1217 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) {
1218 t.fs.val.dport = val;
1219 t.fs.mask.dport = mask;
1220 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) {
1221 t.fs.val.sport = val;
1222 t.fs.mask.sport = mask;
1223 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1224 t.fs.mask.dip, hash)) {
1226 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1227 t.fs.mask.sip, hash)) {
1229 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) {
1231 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) {
1233 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) {
1234 t.fs.nat_dport = val;
1235 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) {
1236 t.fs.nat_sport = val;
1237 } else if (!strcmp(argv[start_arg], "action")) {
1238 if (!strcmp(argv[start_arg + 1], "pass"))
1239 t.fs.action = FILTER_PASS;
1240 else if (!strcmp(argv[start_arg + 1], "drop"))
1241 t.fs.action = FILTER_DROP;
1242 else if (!strcmp(argv[start_arg + 1], "switch"))
1243 t.fs.action = FILTER_SWITCH;
1245 warnx("invalid action \"%s\"; must be one of"
1246 " \"pass\", \"drop\" or \"switch\"",
1247 argv[start_arg + 1]);
1250 } else if (!parse_val("hitcnts", args, &val)) {
1252 } else if (!parse_val("prio", args, &val)) {
1254 warnx("Hashfilters doesn't support \"prio\"\n");
1257 if (val != 0 && val != 1) {
1258 warnx("invalid priority \"%s\"; must be"
1259 " \"0\" or \"1\"", argv[start_arg + 1]);
1263 } else if (!parse_val("rpttid", args, &val)) {
1265 } else if (!parse_val("queue", args, &val)) {
1266 t.fs.dirsteer = 1; /* direct steer */
1267 t.fs.iq = val; /* to the iq with this cntxt_id */
1268 } else if (!parse_val("tcbhash", args, &val)) {
1269 t.fs.dirsteerhash = 1; /* direct steer */
1270 /* XXX: use (val << 1) as the rss_hash? */
1272 } else if (!parse_val("tcbrss", args, &val)) {
1273 t.fs.maskhash = 1; /* steer to RSS region */
1275 * val = start idx of the region but the internal TCB
1276 * field is 10b only and is left shifted by 1 before use.
1279 } else if (!parse_val("eport", args, &val)) {
1281 } else if (!parse_val("swapmac", args, &val)) {
1283 } else if (!strcmp(argv[start_arg], "nat")) {
1284 if (!strcmp(argv[start_arg + 1], "dip"))
1285 t.fs.nat_mode = NAT_MODE_DIP;
1286 else if (!strcmp(argv[start_arg + 1], "dip-dp"))
1287 t.fs.nat_mode = NAT_MODE_DIP_DP;
1288 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip"))
1289 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP;
1290 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp"))
1291 t.fs.nat_mode = NAT_MODE_DIP_DP_SP;
1292 else if (!strcmp(argv[start_arg + 1], "sip-sp"))
1293 t.fs.nat_mode = NAT_MODE_SIP_SP;
1294 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp"))
1295 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP;
1296 else if (!strcmp(argv[start_arg + 1], "all"))
1297 t.fs.nat_mode = NAT_MODE_ALL;
1299 warnx("unknown nat type \"%s\"; known types are dip, "
1300 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, "
1301 "dip-sip-sp, and all", argv[start_arg + 1]);
1304 } else if (!parse_val("natseq", args, &val)) {
1305 t.fs.nat_seq_chk = val;
1306 } else if (!parse_val("natflag", args, &val)) {
1307 t.fs.nat_flag_chk = 1;
1308 } else if (!strcmp(argv[start_arg], "dmac")) {
1309 struct ether_addr *daddr;
1311 daddr = ether_aton(argv[start_arg + 1]);
1312 if (daddr == NULL) {
1313 warnx("invalid dmac address \"%s\"",
1314 argv[start_arg + 1]);
1317 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1319 } else if (!strcmp(argv[start_arg], "smac")) {
1320 struct ether_addr *saddr;
1322 saddr = ether_aton(argv[start_arg + 1]);
1323 if (saddr == NULL) {
1324 warnx("invalid smac address \"%s\"",
1325 argv[start_arg + 1]);
1328 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1330 } else if (!strcmp(argv[start_arg], "vlan")) {
1332 if (!strcmp(argv[start_arg + 1], "none")) {
1333 t.fs.newvlan = VLAN_REMOVE;
1334 } else if (argv[start_arg + 1][0] == '=') {
1335 t.fs.newvlan = VLAN_REWRITE;
1336 } else if (argv[start_arg + 1][0] == '+') {
1337 t.fs.newvlan = VLAN_INSERT;
1339 warnx("unknown vlan parameter \"%s\"; must"
1340 " be one of \"none\", \"=<vlan>\", "
1341 " \"+<vlan>\"", argv[start_arg + 1]);
1344 if (t.fs.newvlan == VLAN_REWRITE ||
1345 t.fs.newvlan == VLAN_INSERT) {
1346 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1348 if (p == argv[start_arg + 1] + 1 || p[0] != 0 ||
1349 t.fs.vlan > MAX_VLANID) {
1350 warnx("invalid vlan \"%s\"",
1351 argv[start_arg + 1]);
1356 warnx("invalid parameter \"%s\"", argv[start_arg]);
1360 if (start_arg != argc) {
1361 warnx("no value for \"%s\"", argv[start_arg]);
1366 * Check basic sanity of option combinations.
1368 if (t.fs.action != FILTER_SWITCH &&
1369 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan ||
1370 t.fs.swapmac || t.fs.nat_mode)) {
1371 warnx("port, dmac, smac, vlan, and nat only make sense with"
1372 " \"action switch\"");
1375 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk ||
1376 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) {
1377 warnx("nat params only make sense with valid nat mode");
1380 if (t.fs.action != FILTER_PASS &&
1381 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1382 warnx("rpttid, queue and tcbhash don't make sense with"
1383 " action \"drop\" or \"switch\"");
1386 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1387 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1391 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1392 rc = doit(CHELSIO_T4_SET_FILTER, &t);
1393 if (hash && rc == 0)
1394 printf("%d\n", t.idx);
1399 filter_cmd(int argc, const char *argv[], int hashfilter)
1406 warnx("%sfilter: no arguments.", hashfilter ? "hash" : "");
1411 if (strcmp(argv[0], "list") == 0) {
1413 warnx("trailing arguments after \"list\" ignored.");
1415 return show_filters(hashfilter);
1419 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1420 return get_filter_mode(hashfilter);
1423 if (!hashfilter && strcmp(argv[0], "mode") == 0)
1424 return set_filter_mode(argc - 1, argv + 1);
1427 s = str_to_number(argv[0], NULL, &val);
1428 if (*s || val < 0 || val > 0xffffffffU) {
1431 * No numeric index means this must be a request to
1432 * create a new hashfilter and we are already at the
1433 * paramter/value list.
1435 idx = (uint32_t) -1;
1438 warnx("\"%s\" is neither an index nor a filter subcommand.",
1442 idx = (uint32_t) val;
1444 /* <idx> delete|clear [prio 0|1] */
1445 if ((argc == 2 || argc == 4) &&
1446 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1451 warnx("stray arguments after \"%s\".", argv[1]);
1455 if (strcmp(argv[2], "prio") != 0) {
1456 warnx("\"prio\" is the only valid keyword "
1457 "after \"%s\", found \"%s\" instead.",
1462 s = str_to_number(argv[3], NULL, &val);
1463 if (*s || val < 0 || val > 1) {
1464 warnx("%s \"%s\"; must be \"0\" or \"1\".",
1470 return del_filter(idx, prio, hashfilter);
1478 /* [<param> <val>] ... */
1479 return set_filter(idx, argc, argv, hashfilter);
1483 * Shows the fields of a multi-word structure. The structure is considered to
1484 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1485 * whose fields are described by @fd. The 32-bit words are given in @words
1486 * starting with the least significant 32-bit word.
1489 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1492 const struct field_desc *p;
1494 for (p = fd; p->name; p++)
1495 w = max(w, strlen(p->name));
1498 unsigned long long data;
1499 int first_word = fd->start / 32;
1500 int shift = fd->start % 32;
1501 int width = fd->end - fd->start + 1;
1502 unsigned long long mask = (1ULL << width) - 1;
1504 data = (words[first_word] >> shift) |
1505 ((uint64_t)words[first_word + 1] << (32 - shift));
1507 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1511 printf("%-*s ", w, fd->name);
1512 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1517 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1518 #define FIELD1(name, start) FIELD(name, start, start)
1521 show_t5t6_ctxt(const struct t4_sge_context *p, int vers)
1523 static struct field_desc egress_t5[] = {
1524 FIELD("DCA_ST:", 181, 191),
1525 FIELD1("StatusPgNS:", 180),
1526 FIELD1("StatusPgRO:", 179),
1527 FIELD1("FetchNS:", 178),
1528 FIELD1("FetchRO:", 177),
1529 FIELD1("Valid:", 176),
1530 FIELD("PCIeDataChannel:", 174, 175),
1531 FIELD1("StatusPgTPHintEn:", 173),
1532 FIELD("StatusPgTPHint:", 171, 172),
1533 FIELD1("FetchTPHintEn:", 170),
1534 FIELD("FetchTPHint:", 168, 169),
1535 FIELD1("FCThreshOverride:", 167),
1536 { "WRLength:", 162, 166, 9, 0, 1 },
1537 FIELD1("WRLengthKnown:", 161),
1538 FIELD1("ReschedulePending:", 160),
1539 FIELD1("OnChipQueue:", 159),
1540 FIELD1("FetchSizeMode:", 158),
1541 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1542 FIELD1("FLMPacking:", 155),
1543 FIELD("FetchBurstMax:", 153, 154),
1544 FIELD("uPToken:", 133, 152),
1545 FIELD1("uPTokenEn:", 132),
1546 FIELD1("UserModeIO:", 131),
1547 FIELD("uPFLCredits:", 123, 130),
1548 FIELD1("uPFLCreditEn:", 122),
1549 FIELD("FID:", 111, 121),
1550 FIELD("HostFCMode:", 109, 110),
1551 FIELD1("HostFCOwner:", 108),
1552 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1553 FIELD("CIDX:", 89, 104),
1554 FIELD("PIDX:", 73, 88),
1555 { "BaseAddress:", 18, 72, 9, 1 },
1556 FIELD("QueueSize:", 2, 17),
1557 FIELD1("QueueType:", 1),
1558 FIELD1("CachePriority:", 0),
1561 static struct field_desc egress_t6[] = {
1562 FIELD("DCA_ST:", 181, 191),
1563 FIELD1("StatusPgNS:", 180),
1564 FIELD1("StatusPgRO:", 179),
1565 FIELD1("FetchNS:", 178),
1566 FIELD1("FetchRO:", 177),
1567 FIELD1("Valid:", 176),
1568 FIELD1("ReschedulePending_1:", 175),
1569 FIELD1("PCIeDataChannel:", 174),
1570 FIELD1("StatusPgTPHintEn:", 173),
1571 FIELD("StatusPgTPHint:", 171, 172),
1572 FIELD1("FetchTPHintEn:", 170),
1573 FIELD("FetchTPHint:", 168, 169),
1574 FIELD1("FCThreshOverride:", 167),
1575 { "WRLength:", 162, 166, 9, 0, 1 },
1576 FIELD1("WRLengthKnown:", 161),
1577 FIELD1("ReschedulePending:", 160),
1578 FIELD("TimerIx:", 157, 159),
1579 FIELD1("FetchBurstMin:", 156),
1580 FIELD1("FLMPacking:", 155),
1581 FIELD("FetchBurstMax:", 153, 154),
1582 FIELD("uPToken:", 133, 152),
1583 FIELD1("uPTokenEn:", 132),
1584 FIELD1("UserModeIO:", 131),
1585 FIELD("uPFLCredits:", 123, 130),
1586 FIELD1("uPFLCreditEn:", 122),
1587 FIELD("FID:", 111, 121),
1588 FIELD("HostFCMode:", 109, 110),
1589 FIELD1("HostFCOwner:", 108),
1590 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1591 FIELD("CIDX:", 89, 104),
1592 FIELD("PIDX:", 73, 88),
1593 { "BaseAddress:", 18, 72, 9, 1 },
1594 FIELD("QueueSize:", 2, 17),
1595 FIELD1("QueueType:", 1),
1596 FIELD1("FetchSizeMode:", 0),
1599 static struct field_desc fl_t5[] = {
1600 FIELD("DCA_ST:", 181, 191),
1601 FIELD1("StatusPgNS:", 180),
1602 FIELD1("StatusPgRO:", 179),
1603 FIELD1("FetchNS:", 178),
1604 FIELD1("FetchRO:", 177),
1605 FIELD1("Valid:", 176),
1606 FIELD("PCIeDataChannel:", 174, 175),
1607 FIELD1("StatusPgTPHintEn:", 173),
1608 FIELD("StatusPgTPHint:", 171, 172),
1609 FIELD1("FetchTPHintEn:", 170),
1610 FIELD("FetchTPHint:", 168, 169),
1611 FIELD1("FCThreshOverride:", 167),
1612 FIELD1("ReschedulePending:", 160),
1613 FIELD1("OnChipQueue:", 159),
1614 FIELD1("FetchSizeMode:", 158),
1615 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1616 FIELD1("FLMPacking:", 155),
1617 FIELD("FetchBurstMax:", 153, 154),
1618 FIELD1("FLMcongMode:", 152),
1619 FIELD("MaxuPFLCredits:", 144, 151),
1620 FIELD("FLMcontextID:", 133, 143),
1621 FIELD1("uPTokenEn:", 132),
1622 FIELD1("UserModeIO:", 131),
1623 FIELD("uPFLCredits:", 123, 130),
1624 FIELD1("uPFLCreditEn:", 122),
1625 FIELD("FID:", 111, 121),
1626 FIELD("HostFCMode:", 109, 110),
1627 FIELD1("HostFCOwner:", 108),
1628 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1629 FIELD("CIDX:", 89, 104),
1630 FIELD("PIDX:", 73, 88),
1631 { "BaseAddress:", 18, 72, 9, 1 },
1632 FIELD("QueueSize:", 2, 17),
1633 FIELD1("QueueType:", 1),
1634 FIELD1("CachePriority:", 0),
1637 static struct field_desc ingress_t5[] = {
1638 FIELD("DCA_ST:", 143, 153),
1639 FIELD1("ISCSICoalescing:", 142),
1640 FIELD1("Queue_Valid:", 141),
1641 FIELD1("TimerPending:", 140),
1642 FIELD1("DropRSS:", 139),
1643 FIELD("PCIeChannel:", 137, 138),
1644 FIELD1("SEInterruptArmed:", 136),
1645 FIELD1("CongestionMgtEnable:", 135),
1646 FIELD1("NoSnoop:", 134),
1647 FIELD1("RelaxedOrdering:", 133),
1648 FIELD1("GTSmode:", 132),
1649 FIELD1("TPHintEn:", 131),
1650 FIELD("TPHint:", 129, 130),
1651 FIELD1("UpdateScheduling:", 128),
1652 FIELD("UpdateDelivery:", 126, 127),
1653 FIELD1("InterruptSent:", 125),
1654 FIELD("InterruptIDX:", 114, 124),
1655 FIELD1("InterruptDestination:", 113),
1656 FIELD1("InterruptArmed:", 112),
1657 FIELD("RxIntCounter:", 106, 111),
1658 FIELD("RxIntCounterThreshold:", 104, 105),
1659 FIELD1("Generation:", 103),
1660 { "BaseAddress:", 48, 102, 9, 1 },
1661 FIELD("PIDX:", 32, 47),
1662 FIELD("CIDX:", 16, 31),
1663 { "QueueSize:", 4, 15, 4, 0 },
1664 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1665 FIELD1("QueueEntryOverride:", 1),
1666 FIELD1("CachePriority:", 0),
1669 static struct field_desc ingress_t6[] = {
1670 FIELD1("SP_NS:", 158),
1671 FIELD1("SP_RO:", 157),
1672 FIELD1("SP_TPHintEn:", 156),
1673 FIELD("SP_TPHint:", 154, 155),
1674 FIELD("DCA_ST:", 143, 153),
1675 FIELD1("ISCSICoalescing:", 142),
1676 FIELD1("Queue_Valid:", 141),
1677 FIELD1("TimerPending:", 140),
1678 FIELD1("DropRSS:", 139),
1679 FIELD("PCIeChannel:", 137, 138),
1680 FIELD1("SEInterruptArmed:", 136),
1681 FIELD1("CongestionMgtEnable:", 135),
1682 FIELD1("NoSnoop:", 134),
1683 FIELD1("RelaxedOrdering:", 133),
1684 FIELD1("GTSmode:", 132),
1685 FIELD1("TPHintEn:", 131),
1686 FIELD("TPHint:", 129, 130),
1687 FIELD1("UpdateScheduling:", 128),
1688 FIELD("UpdateDelivery:", 126, 127),
1689 FIELD1("InterruptSent:", 125),
1690 FIELD("InterruptIDX:", 114, 124),
1691 FIELD1("InterruptDestination:", 113),
1692 FIELD1("InterruptArmed:", 112),
1693 FIELD("RxIntCounter:", 106, 111),
1694 FIELD("RxIntCounterThreshold:", 104, 105),
1695 FIELD1("Generation:", 103),
1696 { "BaseAddress:", 48, 102, 9, 1 },
1697 FIELD("PIDX:", 32, 47),
1698 FIELD("CIDX:", 16, 31),
1699 { "QueueSize:", 4, 15, 4, 0 },
1700 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1701 FIELD1("QueueEntryOverride:", 1),
1702 FIELD1("CachePriority:", 0),
1705 static struct field_desc flm_t5[] = {
1706 FIELD1("Valid:", 89),
1707 FIELD("SplitLenMode:", 87, 88),
1708 FIELD1("TPHintEn:", 86),
1709 FIELD("TPHint:", 84, 85),
1710 FIELD1("NoSnoop:", 83),
1711 FIELD1("RelaxedOrdering:", 82),
1712 FIELD("DCA_ST:", 71, 81),
1713 FIELD("EQid:", 54, 70),
1714 FIELD("SplitEn:", 52, 53),
1715 FIELD1("PadEn:", 51),
1716 FIELD1("PackEn:", 50),
1717 FIELD1("Cache_Lock :", 49),
1718 FIELD1("CongDrop:", 48),
1719 FIELD("PackOffset:", 16, 47),
1720 FIELD("CIDX:", 8, 15),
1721 FIELD("PIDX:", 0, 7),
1724 static struct field_desc flm_t6[] = {
1725 FIELD1("Valid:", 89),
1726 FIELD("SplitLenMode:", 87, 88),
1727 FIELD1("TPHintEn:", 86),
1728 FIELD("TPHint:", 84, 85),
1729 FIELD1("NoSnoop:", 83),
1730 FIELD1("RelaxedOrdering:", 82),
1731 FIELD("DCA_ST:", 71, 81),
1732 FIELD("EQid:", 54, 70),
1733 FIELD("SplitEn:", 52, 53),
1734 FIELD1("PadEn:", 51),
1735 FIELD1("PackEn:", 50),
1736 FIELD1("Cache_Lock :", 49),
1737 FIELD1("CongDrop:", 48),
1738 FIELD1("Inflight:", 47),
1739 FIELD1("CongEn:", 46),
1740 FIELD1("CongMode:", 45),
1741 FIELD("PackOffset:", 20, 39),
1742 FIELD("CIDX:", 8, 15),
1743 FIELD("PIDX:", 0, 7),
1746 static struct field_desc conm_t5[] = {
1747 FIELD1("CngMPSEnable:", 21),
1748 FIELD("CngTPMode:", 19, 20),
1749 FIELD1("CngDBPHdr:", 18),
1750 FIELD1("CngDBPData:", 17),
1751 FIELD1("CngIMSG:", 16),
1752 { "CngChMap:", 0, 15, 0, 1, 0 },
1756 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1758 show_struct(p->data, 6, fl_t5);
1760 show_struct(p->data, 6, egress_t5);
1762 show_struct(p->data, 6, egress_t6);
1763 } else if (p->mem_id == SGE_CONTEXT_FLM)
1764 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1765 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1766 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1767 else if (p->mem_id == SGE_CONTEXT_CNM)
1768 show_struct(p->data, 1, conm_t5);
1772 show_t4_ctxt(const struct t4_sge_context *p)
1774 static struct field_desc egress_t4[] = {
1775 FIELD1("StatusPgNS:", 180),
1776 FIELD1("StatusPgRO:", 179),
1777 FIELD1("FetchNS:", 178),
1778 FIELD1("FetchRO:", 177),
1779 FIELD1("Valid:", 176),
1780 FIELD("PCIeDataChannel:", 174, 175),
1781 FIELD1("DCAEgrQEn:", 173),
1782 FIELD("DCACPUID:", 168, 172),
1783 FIELD1("FCThreshOverride:", 167),
1784 FIELD("WRLength:", 162, 166),
1785 FIELD1("WRLengthKnown:", 161),
1786 FIELD1("ReschedulePending:", 160),
1787 FIELD1("OnChipQueue:", 159),
1788 FIELD1("FetchSizeMode", 158),
1789 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1790 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1791 FIELD("uPToken:", 133, 152),
1792 FIELD1("uPTokenEn:", 132),
1793 FIELD1("UserModeIO:", 131),
1794 FIELD("uPFLCredits:", 123, 130),
1795 FIELD1("uPFLCreditEn:", 122),
1796 FIELD("FID:", 111, 121),
1797 FIELD("HostFCMode:", 109, 110),
1798 FIELD1("HostFCOwner:", 108),
1799 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1800 FIELD("CIDX:", 89, 104),
1801 FIELD("PIDX:", 73, 88),
1802 { "BaseAddress:", 18, 72, 9, 1 },
1803 FIELD("QueueSize:", 2, 17),
1804 FIELD1("QueueType:", 1),
1805 FIELD1("CachePriority:", 0),
1808 static struct field_desc fl_t4[] = {
1809 FIELD1("StatusPgNS:", 180),
1810 FIELD1("StatusPgRO:", 179),
1811 FIELD1("FetchNS:", 178),
1812 FIELD1("FetchRO:", 177),
1813 FIELD1("Valid:", 176),
1814 FIELD("PCIeDataChannel:", 174, 175),
1815 FIELD1("DCAEgrQEn:", 173),
1816 FIELD("DCACPUID:", 168, 172),
1817 FIELD1("FCThreshOverride:", 167),
1818 FIELD1("ReschedulePending:", 160),
1819 FIELD1("OnChipQueue:", 159),
1820 FIELD1("FetchSizeMode", 158),
1821 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1822 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1823 FIELD1("FLMcongMode:", 152),
1824 FIELD("MaxuPFLCredits:", 144, 151),
1825 FIELD("FLMcontextID:", 133, 143),
1826 FIELD1("uPTokenEn:", 132),
1827 FIELD1("UserModeIO:", 131),
1828 FIELD("uPFLCredits:", 123, 130),
1829 FIELD1("uPFLCreditEn:", 122),
1830 FIELD("FID:", 111, 121),
1831 FIELD("HostFCMode:", 109, 110),
1832 FIELD1("HostFCOwner:", 108),
1833 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1834 FIELD("CIDX:", 89, 104),
1835 FIELD("PIDX:", 73, 88),
1836 { "BaseAddress:", 18, 72, 9, 1 },
1837 FIELD("QueueSize:", 2, 17),
1838 FIELD1("QueueType:", 1),
1839 FIELD1("CachePriority:", 0),
1842 static struct field_desc ingress_t4[] = {
1843 FIELD1("NoSnoop:", 145),
1844 FIELD1("RelaxedOrdering:", 144),
1845 FIELD1("GTSmode:", 143),
1846 FIELD1("ISCSICoalescing:", 142),
1847 FIELD1("Valid:", 141),
1848 FIELD1("TimerPending:", 140),
1849 FIELD1("DropRSS:", 139),
1850 FIELD("PCIeChannel:", 137, 138),
1851 FIELD1("SEInterruptArmed:", 136),
1852 FIELD1("CongestionMgtEnable:", 135),
1853 FIELD1("DCAIngQEnable:", 134),
1854 FIELD("DCACPUID:", 129, 133),
1855 FIELD1("UpdateScheduling:", 128),
1856 FIELD("UpdateDelivery:", 126, 127),
1857 FIELD1("InterruptSent:", 125),
1858 FIELD("InterruptIDX:", 114, 124),
1859 FIELD1("InterruptDestination:", 113),
1860 FIELD1("InterruptArmed:", 112),
1861 FIELD("RxIntCounter:", 106, 111),
1862 FIELD("RxIntCounterThreshold:", 104, 105),
1863 FIELD1("Generation:", 103),
1864 { "BaseAddress:", 48, 102, 9, 1 },
1865 FIELD("PIDX:", 32, 47),
1866 FIELD("CIDX:", 16, 31),
1867 { "QueueSize:", 4, 15, 4, 0 },
1868 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1869 FIELD1("QueueEntryOverride:", 1),
1870 FIELD1("CachePriority:", 0),
1873 static struct field_desc flm_t4[] = {
1874 FIELD1("NoSnoop:", 79),
1875 FIELD1("RelaxedOrdering:", 78),
1876 FIELD1("Valid:", 77),
1877 FIELD("DCACPUID:", 72, 76),
1878 FIELD1("DCAFLEn:", 71),
1879 FIELD("EQid:", 54, 70),
1880 FIELD("SplitEn:", 52, 53),
1881 FIELD1("PadEn:", 51),
1882 FIELD1("PackEn:", 50),
1883 FIELD1("DBpriority:", 48),
1884 FIELD("PackOffset:", 16, 47),
1885 FIELD("CIDX:", 8, 15),
1886 FIELD("PIDX:", 0, 7),
1889 static struct field_desc conm_t4[] = {
1890 FIELD1("CngDBPHdr:", 6),
1891 FIELD1("CngDBPData:", 5),
1892 FIELD1("CngIMSG:", 4),
1893 { "CngChMap:", 0, 3, 0, 1, 0},
1897 if (p->mem_id == SGE_CONTEXT_EGRESS)
1898 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
1899 else if (p->mem_id == SGE_CONTEXT_FLM)
1900 show_struct(p->data, 3, flm_t4);
1901 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1902 show_struct(p->data, 5, ingress_t4);
1903 else if (p->mem_id == SGE_CONTEXT_CNM)
1904 show_struct(p->data, 1, conm_t4);
1911 get_sge_context(int argc, const char *argv[])
1916 struct t4_sge_context cntxt = {0};
1919 warnx("sge_context: incorrect number of arguments.");
1923 if (!strcmp(argv[0], "egress"))
1924 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1925 else if (!strcmp(argv[0], "ingress"))
1926 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1927 else if (!strcmp(argv[0], "fl"))
1928 cntxt.mem_id = SGE_CONTEXT_FLM;
1929 else if (!strcmp(argv[0], "cong"))
1930 cntxt.mem_id = SGE_CONTEXT_CNM;
1932 warnx("unknown context type \"%s\"; known types are egress, "
1933 "ingress, fl, and cong.", argv[0]);
1937 p = str_to_number(argv[1], &cid, NULL);
1939 warnx("invalid context id \"%s\"", argv[1]);
1944 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1949 show_t4_ctxt(&cntxt);
1951 show_t5t6_ctxt(&cntxt, chip_id);
1957 loadfw(int argc, const char *argv[])
1960 struct t4_data data = {0};
1961 const char *fname = argv[0];
1962 struct stat st = {0};
1965 warnx("loadfw: incorrect number of arguments.");
1969 fd = open(fname, O_RDONLY);
1971 warn("open(%s)", fname);
1975 if (fstat(fd, &st) < 0) {
1981 data.len = st.st_size;
1982 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1983 if (data.data == MAP_FAILED) {
1989 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1990 munmap(data.data, data.len);
1996 loadcfg(int argc, const char *argv[])
1999 struct t4_data data = {0};
2000 const char *fname = argv[0];
2001 struct stat st = {0};
2004 warnx("loadcfg: incorrect number of arguments.");
2008 if (strcmp(fname, "clear") == 0)
2009 return (doit(CHELSIO_T4_LOAD_CFG, &data));
2011 fd = open(fname, O_RDONLY);
2013 warn("open(%s)", fname);
2017 if (fstat(fd, &st) < 0) {
2023 data.len = st.st_size;
2024 data.len &= ~3; /* Clip off to make it a multiple of 4 */
2025 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
2026 if (data.data == MAP_FAILED) {
2032 rc = doit(CHELSIO_T4_LOAD_CFG, &data);
2033 munmap(data.data, data.len);
2039 dumpstate(int argc, const char *argv[])
2042 struct t4_cudbg_dump dump = {0};
2043 const char *fname = argv[0];
2046 warnx("dumpstate: incorrect number of arguments.");
2051 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap));
2052 dump.len = 8 * 1024 * 1024;
2053 dump.data = malloc(dump.len);
2054 if (dump.data == NULL) {
2058 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump);
2062 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY,
2063 S_IRUSR | S_IRGRP | S_IROTH);
2065 warn("open(%s)", fname);
2069 write(fd, dump.data, dump.len);
2077 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
2080 struct t4_mem_range mr;
2084 mr.data = malloc(mr.len);
2087 warn("read_mem: malloc");
2091 rc = doit(CHELSIO_T4_GET_MEM, &mr);
2096 (*output)(mr.data, mr.len);
2103 loadboot(int argc, const char *argv[])
2108 struct t4_bootrom br = {0};
2109 const char *fname = argv[0];
2110 struct stat st = {0};
2115 } else if (argc == 3) {
2116 if (!strcmp(argv[1], "pf"))
2118 else if (!strcmp(argv[1], "offset"))
2123 p = str_to_number(argv[2], &l, NULL);
2128 warnx("loadboot: incorrect number of arguments.");
2132 if (strcmp(fname, "clear") == 0)
2133 return (doit(CHELSIO_T4_LOAD_BOOT, &br));
2135 fd = open(fname, O_RDONLY);
2137 warn("open(%s)", fname);
2141 if (fstat(fd, &st) < 0) {
2147 br.len = st.st_size;
2148 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0);
2149 if (br.data == MAP_FAILED) {
2155 rc = doit(CHELSIO_T4_LOAD_BOOT, &br);
2156 munmap(br.data, br.len);
2162 loadbootcfg(int argc, const char *argv[])
2165 struct t4_data bc = {0};
2166 const char *fname = argv[0];
2167 struct stat st = {0};
2170 warnx("loadbootcfg: incorrect number of arguments.");
2174 if (strcmp(fname, "clear") == 0)
2175 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc));
2177 fd = open(fname, O_RDONLY);
2179 warn("open(%s)", fname);
2183 if (fstat(fd, &st) < 0) {
2189 bc.len = st.st_size;
2190 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0);
2191 if (bc.data == MAP_FAILED) {
2197 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc);
2198 munmap(bc.data, bc.len);
2204 * Display memory as list of 'n' 4-byte values per line.
2207 show_mem(uint32_t *buf, uint32_t len)
2213 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2215 printf("%s%08x", s, htonl(*buf));
2222 memdump(int argc, const char *argv[])
2229 warnx("incorrect number of arguments.");
2233 p = str_to_number(argv[0], &l, NULL);
2235 warnx("invalid address \"%s\"", argv[0]);
2240 p = str_to_number(argv[1], &l, NULL);
2242 warnx("memdump: invalid length \"%s\"", argv[1]);
2247 return (read_mem(addr, len, show_mem));
2251 * Display TCB as list of 'n' 4-byte values per line.
2254 show_tcb(uint32_t *buf, uint32_t len)
2256 unsigned char *tcb = (unsigned char *)buf;
2261 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2263 printf("%s%08x", s, htonl(*buf));
2267 set_tcb_info(TIDTYPE_TCB, chip_id);
2268 set_print_style(PRNTSTYL_COMP);
2270 parse_n_display_xcb(tcb);
2273 #define A_TP_CMM_TCB_BASE 0x7d10
2274 #define TCB_SIZE 128
2276 read_tcb(int argc, const char *argv[])
2286 warnx("incorrect number of arguments.");
2290 p = str_to_number(argv[0], &l, NULL);
2292 warnx("invalid tid \"%s\"", argv[0]);
2297 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
2301 addr = val + tid * TCB_SIZE;
2303 return (read_mem(addr, TCB_SIZE, show_tcb));
2307 read_i2c(int argc, const char *argv[])
2311 struct t4_i2c_data i2cd;
2314 if (argc < 3 || argc > 4) {
2315 warnx("incorrect number of arguments.");
2319 p = str_to_number(argv[0], &l, NULL);
2320 if (*p || l > UCHAR_MAX) {
2321 warnx("invalid port id \"%s\"", argv[0]);
2326 p = str_to_number(argv[1], &l, NULL);
2327 if (*p || l > UCHAR_MAX) {
2328 warnx("invalid i2c device address \"%s\"", argv[1]);
2333 p = str_to_number(argv[2], &l, NULL);
2334 if (*p || l > UCHAR_MAX) {
2335 warnx("invalid byte offset \"%s\"", argv[2]);
2341 p = str_to_number(argv[3], &l, NULL);
2342 if (*p || l > sizeof(i2cd.data)) {
2343 warnx("invalid number of bytes \"%s\"", argv[3]);
2350 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2354 for (i = 0; i < i2cd.len; i++)
2355 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2361 clearstats(int argc, const char *argv[])
2368 warnx("incorrect number of arguments.");
2372 p = str_to_number(argv[0], &l, NULL);
2374 warnx("invalid port id \"%s\"", argv[0]);
2379 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2387 int rc, port_idx, i;
2390 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2391 rc = read_reg(0x9800, 4, &val);
2394 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2397 for (t.idx = 0; ; t.idx++) {
2398 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2399 if (rc != 0 || t.idx == 0xff)
2402 if (t.tp.port < 4) {
2404 port_idx = t.tp.port;
2405 } else if (t.tp.port < 8) {
2407 port_idx = t.tp.port - 4;
2408 } else if (t.tp.port < 12) {
2410 port_idx = t.tp.port - 8;
2411 } else if (t.tp.port < 16) {
2413 port_idx = t.tp.port - 12;
2414 } else if (t.tp.port < 20) {
2416 port_idx = t.tp.port - 16;
2419 port_idx = t.tp.port;
2422 printf("\ntracer %u (currently %s) captures ", t.idx,
2423 t.enabled ? "ENABLED" : "DISABLED");
2425 printf("port %u %s, ", port_idx, s);
2427 printf("%s %u, ", s, port_idx);
2428 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2430 printf("packets captured %smatch filter\n",
2431 t.tp.invert ? "do not " : "");
2432 if (t.tp.skip_ofst) {
2433 printf("filter pattern: ");
2434 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2435 printf("%08x%08x", t.tp.data[i],
2438 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2439 printf("%08x%08x", t.tp.mask[i],
2443 printf("filter pattern: ");
2444 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2445 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2447 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2448 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2449 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2456 tracer_onoff(uint8_t idx, int enabled)
2461 t.enabled = enabled;
2464 return doit(CHELSIO_T4_SET_TRACER, &t);
2468 create_tracing_ifnet()
2471 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL
2473 char *env[] = {NULL};
2476 close(STDERR_FILENO);
2477 execve(cmd[0], cmd, env);
2483 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2484 * matching). Right now this is a quick-n-dirty implementation that traces the
2485 * first 128B of all tx or rx on a port
2488 set_tracer(uint8_t idx, int argc, const char *argv[])
2493 bzero(&t, sizeof (t));
2499 warnx("must specify tx<n> or rx<n>.");
2503 len = strlen(argv[0]);
2505 warnx("argument must be 3 characters (tx<n> or rx<n>)");
2509 if (strncmp(argv[0], "tx", 2) == 0) {
2510 port = argv[0][2] - '0';
2511 if (port < 0 || port > 3) {
2512 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2516 } else if (strncmp(argv[0], "rx", 2) == 0) {
2517 port = argv[0][2] - '0';
2518 if (port < 0 || port > 3) {
2519 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2523 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2527 t.tp.snap_len = 128;
2534 create_tracing_ifnet();
2535 return doit(CHELSIO_T4_SET_TRACER, &t);
2539 tracer_cmd(int argc, const char *argv[])
2546 warnx("tracer: no arguments.");
2551 if (strcmp(argv[0], "list") == 0) {
2553 warnx("trailing arguments after \"list\" ignored.");
2555 return show_tracers();
2559 s = str_to_number(argv[0], NULL, &val);
2560 if (*s || val > 0xff) {
2561 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2568 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2569 return tracer_onoff(idx, 0);
2572 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2573 return tracer_onoff(idx, 1);
2576 return set_tracer(idx, argc - 1, argv + 1);
2580 modinfo_raw(int port_id)
2583 struct t4_i2c_data i2cd;
2586 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2587 bzero(&i2cd, sizeof(i2cd));
2588 i2cd.port_id = port_id;
2589 i2cd.dev_addr = 0xa0;
2590 i2cd.offset = offset;
2591 i2cd.len = sizeof(i2cd.data);
2592 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2595 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2596 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2597 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2600 printf(" %c%c%c%c %c%c%c%c\n",
2601 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2602 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2603 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2604 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2605 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2606 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2607 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2608 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2615 modinfo(int argc, const char *argv[])
2618 char string[16], *p;
2619 struct t4_i2c_data i2cd;
2621 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2624 warnx("must supply a port");
2629 warnx("too many arguments");
2633 p = str_to_number(argv[0], &port, NULL);
2634 if (*p || port > UCHAR_MAX) {
2635 warnx("invalid port id \"%s\"", argv[0]);
2640 if (!strcmp(argv[1], "raw"))
2641 return (modinfo_raw(port));
2643 warnx("second argument can only be \"raw\"");
2648 bzero(&i2cd, sizeof(i2cd));
2650 i2cd.port_id = port;
2651 i2cd.dev_addr = SFF_8472_BASE;
2653 i2cd.offset = SFF_8472_ID;
2654 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2657 if (i2cd.data[0] > SFF_8472_ID_LAST)
2658 printf("Unknown ID\n");
2660 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2662 bzero(&string, sizeof(string));
2663 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2665 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2667 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2669 printf("Vendor %s\n", string);
2671 bzero(&string, sizeof(string));
2672 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2674 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2676 string[i - SFF_8472_SN_START] = i2cd.data[0];
2678 printf("SN %s\n", string);
2680 bzero(&string, sizeof(string));
2681 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2683 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2685 string[i - SFF_8472_PN_START] = i2cd.data[0];
2687 printf("PN %s\n", string);
2689 bzero(&string, sizeof(string));
2690 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2692 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2694 string[i - SFF_8472_REV_START] = i2cd.data[0];
2696 printf("Rev %s\n", string);
2698 i2cd.offset = SFF_8472_DIAG_TYPE;
2699 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2702 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2703 SFF_8472_DIAG_INTERNAL)) {
2705 /* Switch to reading from the Diagnostic address. */
2706 i2cd.dev_addr = SFF_8472_DIAG;
2709 i2cd.offset = SFF_8472_TEMP;
2710 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2712 temp = i2cd.data[0] << 8;
2714 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2718 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2719 SFF_8472_TEMP_SHIFT);
2721 i2cd.offset = SFF_8472_VCC;
2722 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2724 vcc = i2cd.data[0] << 8;
2725 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2727 i2cd.offset = SFF_8472_TX_BIAS;
2728 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2730 tx_bias = i2cd.data[0] << 8;
2731 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2733 i2cd.offset = SFF_8472_TX_POWER;
2734 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2736 tx_power = i2cd.data[0] << 8;
2737 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2739 i2cd.offset = SFF_8472_RX_POWER;
2740 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2742 rx_power = i2cd.data[0] << 8;
2743 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2746 printf("Diagnostics not supported.\n");
2752 warnx("No module/cable in port %ld", port);
2757 /* XXX: pass in a low/high and do range checks as well */
2759 get_sched_param(const char *param, const char *args[], long *val)
2763 if (strcmp(param, args[0]) != 0)
2766 p = str_to_number(args[1], val, NULL);
2768 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2777 sched_class(int argc, const char *argv[])
2779 struct t4_sched_params op;
2782 memset(&op, 0xff, sizeof(op));
2786 warnx("missing scheduling sub-command");
2789 if (!strcmp(argv[0], "config")) {
2790 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2791 op.u.config.minmax = -1;
2792 } else if (!strcmp(argv[0], "params")) {
2793 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2794 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2795 op.u.params.ratemode = op.u.params.channel =
2796 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2797 op.u.params.weight = op.u.params.pktsize = -1;
2799 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2803 /* Decode remaining arguments ... */
2805 for (i = 1; i < argc; i += 2) {
2806 const char **args = &argv[i];
2809 if (i + 1 == argc) {
2810 warnx("missing argument for \"%s\"", args[0]);
2815 if (!strcmp(args[0], "type")) {
2816 if (!strcmp(args[1], "packet"))
2817 op.type = SCHED_CLASS_TYPE_PACKET;
2819 warnx("invalid type parameter \"%s\"", args[1]);
2826 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2827 if(!get_sched_param("minmax", args, &l))
2828 op.u.config.minmax = (int8_t)l;
2830 warnx("unknown scheduler config parameter "
2838 /* Rest applies only to SUBCMD_PARAMS */
2839 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
2842 if (!strcmp(args[0], "level")) {
2843 if (!strcmp(args[1], "cl-rl"))
2844 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
2845 else if (!strcmp(args[1], "cl-wrr"))
2846 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
2847 else if (!strcmp(args[1], "ch-rl"))
2848 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
2850 warnx("invalid level parameter \"%s\"",
2854 } else if (!strcmp(args[0], "mode")) {
2855 if (!strcmp(args[1], "class"))
2856 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
2857 else if (!strcmp(args[1], "flow"))
2858 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
2860 warnx("invalid mode parameter \"%s\"", args[1]);
2863 } else if (!strcmp(args[0], "rate-unit")) {
2864 if (!strcmp(args[1], "bits"))
2865 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
2866 else if (!strcmp(args[1], "pkts"))
2867 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
2869 warnx("invalid rate-unit parameter \"%s\"",
2873 } else if (!strcmp(args[0], "rate-mode")) {
2874 if (!strcmp(args[1], "relative"))
2875 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
2876 else if (!strcmp(args[1], "absolute"))
2877 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
2879 warnx("invalid rate-mode parameter \"%s\"",
2883 } else if (!get_sched_param("channel", args, &l))
2884 op.u.params.channel = (int8_t)l;
2885 else if (!get_sched_param("class", args, &l))
2886 op.u.params.cl = (int8_t)l;
2887 else if (!get_sched_param("min-rate", args, &l))
2888 op.u.params.minrate = (int32_t)l;
2889 else if (!get_sched_param("max-rate", args, &l))
2890 op.u.params.maxrate = (int32_t)l;
2891 else if (!get_sched_param("weight", args, &l))
2892 op.u.params.weight = (int16_t)l;
2893 else if (!get_sched_param("pkt-size", args, &l))
2894 op.u.params.pktsize = (int16_t)l;
2896 warnx("unknown scheduler parameter \"%s\"", args[0]);
2902 * Catch some logical fallacies in terms of argument combinations here
2903 * so we can offer more than just the EINVAL return from the driver.
2904 * The driver will be able to catch a lot more issues since it knows
2905 * the specifics of the device hardware capabilities like how many
2906 * channels, classes, etc. the device supports.
2909 warnx("sched \"type\" parameter missing");
2912 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2913 if (op.u.config.minmax < 0) {
2914 warnx("sched config \"minmax\" parameter missing");
2918 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
2919 if (op.u.params.level < 0) {
2920 warnx("sched params \"level\" parameter missing");
2923 if (op.u.params.mode < 0 &&
2924 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2925 warnx("sched params \"mode\" parameter missing");
2928 if (op.u.params.rateunit < 0 &&
2929 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2930 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2931 warnx("sched params \"rate-unit\" parameter missing");
2934 if (op.u.params.ratemode < 0 &&
2935 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2936 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2937 warnx("sched params \"rate-mode\" parameter missing");
2940 if (op.u.params.channel < 0) {
2941 warnx("sched params \"channel\" missing");
2944 if (op.u.params.cl < 0 &&
2945 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2946 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) {
2947 warnx("sched params \"class\" missing");
2950 if (op.u.params.maxrate < 0 &&
2951 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2952 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2953 warnx("sched params \"max-rate\" missing for "
2954 "rate-limit level");
2957 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR &&
2958 (op.u.params.weight < 1 || op.u.params.weight > 99)) {
2959 warnx("sched params \"weight\" missing or invalid "
2960 "(not 1-99) for weighted-round-robin level");
2963 if (op.u.params.pktsize < 0 &&
2964 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2965 warnx("sched params \"pkt-size\" missing for "
2966 "rate-limit level");
2969 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2970 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2971 warnx("sched params mode flow needs rate-mode absolute");
2974 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2975 !in_range(op.u.params.maxrate, 1, 100)) {
2976 warnx("sched params \"max-rate\" takes "
2977 "percentage value(1-100) for rate-mode relative");
2980 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2981 !in_range(op.u.params.maxrate, 1, 100000000)) {
2982 warnx("sched params \"max-rate\" takes "
2983 "value(1-100000000) for rate-mode absolute");
2986 if (op.u.params.maxrate > 0 &&
2987 op.u.params.maxrate < op.u.params.minrate) {
2988 warnx("sched params \"max-rate\" is less than "
2995 warnx("%d error%s in sched-class command", errs,
2996 errs == 1 ? "" : "s");
3000 return doit(CHELSIO_T4_SCHED_CLASS, &op);
3004 sched_queue(int argc, const char *argv[])
3006 struct t4_sched_queue op = {0};
3011 /* need "<port> <queue> <class> */
3012 warnx("incorrect number of arguments.");
3016 p = str_to_number(argv[0], &val, NULL);
3017 if (*p || val > UCHAR_MAX) {
3018 warnx("invalid port id \"%s\"", argv[0]);
3021 op.port = (uint8_t)val;
3023 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
3026 p = str_to_number(argv[1], &val, NULL);
3027 if (*p || val < -1) {
3028 warnx("invalid queue \"%s\"", argv[1]);
3031 op.queue = (int8_t)val;
3034 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
3037 p = str_to_number(argv[2], &val, NULL);
3038 if (*p || val < -1) {
3039 warnx("invalid class \"%s\"", argv[2]);
3042 op.cl = (int8_t)val;
3045 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
3049 parse_offload_settings_word(const char *s, char **pnext, const char *ws,
3050 int *pneg, struct offload_settings *os)
3058 if (!strcmp(s, "not")) {
3063 if (!strcmp(s, "offload")) {
3064 os->offload = (*pneg + 1) & 1;
3066 } else if (!strcmp(s , "coalesce")) {
3067 os->rx_coalesce = (*pneg + 1) & 1;
3069 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) {
3070 os->tstamp = (*pneg + 1) & 1;
3072 } else if (!strcmp(s, "sack")) {
3073 os->sack = (*pneg + 1) & 1;
3075 } else if (!strcmp(s, "nagle")) {
3076 os->nagle = (*pneg + 1) & 1;
3078 } else if (!strcmp(s, "ecn")) {
3079 os->ecn = (*pneg + 1) & 1;
3081 } else if (!strcmp(s, "ddp")) {
3082 os->ddp = (*pneg + 1) & 1;
3084 } else if (!strcmp(s, "tls")) {
3085 os->tls = (*pneg + 1) & 1;
3091 /* Settings with additional parameter handled here. */
3094 warnx("\"%s\" is not a valid keyword, or it does not "
3095 "support negation.", s);
3099 while ((param = strsep(pnext, ws)) != NULL) {
3103 if (param == NULL) {
3104 warnx("\"%s\" is not a valid keyword, or it requires a "
3105 "parameter that has not been provided.", s);
3109 if (!strcmp(s, "cong")) {
3110 if (!strcmp(param, "reno"))
3112 else if (!strcmp(param, "tahoe"))
3114 else if (!strcmp(param, "newreno"))
3116 else if (!strcmp(param, "highspeed"))
3119 warnx("unknown congestion algorithm \"%s\".", s);
3122 } else if (!strcmp(s, "class")) {
3124 p = str_to_number(param, &val, NULL);
3125 /* (nsched_cls - 1) is spelled 15 here. */
3126 if (*p || val < 0 || val > 15) {
3127 warnx("invalid scheduling class \"%s\". "
3128 "\"class\" needs an integer value where "
3129 "0 <= value <= 15", param);
3132 os->sched_class = val;
3133 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") ||
3134 !strcmp(s, "rxq")) {
3136 if (strcmp(param, "random")) {
3137 p = str_to_number(param, &val, NULL);
3138 if (*p || val < 0 || val > 0xffff) {
3139 warnx("invalid queue specification "
3140 "\"%s\". \"%s\" needs an integer"
3141 " value, or \"random\".",
3146 if (!strcmp(s, "bind")) {
3149 } else if (!strcmp(s, "txq")) {
3151 } else if (!strcmp(s, "rxq")) {
3156 } else if (!strcmp(s, "mss")) {
3158 p = str_to_number(param, &val, NULL);
3159 if (*p || val <= 0) {
3160 warnx("invalid MSS specification \"%s\". "
3161 "\"mss\" needs a positive integer value",
3167 warnx("unknown settings keyword: \"%s\"", s);
3176 parse_offload_settings(const char *settings_ro, struct offload_settings *os)
3178 const char *ws = " \f\n\r\v\t";
3179 char *settings, *s, *next;
3180 int rc, nsettings, neg;
3181 static const struct offload_settings default_settings = {
3182 .offload = 0, /* No settings imply !offload */
3197 *os = default_settings;
3199 next = settings = strdup(settings_ro);
3200 if (settings == NULL) {
3208 while ((s = strsep(&next, ws)) != NULL) {
3212 rc = parse_offload_settings_word(s, &next, ws, &neg, os);
3216 if (nsettings == 0) {
3217 warnx("no settings provided");
3222 warnx("%d stray negation(s) at end of offload settings", neg);
3232 isempty_line(char *line, size_t llen)
3235 /* skip leading whitespace */
3236 while (isspace(*line)) {
3240 if (llen == 0 || *line == '#' || *line == '\n')
3247 special_offload_rule(char *str)
3250 /* skip leading whitespaces */
3251 while (isspace(*str))
3254 /* check for special strings: "-", "all", "any" */
3257 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) {
3263 /* skip trailing whitespaces */
3264 while (isspace(*str))
3267 return (*str == '\0');
3271 * A rule has 3 parts: an open-type, a match expression, and offload settings.
3273 * [<open-type>] <expr> => <settings>
3276 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd,
3277 struct offload_rule *r)
3279 char *expr, *settings, *s;
3281 bzero(r, sizeof(*r));
3283 /* Skip leading whitespace. */
3284 while (isspace(*line))
3286 /* Trim trailing whitespace */
3287 s = &line[llen - 1];
3288 while (isspace(*s)) {
3294 * First part of the rule: '[X]' where X = A/D/L/P
3296 if (*line++ != '[') {
3297 warnx("missing \"[\" on line %zd", lno);
3305 r->open_type = *line;
3308 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno);
3312 if (*line++ != ']') {
3313 warnx("missing \"]\" after \"[%c\" on line %zd",
3318 /* Skip whitespace. */
3319 while (isspace(*line))
3323 * Rest of the rule: <expr> => <settings>
3326 s = strstr(line, "=>");
3330 while (isspace(*settings))
3335 * <expr> is either a special name (all, any) or a pcap-filter(7).
3336 * In case of a special name the bpf_prog stays all-zero.
3338 if (!special_offload_rule(expr)) {
3339 if (pcap_compile(pd, &r->bpf_prog, expr, 1,
3340 PCAP_NETMASK_UNKNOWN) < 0) {
3341 warnx("failed to compile \"%s\" on line %zd: %s", expr,
3342 lno, pcap_geterr(pd));
3347 /* settings to apply on a match. */
3348 if (parse_offload_settings(settings, &r->settings) != 0) {
3349 warnx("failed to parse offload settings \"%s\" on line %zd",
3351 pcap_freecode(&r->bpf_prog);
3360 * Note that op itself is not dynamically allocated.
3363 free_offload_policy(struct t4_offload_policy *op)
3367 for (i = 0; i < op->nrules; i++) {
3369 * pcap_freecode can cope with empty bpf_prog, which is the case
3370 * for an rule that matches on 'any/all/-'.
3372 pcap_freecode(&op->rule[i].bpf_prog);
3379 #define REALLOC_STRIDE 32
3382 * Fills up op->nrules and op->rule.
3385 parse_offload_policy(const char *fname, struct t4_offload_policy *op)
3389 int lno, maxrules, rc;
3391 struct offload_rule *r;
3394 fp = fopen(fname, "r");
3396 warn("Unable to open file \"%s\"", fname);
3399 pd = pcap_open_dead(DLT_EN10MB, 128);
3401 warnx("Failed to open pcap device");
3414 while ((llen = getline(&line, &lcap, fp)) != -1) {
3417 /* Skip empty lines. */
3418 if (isempty_line(line, llen))
3421 if (op->nrules == maxrules) {
3422 maxrules += REALLOC_STRIDE;
3423 r = realloc(op->rule,
3424 maxrules * sizeof(struct offload_rule));
3426 warnx("failed to allocate memory for %d rules",
3434 r = &op->rule[op->nrules];
3435 rc = parse_offload_policy_line(lno, line, llen, pd, r);
3437 warnx("Error parsing line %d of \"%s\"", lno, fname);
3446 warn("Error while reading from file \"%s\" at line %d",
3452 if (op->nrules == 0) {
3453 warnx("No valid rules found in \"%s\"", fname);
3460 free_offload_policy(op);
3467 load_offload_policy(int argc, const char *argv[])
3470 const char *fname = argv[0];
3471 struct t4_offload_policy op = {0};
3474 warnx("incorrect number of arguments.");
3478 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) {
3479 /* op.nrules is 0 and that means clear policy */
3480 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op));
3483 rc = parse_offload_policy(fname, &op);
3485 /* Error message displayed already */
3489 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op);
3490 free_offload_policy(&op);
3496 run_cmd(int argc, const char *argv[])
3499 const char *cmd = argv[0];
3505 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
3506 rc = register_io(argc, argv, 4);
3507 else if (!strcmp(cmd, "reg64"))
3508 rc = register_io(argc, argv, 8);
3509 else if (!strcmp(cmd, "regdump"))
3510 rc = dump_regs(argc, argv);
3511 else if (!strcmp(cmd, "filter"))
3512 rc = filter_cmd(argc, argv, 0);
3513 else if (!strcmp(cmd, "context"))
3514 rc = get_sge_context(argc, argv);
3515 else if (!strcmp(cmd, "loadfw"))
3516 rc = loadfw(argc, argv);
3517 else if (!strcmp(cmd, "memdump"))
3518 rc = memdump(argc, argv);
3519 else if (!strcmp(cmd, "tcb"))
3520 rc = read_tcb(argc, argv);
3521 else if (!strcmp(cmd, "i2c"))
3522 rc = read_i2c(argc, argv);
3523 else if (!strcmp(cmd, "clearstats"))
3524 rc = clearstats(argc, argv);
3525 else if (!strcmp(cmd, "tracer"))
3526 rc = tracer_cmd(argc, argv);
3527 else if (!strcmp(cmd, "modinfo"))
3528 rc = modinfo(argc, argv);
3529 else if (!strcmp(cmd, "sched-class"))
3530 rc = sched_class(argc, argv);
3531 else if (!strcmp(cmd, "sched-queue"))
3532 rc = sched_queue(argc, argv);
3533 else if (!strcmp(cmd, "loadcfg"))
3534 rc = loadcfg(argc, argv);
3535 else if (!strcmp(cmd, "loadboot"))
3536 rc = loadboot(argc, argv);
3537 else if (!strcmp(cmd, "loadboot-cfg"))
3538 rc = loadbootcfg(argc, argv);
3539 else if (!strcmp(cmd, "dumpstate"))
3540 rc = dumpstate(argc, argv);
3541 else if (!strcmp(cmd, "policy"))
3542 rc = load_offload_policy(argc, argv);
3543 else if (!strcmp(cmd, "hashfilter"))
3544 rc = filter_cmd(argc, argv, 1);
3547 warnx("invalid command \"%s\"", cmd);
3558 char buffer[128], *buf;
3559 const char *args[MAX_ARGS + 1];
3562 * Simple loop: displays a "> " prompt and processes any input as a
3563 * cxgbetool command. You're supposed to enter only the part after
3564 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
3567 fprintf(stdout, "> ");
3569 buf = fgets(buffer, sizeof(buffer), stdin);
3571 if (ferror(stdin)) {
3572 warn("stdin error");
3573 rc = errno; /* errno from fgets */
3579 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
3580 if (args[i][0] != 0 && ++i == MAX_ARGS)
3586 continue; /* skip empty line */
3588 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
3591 rc = run_cmd(i, args);
3594 /* rc normally comes from the last command (not including quit/exit) */
3599 main(int argc, const char *argv[])
3606 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
3618 chip_id = nexus[1] - '0';
3620 /* progname and nexus */
3624 if (argc == 1 && !strcmp(argv[0], "stdio"))
3625 rc = run_cmd_loop();
3627 rc = run_cmd(argc, argv);