2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/ioctl.h>
34 #include <sys/socket.h>
36 #include <sys/sysctl.h>
38 #include <arpa/inet.h>
39 #include <net/ethernet.h>
40 #include <net/sff8472.h>
41 #include <netinet/in.h>
56 #include "tcb_common.h"
58 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
59 #define max(x, y) ((x) > (y) ? (x) : (y))
61 static const char *progname, *nexus;
62 static int chip_id; /* 4 for T4, 5 for T5, and so on. */
63 static int inst; /* instance of nexus device */
73 const struct reg_info *ri;
77 const char *name; /* Field name */
78 unsigned short start; /* Start bit position */
79 unsigned short end; /* End bit position */
80 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
81 unsigned char hex; /* Print field in hex instead of decimal */
82 unsigned char islog2; /* Field contains the base-2 log of the value */
85 #include "reg_defs_t4.c"
86 #include "reg_defs_t5.c"
87 #include "reg_defs_t6.c"
88 #include "reg_defs_t4vf.c"
93 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
95 "\tclearstats <port> clear port statistics\n"
96 "\tclip hold|release <ip6> hold/release an address\n"
97 "\tclip list list the CLIP table\n"
98 "\tcontext <type> <id> show an SGE context\n"
99 "\tdumpstate <dump.bin> dump chip state\n"
100 "\tfilter <idx> [<param> <val>] ... set a filter\n"
101 "\tfilter <idx> delete|clear [prio 1] delete a filter\n"
102 "\tfilter list list all filters\n"
103 "\tfilter mode [<match>] ... get/set global filter mode\n"
104 "\thashfilter [<param> <val>] ... set a hashfilter\n"
105 "\thashfilter <idx> delete|clear delete a hashfilter\n"
106 "\thashfilter list list all hashfilters\n"
107 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n"
108 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
109 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n"
110 "\tloadboot clear [pf|offset <val>] remove boot image\n"
111 "\tloadboot-cfg <bc.bin> install boot config\n"
112 "\tloadboot-cfg clear remove boot config\n"
113 "\tloadcfg <fw-config.txt> install configuration file\n"
114 "\tloadcfg clear remove configuration file\n"
115 "\tloadfw <fw-image.bin> install firmware\n"
116 "\tmemdump <addr> <len> dump a memory range\n"
117 "\tmodinfo <port> [raw] optics/cable information\n"
118 "\tpolicy <policy.txt> install offload policy\n"
119 "\tpolicy clear remove offload policy\n"
120 "\treg <address>[=<val>] read/write register\n"
121 "\treg64 <address>[=<val>] read/write 64 bit register\n"
122 "\tregdump [<module>] ... dump registers\n"
123 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
124 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
125 "\tstdio interactive mode\n"
126 "\ttcb <tid> read TCB\n"
127 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
128 "\ttracer <idx> disable|enable disable or enable a tracer\n"
129 "\ttracer list list all tracers\n"
133 static inline unsigned int
134 get_card_vers(unsigned int version)
136 return (version & 0x3ff);
140 real_doit(unsigned long cmd, void *data, const char *cmdstr)
148 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
149 if ((fd = open(buf, O_RDWR)) < 0) {
150 warn("open(%s)", nexus);
156 rc = ioctl(fd, cmd, data);
164 #define doit(x, y) real_doit(x, y, #x)
167 str_to_number(const char *s, long *val, long long *vall)
172 *vall = strtoll(s, &p, 0);
174 *val = strtol(s, &p, 0);
182 read_reg(long addr, int size, long long *val)
187 reg.addr = (uint32_t) addr;
188 reg.size = (uint32_t) size;
191 rc = doit(CHELSIO_T4_GETREG, ®);
199 write_reg(long addr, int size, long long val)
203 reg.addr = (uint32_t) addr;
204 reg.size = (uint32_t) size;
205 reg.val = (uint64_t) val;
207 return doit(CHELSIO_T4_SETREG, ®);
211 register_io(int argc, const char *argv[], int size)
219 /* <reg> OR <reg>=<value> */
221 p = str_to_number(argv[0], &addr, NULL);
224 warnx("invalid register \"%s\"", argv[0]);
230 p = str_to_number(v, NULL, &val);
233 warnx("invalid value \"%s\"", v);
238 } else if (argc == 2) {
243 p = str_to_number(argv[0], &addr, NULL);
245 warnx("invalid register \"%s\"", argv[0]);
249 p = str_to_number(argv[1], NULL, &val);
251 warnx("invalid value \"%s\"", argv[1]);
255 warnx("reg: invalid number of arguments (%d)", argc);
260 rc = write_reg(addr, size, val);
262 rc = read_reg(addr, size, &val);
264 printf("0x%llx [%llu]\n", val, val);
270 static inline uint32_t
271 xtract(uint32_t val, int shift, int len)
273 return (val >> shift) & ((1 << len) - 1);
277 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
279 uint32_t reg_val = 0;
281 for ( ; reg_array->name; ++reg_array)
282 if (!reg_array->len) {
283 reg_val = regs[reg_array->addr / 4];
284 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
285 reg_array->name, reg_val, reg_val);
287 uint32_t v = xtract(reg_val, reg_array->addr,
290 printf(" %*u:%u %-47s %#-10x %u\n",
291 reg_array->addr < 10 ? 3 : 2,
292 reg_array->addr + reg_array->len - 1,
293 reg_array->addr, reg_array->name, v, v);
300 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
301 const struct mod_regs *modtab, int nmodules)
305 for (i = 0; i < argc; i++) {
306 for (j = 0; j < nmodules; j++) {
307 if (!strcmp(argv[i], modtab[j].name))
312 warnx("invalid register block \"%s\"", argv[i]);
313 fprintf(stderr, "\nAvailable blocks:");
314 for ( ; nmodules; nmodules--, modtab++)
315 fprintf(stderr, " %s", modtab->name);
316 fprintf(stderr, "\n");
321 for ( ; nmodules; nmodules--, modtab++) {
323 match = argc == 0 ? 1 : 0;
324 for (i = 0; !match && i < argc; i++) {
325 if (!strcmp(argv[i], modtab->name))
330 dump_block_regs(modtab->ri, regs);
336 #define T4_MODREGS(name) { #name, t4_##name##_regs }
338 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
340 static struct mod_regs t4_mod[] = {
342 { "pci", t4_pcie_regs },
346 { "edc0", t4_edc_0_regs },
347 { "edc1", t4_edc_1_regs },
352 { "pmrx", t4_pm_rx_regs },
353 { "pmtx", t4_pm_tx_regs },
355 { "cplsw", t4_cpl_switch_regs },
357 { "i2c", t4_i2cm_regs },
368 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
372 #define T5_MODREGS(name) { #name, t5_##name##_regs }
374 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
376 static struct mod_regs t5_mod[] = {
378 { "pci", t5_pcie_regs },
380 { "mc0", t5_mc_0_regs },
381 { "mc1", t5_mc_1_regs },
383 { "edc0", t5_edc_t50_regs },
384 { "edc1", t5_edc_t51_regs },
387 { "ulprx", t5_ulp_rx_regs },
388 { "ulptx", t5_ulp_tx_regs },
389 { "pmrx", t5_pm_rx_regs },
390 { "pmtx", t5_pm_tx_regs },
392 { "cplsw", t5_cpl_switch_regs },
394 { "i2c", t5_i2cm_regs },
403 { "hma", t5_hma_t5_regs }
406 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
410 #define T6_MODREGS(name) { #name, t6_##name##_regs }
412 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
414 static struct mod_regs t6_mod[] = {
416 { "pci", t6_pcie_regs },
418 { "mc0", t6_mc_0_regs },
420 { "edc0", t6_edc_t60_regs },
421 { "edc1", t6_edc_t61_regs },
424 { "ulprx", t6_ulp_rx_regs },
425 { "ulptx", t6_ulp_tx_regs },
426 { "pmrx", t6_pm_rx_regs },
427 { "pmtx", t6_pm_tx_regs },
429 { "cplsw", t6_cpl_switch_regs },
431 { "i2c", t6_i2cm_regs },
440 { "hma", t6_hma_t6_regs }
443 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
448 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
450 static struct mod_regs t4vf_mod[] = {
451 { "sge", t4vf_sge_regs },
452 { "mps", t4vf_mps_regs },
453 { "pl", t4vf_pl_regs },
454 { "mbdata", t4vf_mbdata_regs },
455 { "cim", t4vf_cim_regs },
458 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
462 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
464 static struct mod_regs t5vf_mod[] = {
465 { "sge", t5vf_sge_regs },
466 { "mps", t4vf_mps_regs },
467 { "pl", t5vf_pl_regs },
468 { "mbdata", t4vf_mbdata_regs },
469 { "cim", t4vf_cim_regs },
472 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
476 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
478 static struct mod_regs t6vf_mod[] = {
479 { "sge", t5vf_sge_regs },
480 { "mps", t4vf_mps_regs },
481 { "pl", t6vf_pl_regs },
482 { "mbdata", t4vf_mbdata_regs },
483 { "cim", t4vf_cim_regs },
486 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
490 dump_regs(int argc, const char *argv[])
492 int vers, revision, rc;
493 struct t4_regdump regs;
496 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
497 regs.data = calloc(1, len);
498 if (regs.data == NULL) {
499 warnc(ENOMEM, "regdump");
504 rc = doit(CHELSIO_T4_REGDUMP, ®s);
508 vers = get_card_vers(regs.version);
509 revision = (regs.version >> 10) & 0x3f;
512 if (revision == 0x3f)
513 rc = dump_regs_t4vf(argc, argv, regs.data);
515 rc = dump_regs_t4(argc, argv, regs.data);
516 } else if (vers == 5) {
517 if (revision == 0x3f)
518 rc = dump_regs_t5vf(argc, argv, regs.data);
520 rc = dump_regs_t5(argc, argv, regs.data);
521 } else if (vers == 6) {
522 if (revision == 0x3f)
523 rc = dump_regs_t6vf(argc, argv, regs.data);
525 rc = dump_regs_t6(argc, argv, regs.data);
527 warnx("%s (type %d, rev %d) is not a known card.",
528 nexus, vers, revision);
537 do_show_info_header(uint32_t mode)
541 printf("%4s %8s", "Idx", "Hits");
542 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
551 if (mode & T4_FILTER_IC_VNIC)
552 printf(" VFvld:PF:VF");
554 printf(" vld:oVLAN");
559 case T4_FILTER_IP_TOS:
562 case T4_FILTER_IP_PROTO:
565 case T4_FILTER_ETH_TYPE:
568 case T4_FILTER_MAC_IDX:
571 case T4_FILTER_MPS_HIT_TYPE:
574 case T4_FILTER_IP_FRAGMENT:
578 /* compressed filter field not enabled */
582 printf(" %20s %20s %9s %9s %s\n",
583 "DIP", "SIP", "DPORT", "SPORT", "Action");
587 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
588 * ordered tuple. If the parameter name in the argument sub-vector does not
589 * match the passed in parameter name, then a zero is returned for the
590 * function and no parsing is performed. If there is a match, then the value
591 * and optional mask are parsed and returned in the provided return value
592 * pointers. If no optional mask is specified, then a default mask of all 1s
595 * An error in parsing the value[:mask] will result in an error message and
596 * program termination.
599 parse_val_mask(const char *param, const char *args[], uint32_t *val,
600 uint32_t *mask, int hashfilter)
605 if (strcmp(param, args[0]) != 0)
608 p = str_to_number(args[1], &l, NULL);
609 if (l >= 0 && l <= UINT32_MAX) {
617 if (p[0] == ':' && p[1] != 0) {
619 warnx("param %s: mask not allowed for "
620 "hashfilter or nat params", param);
623 p = str_to_number(p + 1, &l, NULL);
624 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) {
632 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
639 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
640 * ordered tuple. If the parameter name in the argument sub-vector does not
641 * match the passed in parameter name, then a zero is returned for the
642 * function and no parsing is performed. If there is a match, then the value
643 * and optional mask are parsed and returned in the provided return value
644 * pointers. If no optional mask is specified, then a default mask of all 1s
647 * The value return parameter "afp" is used to specify the expected address
648 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
649 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
650 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
651 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
652 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
653 * returned in the first four bytes of the address and mask return values with
654 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
655 * 1, 2, 3}, respectively.
657 * An error in parsing the value[:mask] will result in an error message and
658 * program termination.
661 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
662 uint8_t mask[], int maskless)
664 const char *colon, *afn;
668 unsigned int masksize;
671 * Is this our parameter?
673 if (strcmp(param, args[0]) != 0)
677 * Fundamental IPv4 versus IPv6 selection.
679 colon = strchr(args[1], ':');
689 if (*afp == AF_UNSPEC)
691 else if (*afp != af) {
692 warnx("address %s is not of expected family %s",
693 args[1], *afp == AF_INET ? "IP" : "IPv6");
698 * Parse address (temporarily stripping off any "/mask"
701 slash = strchr(args[1], '/');
704 ret = inet_pton(af, args[1], addr);
708 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
713 * Parse optional mask specification.
717 unsigned int prefix = strtoul(slash + 1, &p, 10);
720 warnx("mask cannot be provided for maskless specification");
724 if (p == slash + 1) {
725 warnx("missing address prefix for %s", param);
729 warnx("%s is not a valid address prefix", slash + 1);
732 if (prefix > masksize) {
733 warnx("prefix %u is too long for an %s address",
737 memset(mask, 0, masksize / 8);
745 for (m = mask; masksize >= 8; m++, masksize -= 8)
748 *m = ~0 << (8 - masksize);
755 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
756 * tuple. If the parameter name in the argument sub-vector does not match the
757 * passed in parameter name, then a zero is returned for the function and no
758 * parsing is performed. If there is a match, then the value is parsed and
759 * returned in the provided return value pointer.
762 parse_val(const char *param, const char *args[], uint32_t *val)
767 if (strcmp(param, args[0]) != 0)
770 p = str_to_number(args[1], &l, NULL);
771 if (*p || l < 0 || l > UINT32_MAX) {
772 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
781 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
792 for (octet = 0; octet < noctets; octet++)
793 printf("%02x", addr[octet]);
795 for (octet = 0; octet < noctets; octet++)
796 printf("%02x", addrm[octet]);
800 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
804 printf("%4d", t->idx);
805 if (t->hits == UINT64_MAX)
808 printf(" %8ju", t->hits);
811 * Compressed header portion of filter.
813 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
816 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
819 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
822 if (mode & T4_FILTER_IC_VNIC) {
823 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
825 (t->fs.val.vnic >> 13) & 0x7,
826 t->fs.val.vnic & 0x1fff,
828 (t->fs.mask.vnic >> 13) & 0x7,
829 t->fs.mask.vnic & 0x1fff);
831 printf(" %1d:%04x/%1d:%04x",
832 t->fs.val.ovlan_vld, t->fs.val.vnic,
833 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
837 printf(" %1d:%04x/%1d:%04x",
838 t->fs.val.vlan_vld, t->fs.val.vlan,
839 t->fs.mask.vlan_vld, t->fs.mask.vlan);
841 case T4_FILTER_IP_TOS:
842 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
844 case T4_FILTER_IP_PROTO:
845 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
847 case T4_FILTER_ETH_TYPE:
848 printf(" %04x/%04x", t->fs.val.ethtype,
851 case T4_FILTER_MAC_IDX:
852 printf(" %03x/%03x", t->fs.val.macidx,
855 case T4_FILTER_MPS_HIT_TYPE:
856 printf(" %1x/%1x", t->fs.val.matchtype,
857 t->fs.mask.matchtype);
859 case T4_FILTER_IP_FRAGMENT:
860 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
863 /* compressed filter field not enabled */
869 * Fixed portion of filter.
871 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
872 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
873 printf(" %04x/%04x %04x/%04x",
874 t->fs.val.dport, t->fs.mask.dport,
875 t->fs.val.sport, t->fs.mask.sport);
878 * Variable length filter action.
880 if (t->fs.action == FILTER_DROP)
882 else if (t->fs.action == FILTER_SWITCH) {
883 printf(" Switch: port=%d", t->fs.eport);
886 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
888 t->fs.dmac[0], t->fs.dmac[1],
889 t->fs.dmac[2], t->fs.dmac[3],
890 t->fs.dmac[4], t->fs.dmac[5],
894 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
896 t->fs.smac[0], t->fs.smac[1],
897 t->fs.smac[2], t->fs.smac[3],
898 t->fs.smac[4], t->fs.smac[5],
900 if (t->fs.newvlan == VLAN_REMOVE)
901 printf(", vlan=none");
902 else if (t->fs.newvlan == VLAN_INSERT)
903 printf(", vlan=insert(%x)", t->fs.vlan);
904 else if (t->fs.newvlan == VLAN_REWRITE)
905 printf(", vlan=rewrite(%x)", t->fs.vlan);
908 if (t->fs.dirsteer == 0) {
911 printf("(region %d)", t->fs.iq << 1);
913 printf("%d", t->fs.iq);
914 if (t->fs.dirsteerhash == 0)
920 if (chip_id <= 5 && t->fs.prio)
928 show_filters(int hash)
930 uint32_t mode = 0, header, hpfilter = 0;
934 /* Get the global filter mode first */
935 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
939 if (!hash && chip_id >= 6) {
941 bzero(&t, sizeof (t));
945 for (t.idx = 0; ; t.idx++) {
946 rc = doit(CHELSIO_T4_GET_FILTER, &t);
947 if (rc != 0 || t.idx == 0xffffffff)
951 printf("High Priority TCAM Region:\n");
952 do_show_info_header(mode);
956 do_show_one_filter_info(&t, mode);
961 bzero(&t, sizeof (t));
964 for (t.idx = 0; ; t.idx++) {
965 rc = doit(CHELSIO_T4_GET_FILTER, &t);
966 if (rc != 0 || t.idx == 0xffffffff)
971 printf("\nNormal Priority TCAM Region:\n");
972 do_show_info_header(mode);
975 do_show_one_filter_info(&t, mode);
982 get_filter_mode(int hashfilter)
984 uint32_t mode = hashfilter;
987 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
991 if (mode & T4_FILTER_IPv4)
993 if (mode & T4_FILTER_IPv6)
995 if (mode & T4_FILTER_IP_SADDR)
997 if (mode & T4_FILTER_IP_DADDR)
999 if (mode & T4_FILTER_IP_SPORT)
1001 if (mode & T4_FILTER_IP_DPORT)
1003 if (mode & T4_FILTER_IP_FRAGMENT)
1005 if (mode & T4_FILTER_MPS_HIT_TYPE)
1006 printf("matchtype ");
1007 if (mode & T4_FILTER_MAC_IDX)
1009 if (mode & T4_FILTER_ETH_TYPE)
1011 if (mode & T4_FILTER_IP_PROTO)
1013 if (mode & T4_FILTER_IP_TOS)
1015 if (mode & T4_FILTER_VLAN)
1017 if (mode & T4_FILTER_VNIC) {
1018 if (mode & T4_FILTER_IC_VNIC)
1020 else if (mode & T4_FILTER_IC_ENCAP)
1025 if (mode & T4_FILTER_PORT)
1027 if (mode & T4_FILTER_FCoE)
1035 set_filter_mode(int argc, const char *argv[], int hashfilter)
1038 int vnic = 0, ovlan = 0, invalid = 0;
1040 for (; argc; argc--, argv++) {
1041 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") ||
1042 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") ||
1043 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) {
1044 /* These are always available and enabled. */
1046 } else if (!strcmp(argv[0], "frag"))
1047 mode |= T4_FILTER_IP_FRAGMENT;
1048 else if (!strcmp(argv[0], "matchtype"))
1049 mode |= T4_FILTER_MPS_HIT_TYPE;
1050 else if (!strcmp(argv[0], "macidx"))
1051 mode |= T4_FILTER_MAC_IDX;
1052 else if (!strcmp(argv[0], "ethtype"))
1053 mode |= T4_FILTER_ETH_TYPE;
1054 else if (!strcmp(argv[0], "proto"))
1055 mode |= T4_FILTER_IP_PROTO;
1056 else if (!strcmp(argv[0], "tos"))
1057 mode |= T4_FILTER_IP_TOS;
1058 else if (!strcmp(argv[0], "vlan"))
1059 mode |= T4_FILTER_VLAN;
1060 else if (!strcmp(argv[0], "ovlan")) {
1061 mode |= T4_FILTER_VNIC;
1063 } else if (!strcmp(argv[0], "vnic_id")) {
1064 mode |= T4_FILTER_VNIC;
1065 mode |= T4_FILTER_IC_VNIC;
1069 else if (!strcmp(argv[0], "encap")) {
1070 mode |= T4_FILTER_VNIC;
1071 mode |= T4_FILTER_IC_ENCAP;
1075 else if (!strcmp(argv[0], "iport"))
1076 mode |= T4_FILTER_PORT;
1077 else if (!strcmp(argv[0], "fcoe"))
1078 mode |= T4_FILTER_FCoE;
1080 warnx("\"%s\" is not valid while setting filter mode.",
1086 if (vnic + ovlan > 1) {
1087 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1095 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode);
1097 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1101 del_filter(uint32_t idx, int prio, int hashfilter)
1106 t.fs.hash = hashfilter;
1109 return doit(CHELSIO_T4_DEL_FILTER, &t);
1112 #define MAX_VLANID (4095)
1115 set_filter(uint32_t idx, int argc, const char *argv[], int hash)
1117 int rc, af = AF_UNSPEC, start_arg = 0;
1121 warnc(EINVAL, "%s", __func__);
1124 bzero(&t, sizeof (t));
1129 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1130 const char **args = &argv[start_arg];
1133 if (!strcmp(argv[start_arg], "type")) {
1135 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1137 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1140 warnx("invalid type \"%s\"; "
1141 "must be one of \"ipv4\" or \"ipv6\"",
1142 argv[start_arg + 1]);
1146 if (af != AF_UNSPEC && af != newaf) {
1147 warnx("conflicting IPv4/IPv6 specifications.");
1151 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) {
1152 t.fs.val.fcoe = val;
1153 t.fs.mask.fcoe = mask;
1154 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) {
1155 t.fs.val.iport = val;
1156 t.fs.mask.iport = mask;
1157 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) {
1158 t.fs.val.vnic = val;
1159 t.fs.mask.vnic = mask;
1160 t.fs.val.ovlan_vld = 1;
1161 t.fs.mask.ovlan_vld = 1;
1162 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) {
1163 t.fs.val.vlan = val;
1164 t.fs.mask.vlan = mask;
1165 t.fs.val.vlan_vld = 1;
1166 t.fs.mask.vlan_vld = 1;
1167 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) {
1168 t.fs.val.vnic &= 0x1fff;
1169 t.fs.val.vnic |= (val & 0x7) << 13;
1170 t.fs.mask.vnic &= 0x1fff;
1171 t.fs.mask.vnic |= (mask & 0x7) << 13;
1172 t.fs.val.pfvf_vld = 1;
1173 t.fs.mask.pfvf_vld = 1;
1174 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) {
1175 t.fs.val.vnic &= 0xe000;
1176 t.fs.val.vnic |= val & 0x1fff;
1177 t.fs.mask.vnic &= 0xe000;
1178 t.fs.mask.vnic |= mask & 0x1fff;
1179 t.fs.val.pfvf_vld = 1;
1180 t.fs.mask.pfvf_vld = 1;
1181 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) {
1183 t.fs.mask.tos = mask;
1184 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) {
1185 t.fs.val.proto = val;
1186 t.fs.mask.proto = mask;
1187 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) {
1188 t.fs.val.ethtype = val;
1189 t.fs.mask.ethtype = mask;
1190 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) {
1191 t.fs.val.macidx = val;
1192 t.fs.mask.macidx = mask;
1193 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) {
1194 t.fs.val.matchtype = val;
1195 t.fs.mask.matchtype = mask;
1196 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) {
1197 t.fs.val.frag = val;
1198 t.fs.mask.frag = mask;
1199 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) {
1200 t.fs.val.dport = val;
1201 t.fs.mask.dport = mask;
1202 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) {
1203 t.fs.val.sport = val;
1204 t.fs.mask.sport = mask;
1205 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1206 t.fs.mask.dip, hash)) {
1208 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1209 t.fs.mask.sip, hash)) {
1211 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) {
1213 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) {
1215 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) {
1216 t.fs.nat_dport = val;
1217 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) {
1218 t.fs.nat_sport = val;
1219 } else if (!strcmp(argv[start_arg], "action")) {
1220 if (!strcmp(argv[start_arg + 1], "pass"))
1221 t.fs.action = FILTER_PASS;
1222 else if (!strcmp(argv[start_arg + 1], "drop"))
1223 t.fs.action = FILTER_DROP;
1224 else if (!strcmp(argv[start_arg + 1], "switch"))
1225 t.fs.action = FILTER_SWITCH;
1227 warnx("invalid action \"%s\"; must be one of"
1228 " \"pass\", \"drop\" or \"switch\"",
1229 argv[start_arg + 1]);
1232 } else if (!parse_val("hitcnts", args, &val)) {
1234 } else if (!parse_val("prio", args, &val)) {
1236 warnx("Hashfilters doesn't support \"prio\"\n");
1239 if (val != 0 && val != 1) {
1240 warnx("invalid priority \"%s\"; must be"
1241 " \"0\" or \"1\"", argv[start_arg + 1]);
1245 } else if (!parse_val("rpttid", args, &val)) {
1247 } else if (!parse_val("queue", args, &val)) {
1248 t.fs.dirsteer = 1; /* direct steer */
1249 t.fs.iq = val; /* to the iq with this cntxt_id */
1250 } else if (!parse_val("tcbhash", args, &val)) {
1251 t.fs.dirsteerhash = 1; /* direct steer */
1252 /* XXX: use (val << 1) as the rss_hash? */
1254 } else if (!parse_val("tcbrss", args, &val)) {
1255 t.fs.maskhash = 1; /* steer to RSS region */
1257 * val = start idx of the region but the internal TCB
1258 * field is 10b only and is left shifted by 1 before use.
1261 } else if (!parse_val("eport", args, &val)) {
1263 } else if (!parse_val("swapmac", args, &val)) {
1265 } else if (!strcmp(argv[start_arg], "nat")) {
1266 if (!strcmp(argv[start_arg + 1], "dip"))
1267 t.fs.nat_mode = NAT_MODE_DIP;
1268 else if (!strcmp(argv[start_arg + 1], "dip-dp"))
1269 t.fs.nat_mode = NAT_MODE_DIP_DP;
1270 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip"))
1271 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP;
1272 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp"))
1273 t.fs.nat_mode = NAT_MODE_DIP_DP_SP;
1274 else if (!strcmp(argv[start_arg + 1], "sip-sp"))
1275 t.fs.nat_mode = NAT_MODE_SIP_SP;
1276 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp"))
1277 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP;
1278 else if (!strcmp(argv[start_arg + 1], "all"))
1279 t.fs.nat_mode = NAT_MODE_ALL;
1281 warnx("unknown nat type \"%s\"; known types are dip, "
1282 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, "
1283 "dip-sip-sp, and all", argv[start_arg + 1]);
1286 } else if (!parse_val("natseq", args, &val)) {
1287 t.fs.nat_seq_chk = val;
1288 } else if (!parse_val("natflag", args, &val)) {
1289 t.fs.nat_flag_chk = 1;
1290 } else if (!strcmp(argv[start_arg], "dmac")) {
1291 struct ether_addr *daddr;
1293 daddr = ether_aton(argv[start_arg + 1]);
1294 if (daddr == NULL) {
1295 warnx("invalid dmac address \"%s\"",
1296 argv[start_arg + 1]);
1299 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1301 } else if (!strcmp(argv[start_arg], "smac")) {
1302 struct ether_addr *saddr;
1304 saddr = ether_aton(argv[start_arg + 1]);
1305 if (saddr == NULL) {
1306 warnx("invalid smac address \"%s\"",
1307 argv[start_arg + 1]);
1310 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1312 } else if (!strcmp(argv[start_arg], "vlan")) {
1314 if (!strcmp(argv[start_arg + 1], "none")) {
1315 t.fs.newvlan = VLAN_REMOVE;
1316 } else if (argv[start_arg + 1][0] == '=') {
1317 t.fs.newvlan = VLAN_REWRITE;
1318 } else if (argv[start_arg + 1][0] == '+') {
1319 t.fs.newvlan = VLAN_INSERT;
1321 warnx("unknown vlan parameter \"%s\"; must"
1322 " be one of \"none\", \"=<vlan>\", "
1323 " \"+<vlan>\"", argv[start_arg + 1]);
1326 if (t.fs.newvlan == VLAN_REWRITE ||
1327 t.fs.newvlan == VLAN_INSERT) {
1328 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1330 if (p == argv[start_arg + 1] + 1 || p[0] != 0 ||
1331 t.fs.vlan > MAX_VLANID) {
1332 warnx("invalid vlan \"%s\"",
1333 argv[start_arg + 1]);
1338 warnx("invalid parameter \"%s\"", argv[start_arg]);
1342 if (start_arg != argc) {
1343 warnx("no value for \"%s\"", argv[start_arg]);
1348 * Check basic sanity of option combinations.
1350 if (t.fs.action != FILTER_SWITCH &&
1351 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan ||
1352 t.fs.swapmac || t.fs.nat_mode)) {
1353 warnx("port, dmac, smac, vlan, and nat only make sense with"
1354 " \"action switch\"");
1357 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk ||
1358 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) {
1359 warnx("nat params only make sense with valid nat mode");
1362 if (t.fs.action != FILTER_PASS &&
1363 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1364 warnx("rpttid, queue and tcbhash don't make sense with"
1365 " action \"drop\" or \"switch\"");
1368 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1369 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1373 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1374 rc = doit(CHELSIO_T4_SET_FILTER, &t);
1375 if (hash && rc == 0)
1376 printf("%d\n", t.idx);
1381 filter_cmd(int argc, const char *argv[], int hashfilter)
1388 warnx("%sfilter: no arguments.", hashfilter ? "hash" : "");
1393 if (strcmp(argv[0], "list") == 0) {
1395 warnx("trailing arguments after \"list\" ignored.");
1397 return show_filters(hashfilter);
1401 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1402 return get_filter_mode(hashfilter);
1405 if (strcmp(argv[0], "mode") == 0)
1406 return set_filter_mode(argc - 1, argv + 1, hashfilter);
1409 s = str_to_number(argv[0], NULL, &val);
1410 if (*s || val < 0 || val > 0xffffffffU) {
1413 * No numeric index means this must be a request to
1414 * create a new hashfilter and we are already at the
1415 * parameter/value list.
1417 idx = (uint32_t) -1;
1420 warnx("\"%s\" is neither an index nor a filter subcommand.",
1424 idx = (uint32_t) val;
1426 /* <idx> delete|clear [prio 0|1] */
1427 if ((argc == 2 || argc == 4) &&
1428 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1433 warnx("stray arguments after \"%s\".", argv[1]);
1437 if (strcmp(argv[2], "prio") != 0) {
1438 warnx("\"prio\" is the only valid keyword "
1439 "after \"%s\", found \"%s\" instead.",
1444 s = str_to_number(argv[3], NULL, &val);
1445 if (*s || val < 0 || val > 1) {
1446 warnx("%s \"%s\"; must be \"0\" or \"1\".",
1452 return del_filter(idx, prio, hashfilter);
1460 /* [<param> <val>] ... */
1461 return set_filter(idx, argc, argv, hashfilter);
1465 * Shows the fields of a multi-word structure. The structure is considered to
1466 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1467 * whose fields are described by @fd. The 32-bit words are given in @words
1468 * starting with the least significant 32-bit word.
1471 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1474 const struct field_desc *p;
1476 for (p = fd; p->name; p++)
1477 w = max(w, strlen(p->name));
1480 unsigned long long data;
1481 int first_word = fd->start / 32;
1482 int shift = fd->start % 32;
1483 int width = fd->end - fd->start + 1;
1484 unsigned long long mask = (1ULL << width) - 1;
1486 data = (words[first_word] >> shift) |
1487 ((uint64_t)words[first_word + 1] << (32 - shift));
1489 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1493 printf("%-*s ", w, fd->name);
1494 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1499 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1500 #define FIELD1(name, start) FIELD(name, start, start)
1503 show_t5t6_ctxt(const struct t4_sge_context *p, int vers)
1505 static struct field_desc egress_t5[] = {
1506 FIELD("DCA_ST:", 181, 191),
1507 FIELD1("StatusPgNS:", 180),
1508 FIELD1("StatusPgRO:", 179),
1509 FIELD1("FetchNS:", 178),
1510 FIELD1("FetchRO:", 177),
1511 FIELD1("Valid:", 176),
1512 FIELD("PCIeDataChannel:", 174, 175),
1513 FIELD1("StatusPgTPHintEn:", 173),
1514 FIELD("StatusPgTPHint:", 171, 172),
1515 FIELD1("FetchTPHintEn:", 170),
1516 FIELD("FetchTPHint:", 168, 169),
1517 FIELD1("FCThreshOverride:", 167),
1518 { "WRLength:", 162, 166, 9, 0, 1 },
1519 FIELD1("WRLengthKnown:", 161),
1520 FIELD1("ReschedulePending:", 160),
1521 FIELD1("OnChipQueue:", 159),
1522 FIELD1("FetchSizeMode:", 158),
1523 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1524 FIELD1("FLMPacking:", 155),
1525 FIELD("FetchBurstMax:", 153, 154),
1526 FIELD("uPToken:", 133, 152),
1527 FIELD1("uPTokenEn:", 132),
1528 FIELD1("UserModeIO:", 131),
1529 FIELD("uPFLCredits:", 123, 130),
1530 FIELD1("uPFLCreditEn:", 122),
1531 FIELD("FID:", 111, 121),
1532 FIELD("HostFCMode:", 109, 110),
1533 FIELD1("HostFCOwner:", 108),
1534 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1535 FIELD("CIDX:", 89, 104),
1536 FIELD("PIDX:", 73, 88),
1537 { "BaseAddress:", 18, 72, 9, 1 },
1538 FIELD("QueueSize:", 2, 17),
1539 FIELD1("QueueType:", 1),
1540 FIELD1("CachePriority:", 0),
1543 static struct field_desc egress_t6[] = {
1544 FIELD("DCA_ST:", 181, 191),
1545 FIELD1("StatusPgNS:", 180),
1546 FIELD1("StatusPgRO:", 179),
1547 FIELD1("FetchNS:", 178),
1548 FIELD1("FetchRO:", 177),
1549 FIELD1("Valid:", 176),
1550 FIELD1("ReschedulePending_1:", 175),
1551 FIELD1("PCIeDataChannel:", 174),
1552 FIELD1("StatusPgTPHintEn:", 173),
1553 FIELD("StatusPgTPHint:", 171, 172),
1554 FIELD1("FetchTPHintEn:", 170),
1555 FIELD("FetchTPHint:", 168, 169),
1556 FIELD1("FCThreshOverride:", 167),
1557 { "WRLength:", 162, 166, 9, 0, 1 },
1558 FIELD1("WRLengthKnown:", 161),
1559 FIELD1("ReschedulePending:", 160),
1560 FIELD("TimerIx:", 157, 159),
1561 FIELD1("FetchBurstMin:", 156),
1562 FIELD1("FLMPacking:", 155),
1563 FIELD("FetchBurstMax:", 153, 154),
1564 FIELD("uPToken:", 133, 152),
1565 FIELD1("uPTokenEn:", 132),
1566 FIELD1("UserModeIO:", 131),
1567 FIELD("uPFLCredits:", 123, 130),
1568 FIELD1("uPFLCreditEn:", 122),
1569 FIELD("FID:", 111, 121),
1570 FIELD("HostFCMode:", 109, 110),
1571 FIELD1("HostFCOwner:", 108),
1572 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1573 FIELD("CIDX:", 89, 104),
1574 FIELD("PIDX:", 73, 88),
1575 { "BaseAddress:", 18, 72, 9, 1 },
1576 FIELD("QueueSize:", 2, 17),
1577 FIELD1("QueueType:", 1),
1578 FIELD1("FetchSizeMode:", 0),
1581 static struct field_desc fl_t5[] = {
1582 FIELD("DCA_ST:", 181, 191),
1583 FIELD1("StatusPgNS:", 180),
1584 FIELD1("StatusPgRO:", 179),
1585 FIELD1("FetchNS:", 178),
1586 FIELD1("FetchRO:", 177),
1587 FIELD1("Valid:", 176),
1588 FIELD("PCIeDataChannel:", 174, 175),
1589 FIELD1("StatusPgTPHintEn:", 173),
1590 FIELD("StatusPgTPHint:", 171, 172),
1591 FIELD1("FetchTPHintEn:", 170),
1592 FIELD("FetchTPHint:", 168, 169),
1593 FIELD1("FCThreshOverride:", 167),
1594 FIELD1("ReschedulePending:", 160),
1595 FIELD1("OnChipQueue:", 159),
1596 FIELD1("FetchSizeMode:", 158),
1597 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1598 FIELD1("FLMPacking:", 155),
1599 FIELD("FetchBurstMax:", 153, 154),
1600 FIELD1("FLMcongMode:", 152),
1601 FIELD("MaxuPFLCredits:", 144, 151),
1602 FIELD("FLMcontextID:", 133, 143),
1603 FIELD1("uPTokenEn:", 132),
1604 FIELD1("UserModeIO:", 131),
1605 FIELD("uPFLCredits:", 123, 130),
1606 FIELD1("uPFLCreditEn:", 122),
1607 FIELD("FID:", 111, 121),
1608 FIELD("HostFCMode:", 109, 110),
1609 FIELD1("HostFCOwner:", 108),
1610 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1611 FIELD("CIDX:", 89, 104),
1612 FIELD("PIDX:", 73, 88),
1613 { "BaseAddress:", 18, 72, 9, 1 },
1614 FIELD("QueueSize:", 2, 17),
1615 FIELD1("QueueType:", 1),
1616 FIELD1("CachePriority:", 0),
1619 static struct field_desc ingress_t5[] = {
1620 FIELD("DCA_ST:", 143, 153),
1621 FIELD1("ISCSICoalescing:", 142),
1622 FIELD1("Queue_Valid:", 141),
1623 FIELD1("TimerPending:", 140),
1624 FIELD1("DropRSS:", 139),
1625 FIELD("PCIeChannel:", 137, 138),
1626 FIELD1("SEInterruptArmed:", 136),
1627 FIELD1("CongestionMgtEnable:", 135),
1628 FIELD1("NoSnoop:", 134),
1629 FIELD1("RelaxedOrdering:", 133),
1630 FIELD1("GTSmode:", 132),
1631 FIELD1("TPHintEn:", 131),
1632 FIELD("TPHint:", 129, 130),
1633 FIELD1("UpdateScheduling:", 128),
1634 FIELD("UpdateDelivery:", 126, 127),
1635 FIELD1("InterruptSent:", 125),
1636 FIELD("InterruptIDX:", 114, 124),
1637 FIELD1("InterruptDestination:", 113),
1638 FIELD1("InterruptArmed:", 112),
1639 FIELD("RxIntCounter:", 106, 111),
1640 FIELD("RxIntCounterThreshold:", 104, 105),
1641 FIELD1("Generation:", 103),
1642 { "BaseAddress:", 48, 102, 9, 1 },
1643 FIELD("PIDX:", 32, 47),
1644 FIELD("CIDX:", 16, 31),
1645 { "QueueSize:", 4, 15, 4, 0 },
1646 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1647 FIELD1("QueueEntryOverride:", 1),
1648 FIELD1("CachePriority:", 0),
1651 static struct field_desc ingress_t6[] = {
1652 FIELD1("SP_NS:", 158),
1653 FIELD1("SP_RO:", 157),
1654 FIELD1("SP_TPHintEn:", 156),
1655 FIELD("SP_TPHint:", 154, 155),
1656 FIELD("DCA_ST:", 143, 153),
1657 FIELD1("ISCSICoalescing:", 142),
1658 FIELD1("Queue_Valid:", 141),
1659 FIELD1("TimerPending:", 140),
1660 FIELD1("DropRSS:", 139),
1661 FIELD("PCIeChannel:", 137, 138),
1662 FIELD1("SEInterruptArmed:", 136),
1663 FIELD1("CongestionMgtEnable:", 135),
1664 FIELD1("NoSnoop:", 134),
1665 FIELD1("RelaxedOrdering:", 133),
1666 FIELD1("GTSmode:", 132),
1667 FIELD1("TPHintEn:", 131),
1668 FIELD("TPHint:", 129, 130),
1669 FIELD1("UpdateScheduling:", 128),
1670 FIELD("UpdateDelivery:", 126, 127),
1671 FIELD1("InterruptSent:", 125),
1672 FIELD("InterruptIDX:", 114, 124),
1673 FIELD1("InterruptDestination:", 113),
1674 FIELD1("InterruptArmed:", 112),
1675 FIELD("RxIntCounter:", 106, 111),
1676 FIELD("RxIntCounterThreshold:", 104, 105),
1677 FIELD1("Generation:", 103),
1678 { "BaseAddress:", 48, 102, 9, 1 },
1679 FIELD("PIDX:", 32, 47),
1680 FIELD("CIDX:", 16, 31),
1681 { "QueueSize:", 4, 15, 4, 0 },
1682 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1683 FIELD1("QueueEntryOverride:", 1),
1684 FIELD1("CachePriority:", 0),
1687 static struct field_desc flm_t5[] = {
1688 FIELD1("Valid:", 89),
1689 FIELD("SplitLenMode:", 87, 88),
1690 FIELD1("TPHintEn:", 86),
1691 FIELD("TPHint:", 84, 85),
1692 FIELD1("NoSnoop:", 83),
1693 FIELD1("RelaxedOrdering:", 82),
1694 FIELD("DCA_ST:", 71, 81),
1695 FIELD("EQid:", 54, 70),
1696 FIELD("SplitEn:", 52, 53),
1697 FIELD1("PadEn:", 51),
1698 FIELD1("PackEn:", 50),
1699 FIELD1("Cache_Lock :", 49),
1700 FIELD1("CongDrop:", 48),
1701 FIELD("PackOffset:", 16, 47),
1702 FIELD("CIDX:", 8, 15),
1703 FIELD("PIDX:", 0, 7),
1706 static struct field_desc flm_t6[] = {
1707 FIELD1("Valid:", 89),
1708 FIELD("SplitLenMode:", 87, 88),
1709 FIELD1("TPHintEn:", 86),
1710 FIELD("TPHint:", 84, 85),
1711 FIELD1("NoSnoop:", 83),
1712 FIELD1("RelaxedOrdering:", 82),
1713 FIELD("DCA_ST:", 71, 81),
1714 FIELD("EQid:", 54, 70),
1715 FIELD("SplitEn:", 52, 53),
1716 FIELD1("PadEn:", 51),
1717 FIELD1("PackEn:", 50),
1718 FIELD1("Cache_Lock :", 49),
1719 FIELD1("CongDrop:", 48),
1720 FIELD1("Inflight:", 47),
1721 FIELD1("CongEn:", 46),
1722 FIELD1("CongMode:", 45),
1723 FIELD("PackOffset:", 20, 39),
1724 FIELD("CIDX:", 8, 15),
1725 FIELD("PIDX:", 0, 7),
1728 static struct field_desc conm_t5[] = {
1729 FIELD1("CngMPSEnable:", 21),
1730 FIELD("CngTPMode:", 19, 20),
1731 FIELD1("CngDBPHdr:", 18),
1732 FIELD1("CngDBPData:", 17),
1733 FIELD1("CngIMSG:", 16),
1734 { "CngChMap:", 0, 15, 0, 1, 0 },
1738 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1740 show_struct(p->data, 6, fl_t5);
1742 show_struct(p->data, 6, egress_t5);
1744 show_struct(p->data, 6, egress_t6);
1745 } else if (p->mem_id == SGE_CONTEXT_FLM)
1746 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1747 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1748 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1749 else if (p->mem_id == SGE_CONTEXT_CNM)
1750 show_struct(p->data, 1, conm_t5);
1754 show_t4_ctxt(const struct t4_sge_context *p)
1756 static struct field_desc egress_t4[] = {
1757 FIELD1("StatusPgNS:", 180),
1758 FIELD1("StatusPgRO:", 179),
1759 FIELD1("FetchNS:", 178),
1760 FIELD1("FetchRO:", 177),
1761 FIELD1("Valid:", 176),
1762 FIELD("PCIeDataChannel:", 174, 175),
1763 FIELD1("DCAEgrQEn:", 173),
1764 FIELD("DCACPUID:", 168, 172),
1765 FIELD1("FCThreshOverride:", 167),
1766 FIELD("WRLength:", 162, 166),
1767 FIELD1("WRLengthKnown:", 161),
1768 FIELD1("ReschedulePending:", 160),
1769 FIELD1("OnChipQueue:", 159),
1770 FIELD1("FetchSizeMode", 158),
1771 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1772 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1773 FIELD("uPToken:", 133, 152),
1774 FIELD1("uPTokenEn:", 132),
1775 FIELD1("UserModeIO:", 131),
1776 FIELD("uPFLCredits:", 123, 130),
1777 FIELD1("uPFLCreditEn:", 122),
1778 FIELD("FID:", 111, 121),
1779 FIELD("HostFCMode:", 109, 110),
1780 FIELD1("HostFCOwner:", 108),
1781 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1782 FIELD("CIDX:", 89, 104),
1783 FIELD("PIDX:", 73, 88),
1784 { "BaseAddress:", 18, 72, 9, 1 },
1785 FIELD("QueueSize:", 2, 17),
1786 FIELD1("QueueType:", 1),
1787 FIELD1("CachePriority:", 0),
1790 static struct field_desc fl_t4[] = {
1791 FIELD1("StatusPgNS:", 180),
1792 FIELD1("StatusPgRO:", 179),
1793 FIELD1("FetchNS:", 178),
1794 FIELD1("FetchRO:", 177),
1795 FIELD1("Valid:", 176),
1796 FIELD("PCIeDataChannel:", 174, 175),
1797 FIELD1("DCAEgrQEn:", 173),
1798 FIELD("DCACPUID:", 168, 172),
1799 FIELD1("FCThreshOverride:", 167),
1800 FIELD1("ReschedulePending:", 160),
1801 FIELD1("OnChipQueue:", 159),
1802 FIELD1("FetchSizeMode", 158),
1803 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1804 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1805 FIELD1("FLMcongMode:", 152),
1806 FIELD("MaxuPFLCredits:", 144, 151),
1807 FIELD("FLMcontextID:", 133, 143),
1808 FIELD1("uPTokenEn:", 132),
1809 FIELD1("UserModeIO:", 131),
1810 FIELD("uPFLCredits:", 123, 130),
1811 FIELD1("uPFLCreditEn:", 122),
1812 FIELD("FID:", 111, 121),
1813 FIELD("HostFCMode:", 109, 110),
1814 FIELD1("HostFCOwner:", 108),
1815 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1816 FIELD("CIDX:", 89, 104),
1817 FIELD("PIDX:", 73, 88),
1818 { "BaseAddress:", 18, 72, 9, 1 },
1819 FIELD("QueueSize:", 2, 17),
1820 FIELD1("QueueType:", 1),
1821 FIELD1("CachePriority:", 0),
1824 static struct field_desc ingress_t4[] = {
1825 FIELD1("NoSnoop:", 145),
1826 FIELD1("RelaxedOrdering:", 144),
1827 FIELD1("GTSmode:", 143),
1828 FIELD1("ISCSICoalescing:", 142),
1829 FIELD1("Valid:", 141),
1830 FIELD1("TimerPending:", 140),
1831 FIELD1("DropRSS:", 139),
1832 FIELD("PCIeChannel:", 137, 138),
1833 FIELD1("SEInterruptArmed:", 136),
1834 FIELD1("CongestionMgtEnable:", 135),
1835 FIELD1("DCAIngQEnable:", 134),
1836 FIELD("DCACPUID:", 129, 133),
1837 FIELD1("UpdateScheduling:", 128),
1838 FIELD("UpdateDelivery:", 126, 127),
1839 FIELD1("InterruptSent:", 125),
1840 FIELD("InterruptIDX:", 114, 124),
1841 FIELD1("InterruptDestination:", 113),
1842 FIELD1("InterruptArmed:", 112),
1843 FIELD("RxIntCounter:", 106, 111),
1844 FIELD("RxIntCounterThreshold:", 104, 105),
1845 FIELD1("Generation:", 103),
1846 { "BaseAddress:", 48, 102, 9, 1 },
1847 FIELD("PIDX:", 32, 47),
1848 FIELD("CIDX:", 16, 31),
1849 { "QueueSize:", 4, 15, 4, 0 },
1850 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1851 FIELD1("QueueEntryOverride:", 1),
1852 FIELD1("CachePriority:", 0),
1855 static struct field_desc flm_t4[] = {
1856 FIELD1("NoSnoop:", 79),
1857 FIELD1("RelaxedOrdering:", 78),
1858 FIELD1("Valid:", 77),
1859 FIELD("DCACPUID:", 72, 76),
1860 FIELD1("DCAFLEn:", 71),
1861 FIELD("EQid:", 54, 70),
1862 FIELD("SplitEn:", 52, 53),
1863 FIELD1("PadEn:", 51),
1864 FIELD1("PackEn:", 50),
1865 FIELD1("DBpriority:", 48),
1866 FIELD("PackOffset:", 16, 47),
1867 FIELD("CIDX:", 8, 15),
1868 FIELD("PIDX:", 0, 7),
1871 static struct field_desc conm_t4[] = {
1872 FIELD1("CngDBPHdr:", 6),
1873 FIELD1("CngDBPData:", 5),
1874 FIELD1("CngIMSG:", 4),
1875 { "CngChMap:", 0, 3, 0, 1, 0},
1879 if (p->mem_id == SGE_CONTEXT_EGRESS)
1880 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
1881 else if (p->mem_id == SGE_CONTEXT_FLM)
1882 show_struct(p->data, 3, flm_t4);
1883 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1884 show_struct(p->data, 5, ingress_t4);
1885 else if (p->mem_id == SGE_CONTEXT_CNM)
1886 show_struct(p->data, 1, conm_t4);
1893 get_sge_context(int argc, const char *argv[])
1898 struct t4_sge_context cntxt = {0};
1901 warnx("sge_context: incorrect number of arguments.");
1905 if (!strcmp(argv[0], "egress"))
1906 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1907 else if (!strcmp(argv[0], "ingress"))
1908 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1909 else if (!strcmp(argv[0], "fl"))
1910 cntxt.mem_id = SGE_CONTEXT_FLM;
1911 else if (!strcmp(argv[0], "cong"))
1912 cntxt.mem_id = SGE_CONTEXT_CNM;
1914 warnx("unknown context type \"%s\"; known types are egress, "
1915 "ingress, fl, and cong.", argv[0]);
1919 p = str_to_number(argv[1], &cid, NULL);
1921 warnx("invalid context id \"%s\"", argv[1]);
1926 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1931 show_t4_ctxt(&cntxt);
1933 show_t5t6_ctxt(&cntxt, chip_id);
1939 loadfw(int argc, const char *argv[])
1942 struct t4_data data = {0};
1943 const char *fname = argv[0];
1944 struct stat st = {0};
1947 warnx("loadfw: incorrect number of arguments.");
1951 fd = open(fname, O_RDONLY);
1953 warn("open(%s)", fname);
1957 if (fstat(fd, &st) < 0) {
1963 data.len = st.st_size;
1964 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1965 if (data.data == MAP_FAILED) {
1971 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1972 munmap(data.data, data.len);
1978 loadcfg(int argc, const char *argv[])
1981 struct t4_data data = {0};
1982 const char *fname = argv[0];
1983 struct stat st = {0};
1986 warnx("loadcfg: incorrect number of arguments.");
1990 if (strcmp(fname, "clear") == 0)
1991 return (doit(CHELSIO_T4_LOAD_CFG, &data));
1993 fd = open(fname, O_RDONLY);
1995 warn("open(%s)", fname);
1999 if (fstat(fd, &st) < 0) {
2005 data.len = st.st_size;
2006 data.len &= ~3; /* Clip off to make it a multiple of 4 */
2007 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
2008 if (data.data == MAP_FAILED) {
2014 rc = doit(CHELSIO_T4_LOAD_CFG, &data);
2015 munmap(data.data, data.len);
2021 dumpstate(int argc, const char *argv[])
2024 struct t4_cudbg_dump dump = {0};
2025 const char *fname = argv[0];
2028 warnx("dumpstate: incorrect number of arguments.");
2033 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap));
2034 dump.len = 8 * 1024 * 1024;
2035 dump.data = malloc(dump.len);
2036 if (dump.data == NULL) {
2040 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump);
2044 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY,
2045 S_IRUSR | S_IRGRP | S_IROTH);
2047 warn("open(%s)", fname);
2051 write(fd, dump.data, dump.len);
2059 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
2062 struct t4_mem_range mr;
2066 mr.data = malloc(mr.len);
2069 warn("read_mem: malloc");
2073 rc = doit(CHELSIO_T4_GET_MEM, &mr);
2078 (*output)(mr.data, mr.len);
2085 loadboot(int argc, const char *argv[])
2090 struct t4_bootrom br = {0};
2091 const char *fname = argv[0];
2092 struct stat st = {0};
2097 } else if (argc == 3) {
2098 if (!strcmp(argv[1], "pf"))
2100 else if (!strcmp(argv[1], "offset"))
2105 p = str_to_number(argv[2], &l, NULL);
2110 warnx("loadboot: incorrect number of arguments.");
2114 if (strcmp(fname, "clear") == 0)
2115 return (doit(CHELSIO_T4_LOAD_BOOT, &br));
2117 fd = open(fname, O_RDONLY);
2119 warn("open(%s)", fname);
2123 if (fstat(fd, &st) < 0) {
2129 br.len = st.st_size;
2130 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0);
2131 if (br.data == MAP_FAILED) {
2137 rc = doit(CHELSIO_T4_LOAD_BOOT, &br);
2138 munmap(br.data, br.len);
2144 loadbootcfg(int argc, const char *argv[])
2147 struct t4_data bc = {0};
2148 const char *fname = argv[0];
2149 struct stat st = {0};
2152 warnx("loadbootcfg: incorrect number of arguments.");
2156 if (strcmp(fname, "clear") == 0)
2157 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc));
2159 fd = open(fname, O_RDONLY);
2161 warn("open(%s)", fname);
2165 if (fstat(fd, &st) < 0) {
2171 bc.len = st.st_size;
2172 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0);
2173 if (bc.data == MAP_FAILED) {
2179 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc);
2180 munmap(bc.data, bc.len);
2186 * Display memory as list of 'n' 4-byte values per line.
2189 show_mem(uint32_t *buf, uint32_t len)
2195 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2197 printf("%s%08x", s, htonl(*buf));
2204 memdump(int argc, const char *argv[])
2211 warnx("incorrect number of arguments.");
2215 p = str_to_number(argv[0], &l, NULL);
2217 warnx("invalid address \"%s\"", argv[0]);
2222 p = str_to_number(argv[1], &l, NULL);
2224 warnx("memdump: invalid length \"%s\"", argv[1]);
2229 return (read_mem(addr, len, show_mem));
2233 * Display TCB as list of 'n' 4-byte values per line.
2236 show_tcb(uint32_t *buf, uint32_t len)
2238 unsigned char *tcb = (unsigned char *)buf;
2243 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2245 printf("%s%08x", s, htonl(*buf));
2249 set_tcb_info(TIDTYPE_TCB, chip_id);
2250 set_print_style(PRNTSTYL_COMP);
2252 parse_n_display_xcb(tcb);
2255 #define A_TP_CMM_TCB_BASE 0x7d10
2256 #define TCB_SIZE 128
2258 read_tcb(int argc, const char *argv[])
2268 warnx("incorrect number of arguments.");
2272 p = str_to_number(argv[0], &l, NULL);
2274 warnx("invalid tid \"%s\"", argv[0]);
2279 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
2283 addr = val + tid * TCB_SIZE;
2285 return (read_mem(addr, TCB_SIZE, show_tcb));
2289 read_i2c(int argc, const char *argv[])
2293 struct t4_i2c_data i2cd;
2296 if (argc < 3 || argc > 4) {
2297 warnx("incorrect number of arguments.");
2301 p = str_to_number(argv[0], &l, NULL);
2302 if (*p || l > UCHAR_MAX) {
2303 warnx("invalid port id \"%s\"", argv[0]);
2308 p = str_to_number(argv[1], &l, NULL);
2309 if (*p || l > UCHAR_MAX) {
2310 warnx("invalid i2c device address \"%s\"", argv[1]);
2315 p = str_to_number(argv[2], &l, NULL);
2316 if (*p || l > UCHAR_MAX) {
2317 warnx("invalid byte offset \"%s\"", argv[2]);
2323 p = str_to_number(argv[3], &l, NULL);
2324 if (*p || l > sizeof(i2cd.data)) {
2325 warnx("invalid number of bytes \"%s\"", argv[3]);
2332 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2336 for (i = 0; i < i2cd.len; i++)
2337 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2343 clearstats(int argc, const char *argv[])
2350 warnx("incorrect number of arguments.");
2354 p = str_to_number(argv[0], &l, NULL);
2356 warnx("invalid port id \"%s\"", argv[0]);
2361 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2369 int rc, port_idx, i;
2372 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2373 rc = read_reg(0x9800, 4, &val);
2376 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2379 for (t.idx = 0; ; t.idx++) {
2380 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2381 if (rc != 0 || t.idx == 0xff)
2384 if (t.tp.port < 4) {
2386 port_idx = t.tp.port;
2387 } else if (t.tp.port < 8) {
2389 port_idx = t.tp.port - 4;
2390 } else if (t.tp.port < 12) {
2392 port_idx = t.tp.port - 8;
2393 } else if (t.tp.port < 16) {
2395 port_idx = t.tp.port - 12;
2396 } else if (t.tp.port < 20) {
2398 port_idx = t.tp.port - 16;
2401 port_idx = t.tp.port;
2404 printf("\ntracer %u (currently %s) captures ", t.idx,
2405 t.enabled ? "ENABLED" : "DISABLED");
2407 printf("port %u %s, ", port_idx, s);
2409 printf("%s %u, ", s, port_idx);
2410 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2412 printf("packets captured %smatch filter\n",
2413 t.tp.invert ? "do not " : "");
2414 if (t.tp.skip_ofst) {
2415 printf("filter pattern: ");
2416 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2417 printf("%08x%08x", t.tp.data[i],
2420 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2421 printf("%08x%08x", t.tp.mask[i],
2425 printf("filter pattern: ");
2426 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2427 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2429 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2430 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2431 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2438 tracer_onoff(uint8_t idx, int enabled)
2443 t.enabled = enabled;
2446 return doit(CHELSIO_T4_SET_TRACER, &t);
2450 create_tracing_ifnet()
2453 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL
2455 char *env[] = {NULL};
2458 close(STDERR_FILENO);
2459 execve(cmd[0], cmd, env);
2465 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2466 * matching). Right now this is a quick-n-dirty implementation that traces the
2467 * first 128B of all tx or rx on a port
2470 set_tracer(uint8_t idx, int argc, const char *argv[])
2475 bzero(&t, sizeof (t));
2481 warnx("must specify tx<n> or rx<n>.");
2485 len = strlen(argv[0]);
2487 warnx("argument must be 3 characters (tx<n> or rx<n>)");
2491 if (strncmp(argv[0], "tx", 2) == 0) {
2492 port = argv[0][2] - '0';
2493 if (port < 0 || port > 3) {
2494 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2498 } else if (strncmp(argv[0], "rx", 2) == 0) {
2499 port = argv[0][2] - '0';
2500 if (port < 0 || port > 3) {
2501 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2505 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2509 t.tp.snap_len = 128;
2516 create_tracing_ifnet();
2517 return doit(CHELSIO_T4_SET_TRACER, &t);
2521 tracer_cmd(int argc, const char *argv[])
2528 warnx("tracer: no arguments.");
2533 if (strcmp(argv[0], "list") == 0) {
2535 warnx("trailing arguments after \"list\" ignored.");
2537 return show_tracers();
2541 s = str_to_number(argv[0], NULL, &val);
2542 if (*s || val > 0xff) {
2543 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2550 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2551 return tracer_onoff(idx, 0);
2554 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2555 return tracer_onoff(idx, 1);
2558 return set_tracer(idx, argc - 1, argv + 1);
2562 modinfo_raw(int port_id)
2565 struct t4_i2c_data i2cd;
2568 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2569 bzero(&i2cd, sizeof(i2cd));
2570 i2cd.port_id = port_id;
2571 i2cd.dev_addr = 0xa0;
2572 i2cd.offset = offset;
2573 i2cd.len = sizeof(i2cd.data);
2574 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2577 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2578 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2579 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2582 printf(" %c%c%c%c %c%c%c%c\n",
2583 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2584 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2585 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2586 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2587 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2588 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2589 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2590 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2597 modinfo(int argc, const char *argv[])
2600 char string[16], *p;
2601 struct t4_i2c_data i2cd;
2603 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2606 warnx("must supply a port");
2611 warnx("too many arguments");
2615 p = str_to_number(argv[0], &port, NULL);
2616 if (*p || port > UCHAR_MAX) {
2617 warnx("invalid port id \"%s\"", argv[0]);
2622 if (!strcmp(argv[1], "raw"))
2623 return (modinfo_raw(port));
2625 warnx("second argument can only be \"raw\"");
2630 bzero(&i2cd, sizeof(i2cd));
2632 i2cd.port_id = port;
2633 i2cd.dev_addr = SFF_8472_BASE;
2635 i2cd.offset = SFF_8472_ID;
2636 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2639 if (i2cd.data[0] > SFF_8472_ID_LAST)
2640 printf("Unknown ID\n");
2642 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2644 bzero(&string, sizeof(string));
2645 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2647 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2649 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2651 printf("Vendor %s\n", string);
2653 bzero(&string, sizeof(string));
2654 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2656 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2658 string[i - SFF_8472_SN_START] = i2cd.data[0];
2660 printf("SN %s\n", string);
2662 bzero(&string, sizeof(string));
2663 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2665 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2667 string[i - SFF_8472_PN_START] = i2cd.data[0];
2669 printf("PN %s\n", string);
2671 bzero(&string, sizeof(string));
2672 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2674 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2676 string[i - SFF_8472_REV_START] = i2cd.data[0];
2678 printf("Rev %s\n", string);
2680 i2cd.offset = SFF_8472_DIAG_TYPE;
2681 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2684 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2685 SFF_8472_DIAG_INTERNAL)) {
2687 /* Switch to reading from the Diagnostic address. */
2688 i2cd.dev_addr = SFF_8472_DIAG;
2691 i2cd.offset = SFF_8472_TEMP;
2692 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2694 temp = i2cd.data[0] << 8;
2696 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2700 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2701 SFF_8472_TEMP_SHIFT);
2703 i2cd.offset = SFF_8472_VCC;
2704 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2706 vcc = i2cd.data[0] << 8;
2707 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2709 i2cd.offset = SFF_8472_TX_BIAS;
2710 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2712 tx_bias = i2cd.data[0] << 8;
2713 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2715 i2cd.offset = SFF_8472_TX_POWER;
2716 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2718 tx_power = i2cd.data[0] << 8;
2719 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2721 i2cd.offset = SFF_8472_RX_POWER;
2722 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2724 rx_power = i2cd.data[0] << 8;
2725 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2728 printf("Diagnostics not supported.\n");
2734 warnx("No module/cable in port %ld", port);
2739 /* XXX: pass in a low/high and do range checks as well */
2741 get_sched_param(const char *param, const char *args[], long *val)
2745 if (strcmp(param, args[0]) != 0)
2748 p = str_to_number(args[1], val, NULL);
2750 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2759 sched_class(int argc, const char *argv[])
2761 struct t4_sched_params op;
2764 memset(&op, 0xff, sizeof(op));
2768 warnx("missing scheduling sub-command");
2771 if (!strcmp(argv[0], "config")) {
2772 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2773 op.u.config.minmax = -1;
2774 } else if (!strcmp(argv[0], "params")) {
2775 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2776 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2777 op.u.params.ratemode = op.u.params.channel =
2778 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2779 op.u.params.weight = op.u.params.pktsize = -1;
2781 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2785 /* Decode remaining arguments ... */
2787 for (i = 1; i < argc; i += 2) {
2788 const char **args = &argv[i];
2791 if (i + 1 == argc) {
2792 warnx("missing argument for \"%s\"", args[0]);
2797 if (!strcmp(args[0], "type")) {
2798 if (!strcmp(args[1], "packet"))
2799 op.type = SCHED_CLASS_TYPE_PACKET;
2801 warnx("invalid type parameter \"%s\"", args[1]);
2808 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2809 if(!get_sched_param("minmax", args, &l))
2810 op.u.config.minmax = (int8_t)l;
2812 warnx("unknown scheduler config parameter "
2820 /* Rest applies only to SUBCMD_PARAMS */
2821 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
2824 if (!strcmp(args[0], "level")) {
2825 if (!strcmp(args[1], "cl-rl"))
2826 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
2827 else if (!strcmp(args[1], "cl-wrr"))
2828 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
2829 else if (!strcmp(args[1], "ch-rl"))
2830 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
2832 warnx("invalid level parameter \"%s\"",
2836 } else if (!strcmp(args[0], "mode")) {
2837 if (!strcmp(args[1], "class"))
2838 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
2839 else if (!strcmp(args[1], "flow"))
2840 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
2842 warnx("invalid mode parameter \"%s\"", args[1]);
2845 } else if (!strcmp(args[0], "rate-unit")) {
2846 if (!strcmp(args[1], "bits"))
2847 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
2848 else if (!strcmp(args[1], "pkts"))
2849 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
2851 warnx("invalid rate-unit parameter \"%s\"",
2855 } else if (!strcmp(args[0], "rate-mode")) {
2856 if (!strcmp(args[1], "relative"))
2857 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
2858 else if (!strcmp(args[1], "absolute"))
2859 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
2861 warnx("invalid rate-mode parameter \"%s\"",
2865 } else if (!get_sched_param("channel", args, &l))
2866 op.u.params.channel = (int8_t)l;
2867 else if (!get_sched_param("class", args, &l))
2868 op.u.params.cl = (int8_t)l;
2869 else if (!get_sched_param("min-rate", args, &l))
2870 op.u.params.minrate = (int32_t)l;
2871 else if (!get_sched_param("max-rate", args, &l))
2872 op.u.params.maxrate = (int32_t)l;
2873 else if (!get_sched_param("weight", args, &l))
2874 op.u.params.weight = (int16_t)l;
2875 else if (!get_sched_param("pkt-size", args, &l))
2876 op.u.params.pktsize = (int16_t)l;
2878 warnx("unknown scheduler parameter \"%s\"", args[0]);
2884 * Catch some logical fallacies in terms of argument combinations here
2885 * so we can offer more than just the EINVAL return from the driver.
2886 * The driver will be able to catch a lot more issues since it knows
2887 * the specifics of the device hardware capabilities like how many
2888 * channels, classes, etc. the device supports.
2891 warnx("sched \"type\" parameter missing");
2894 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2895 if (op.u.config.minmax < 0) {
2896 warnx("sched config \"minmax\" parameter missing");
2900 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
2901 if (op.u.params.level < 0) {
2902 warnx("sched params \"level\" parameter missing");
2905 if (op.u.params.mode < 0 &&
2906 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2907 warnx("sched params \"mode\" parameter missing");
2910 if (op.u.params.rateunit < 0 &&
2911 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2912 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2913 warnx("sched params \"rate-unit\" parameter missing");
2916 if (op.u.params.ratemode < 0 &&
2917 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2918 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2919 warnx("sched params \"rate-mode\" parameter missing");
2922 if (op.u.params.channel < 0) {
2923 warnx("sched params \"channel\" missing");
2926 if (op.u.params.cl < 0 &&
2927 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2928 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) {
2929 warnx("sched params \"class\" missing");
2932 if (op.u.params.maxrate < 0 &&
2933 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2934 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2935 warnx("sched params \"max-rate\" missing for "
2936 "rate-limit level");
2939 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR &&
2940 (op.u.params.weight < 1 || op.u.params.weight > 99)) {
2941 warnx("sched params \"weight\" missing or invalid "
2942 "(not 1-99) for weighted-round-robin level");
2945 if (op.u.params.pktsize < 0 &&
2946 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2947 warnx("sched params \"pkt-size\" missing for "
2948 "rate-limit level");
2951 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2952 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2953 warnx("sched params mode flow needs rate-mode absolute");
2956 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2957 !in_range(op.u.params.maxrate, 1, 100)) {
2958 warnx("sched params \"max-rate\" takes "
2959 "percentage value(1-100) for rate-mode relative");
2962 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2963 !in_range(op.u.params.maxrate, 1, 100000000)) {
2964 warnx("sched params \"max-rate\" takes "
2965 "value(1-100000000) for rate-mode absolute");
2968 if (op.u.params.maxrate > 0 &&
2969 op.u.params.maxrate < op.u.params.minrate) {
2970 warnx("sched params \"max-rate\" is less than "
2977 warnx("%d error%s in sched-class command", errs,
2978 errs == 1 ? "" : "s");
2982 return doit(CHELSIO_T4_SCHED_CLASS, &op);
2986 sched_queue(int argc, const char *argv[])
2988 struct t4_sched_queue op = {0};
2993 /* need "<port> <queue> <class> */
2994 warnx("incorrect number of arguments.");
2998 p = str_to_number(argv[0], &val, NULL);
2999 if (*p || val > UCHAR_MAX) {
3000 warnx("invalid port id \"%s\"", argv[0]);
3003 op.port = (uint8_t)val;
3005 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
3008 p = str_to_number(argv[1], &val, NULL);
3009 if (*p || val < -1) {
3010 warnx("invalid queue \"%s\"", argv[1]);
3013 op.queue = (int8_t)val;
3016 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
3019 p = str_to_number(argv[2], &val, NULL);
3020 if (*p || val < -1) {
3021 warnx("invalid class \"%s\"", argv[2]);
3024 op.cl = (int8_t)val;
3027 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
3031 parse_offload_settings_word(const char *s, char **pnext, const char *ws,
3032 int *pneg, struct offload_settings *os)
3040 if (!strcmp(s, "not")) {
3045 if (!strcmp(s, "offload")) {
3046 os->offload = (*pneg + 1) & 1;
3048 } else if (!strcmp(s , "coalesce")) {
3049 os->rx_coalesce = (*pneg + 1) & 1;
3051 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) {
3052 os->tstamp = (*pneg + 1) & 1;
3054 } else if (!strcmp(s, "sack")) {
3055 os->sack = (*pneg + 1) & 1;
3057 } else if (!strcmp(s, "nagle")) {
3058 os->nagle = (*pneg + 1) & 1;
3060 } else if (!strcmp(s, "ecn")) {
3061 os->ecn = (*pneg + 1) & 1;
3063 } else if (!strcmp(s, "ddp")) {
3064 os->ddp = (*pneg + 1) & 1;
3066 } else if (!strcmp(s, "tls")) {
3067 os->tls = (*pneg + 1) & 1;
3073 /* Settings with additional parameter handled here. */
3076 warnx("\"%s\" is not a valid keyword, or it does not "
3077 "support negation.", s);
3081 while ((param = strsep(pnext, ws)) != NULL) {
3085 if (param == NULL) {
3086 warnx("\"%s\" is not a valid keyword, or it requires a "
3087 "parameter that has not been provided.", s);
3091 if (!strcmp(s, "cong")) {
3092 if (!strcmp(param, "reno"))
3094 else if (!strcmp(param, "tahoe"))
3096 else if (!strcmp(param, "newreno"))
3098 else if (!strcmp(param, "highspeed"))
3101 warnx("unknown congestion algorithm \"%s\".", s);
3104 } else if (!strcmp(s, "class")) {
3106 p = str_to_number(param, &val, NULL);
3107 /* (nsched_cls - 1) is spelled 15 here. */
3108 if (*p || val < 0 || val > 15) {
3109 warnx("invalid scheduling class \"%s\". "
3110 "\"class\" needs an integer value where "
3111 "0 <= value <= 15", param);
3114 os->sched_class = val;
3115 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") ||
3116 !strcmp(s, "rxq")) {
3117 if (!strcmp(param, "random")) {
3119 } else if (!strcmp(param, "roundrobin")) {
3120 val = QUEUE_ROUNDROBIN;
3122 p = str_to_number(param, &val, NULL);
3123 if (*p || val < 0 || val > 0xffff) {
3124 warnx("invalid queue specification "
3125 "\"%s\". \"%s\" needs an integer"
3126 " value, \"random\", or "
3127 "\"roundrobin\".", param, s);
3131 if (!strcmp(s, "bind")) {
3134 } else if (!strcmp(s, "txq")) {
3136 } else if (!strcmp(s, "rxq")) {
3141 } else if (!strcmp(s, "mss")) {
3143 p = str_to_number(param, &val, NULL);
3144 if (*p || val <= 0) {
3145 warnx("invalid MSS specification \"%s\". "
3146 "\"mss\" needs a positive integer value",
3152 warnx("unknown settings keyword: \"%s\"", s);
3161 parse_offload_settings(const char *settings_ro, struct offload_settings *os)
3163 const char *ws = " \f\n\r\v\t";
3164 char *settings, *s, *next;
3165 int rc, nsettings, neg;
3166 static const struct offload_settings default_settings = {
3167 .offload = 0, /* No settings imply !offload */
3177 .txq = QUEUE_RANDOM,
3178 .rxq = QUEUE_RANDOM,
3182 *os = default_settings;
3184 next = settings = strdup(settings_ro);
3185 if (settings == NULL) {
3193 while ((s = strsep(&next, ws)) != NULL) {
3197 rc = parse_offload_settings_word(s, &next, ws, &neg, os);
3201 if (nsettings == 0) {
3202 warnx("no settings provided");
3207 warnx("%d stray negation(s) at end of offload settings", neg);
3217 isempty_line(char *line, size_t llen)
3220 /* skip leading whitespace */
3221 while (isspace(*line)) {
3225 if (llen == 0 || *line == '#' || *line == '\n')
3232 special_offload_rule(char *str)
3235 /* skip leading whitespaces */
3236 while (isspace(*str))
3239 /* check for special strings: "-", "all", "any" */
3242 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) {
3248 /* skip trailing whitespaces */
3249 while (isspace(*str))
3252 return (*str == '\0');
3256 * A rule has 3 parts: an open-type, a match expression, and offload settings.
3258 * [<open-type>] <expr> => <settings>
3261 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd,
3262 struct offload_rule *r)
3264 char *expr, *settings, *s;
3266 bzero(r, sizeof(*r));
3268 /* Skip leading whitespace. */
3269 while (isspace(*line))
3271 /* Trim trailing whitespace */
3272 s = &line[llen - 1];
3273 while (isspace(*s)) {
3279 * First part of the rule: '[X]' where X = A/D/L/P
3281 if (*line++ != '[') {
3282 warnx("missing \"[\" on line %zd", lno);
3290 r->open_type = *line;
3293 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno);
3297 if (*line++ != ']') {
3298 warnx("missing \"]\" after \"[%c\" on line %zd",
3303 /* Skip whitespace. */
3304 while (isspace(*line))
3308 * Rest of the rule: <expr> => <settings>
3311 s = strstr(line, "=>");
3315 while (isspace(*settings))
3320 * <expr> is either a special name (all, any) or a pcap-filter(7).
3321 * In case of a special name the bpf_prog stays all-zero.
3323 if (!special_offload_rule(expr)) {
3324 if (pcap_compile(pd, &r->bpf_prog, expr, 1,
3325 PCAP_NETMASK_UNKNOWN) < 0) {
3326 warnx("failed to compile \"%s\" on line %zd: %s", expr,
3327 lno, pcap_geterr(pd));
3332 /* settings to apply on a match. */
3333 if (parse_offload_settings(settings, &r->settings) != 0) {
3334 warnx("failed to parse offload settings \"%s\" on line %zd",
3336 pcap_freecode(&r->bpf_prog);
3345 * Note that op itself is not dynamically allocated.
3348 free_offload_policy(struct t4_offload_policy *op)
3352 for (i = 0; i < op->nrules; i++) {
3354 * pcap_freecode can cope with empty bpf_prog, which is the case
3355 * for an rule that matches on 'any/all/-'.
3357 pcap_freecode(&op->rule[i].bpf_prog);
3364 #define REALLOC_STRIDE 32
3367 * Fills up op->nrules and op->rule.
3370 parse_offload_policy(const char *fname, struct t4_offload_policy *op)
3374 int lno, maxrules, rc;
3376 struct offload_rule *r;
3379 fp = fopen(fname, "r");
3381 warn("Unable to open file \"%s\"", fname);
3384 pd = pcap_open_dead(DLT_EN10MB, 128);
3386 warnx("Failed to open pcap device");
3399 while ((llen = getline(&line, &lcap, fp)) != -1) {
3402 /* Skip empty lines. */
3403 if (isempty_line(line, llen))
3406 if (op->nrules == maxrules) {
3407 maxrules += REALLOC_STRIDE;
3408 r = realloc(op->rule,
3409 maxrules * sizeof(struct offload_rule));
3411 warnx("failed to allocate memory for %d rules",
3419 r = &op->rule[op->nrules];
3420 rc = parse_offload_policy_line(lno, line, llen, pd, r);
3422 warnx("Error parsing line %d of \"%s\"", lno, fname);
3431 warn("Error while reading from file \"%s\" at line %d",
3437 if (op->nrules == 0) {
3438 warnx("No valid rules found in \"%s\"", fname);
3445 free_offload_policy(op);
3452 load_offload_policy(int argc, const char *argv[])
3455 const char *fname = argv[0];
3456 struct t4_offload_policy op = {0};
3459 warnx("incorrect number of arguments.");
3463 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) {
3464 /* op.nrules is 0 and that means clear policy */
3465 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op));
3468 rc = parse_offload_policy(fname, &op);
3470 /* Error message displayed already */
3474 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op);
3475 free_offload_policy(&op);
3483 size_t clip_buf_size = 4096;
3484 char *buf, name[32];
3487 buf = malloc(clip_buf_size);
3489 warn("%s", __func__);
3493 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", chip_id, inst);
3494 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0);
3496 warn("sysctl %s", name);
3501 printf("%s\n", buf);
3507 clip_cmd(int argc, const char *argv[])
3509 int rc, af = AF_INET6, add;
3510 struct t4_clip_addr ca = {0};
3512 if (argc == 1 && !strcmp(argv[0], "list")) {
3513 rc = display_clip();
3518 warnx("incorrect number of arguments.");
3522 if (!strcmp(argv[0], "hold")) {
3524 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) {
3527 warnx("first argument must be \"hold\" or \"release\"");
3531 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1);
3536 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca);
3538 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca);
3544 run_cmd(int argc, const char *argv[])
3547 const char *cmd = argv[0];
3553 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
3554 rc = register_io(argc, argv, 4);
3555 else if (!strcmp(cmd, "reg64"))
3556 rc = register_io(argc, argv, 8);
3557 else if (!strcmp(cmd, "regdump"))
3558 rc = dump_regs(argc, argv);
3559 else if (!strcmp(cmd, "filter"))
3560 rc = filter_cmd(argc, argv, 0);
3561 else if (!strcmp(cmd, "context"))
3562 rc = get_sge_context(argc, argv);
3563 else if (!strcmp(cmd, "loadfw"))
3564 rc = loadfw(argc, argv);
3565 else if (!strcmp(cmd, "memdump"))
3566 rc = memdump(argc, argv);
3567 else if (!strcmp(cmd, "tcb"))
3568 rc = read_tcb(argc, argv);
3569 else if (!strcmp(cmd, "i2c"))
3570 rc = read_i2c(argc, argv);
3571 else if (!strcmp(cmd, "clearstats"))
3572 rc = clearstats(argc, argv);
3573 else if (!strcmp(cmd, "tracer"))
3574 rc = tracer_cmd(argc, argv);
3575 else if (!strcmp(cmd, "modinfo"))
3576 rc = modinfo(argc, argv);
3577 else if (!strcmp(cmd, "sched-class"))
3578 rc = sched_class(argc, argv);
3579 else if (!strcmp(cmd, "sched-queue"))
3580 rc = sched_queue(argc, argv);
3581 else if (!strcmp(cmd, "loadcfg"))
3582 rc = loadcfg(argc, argv);
3583 else if (!strcmp(cmd, "loadboot"))
3584 rc = loadboot(argc, argv);
3585 else if (!strcmp(cmd, "loadboot-cfg"))
3586 rc = loadbootcfg(argc, argv);
3587 else if (!strcmp(cmd, "dumpstate"))
3588 rc = dumpstate(argc, argv);
3589 else if (!strcmp(cmd, "policy"))
3590 rc = load_offload_policy(argc, argv);
3591 else if (!strcmp(cmd, "hashfilter"))
3592 rc = filter_cmd(argc, argv, 1);
3593 else if (!strcmp(cmd, "clip"))
3594 rc = clip_cmd(argc, argv);
3597 warnx("invalid command \"%s\"", cmd);
3608 char buffer[128], *buf;
3609 const char *args[MAX_ARGS + 1];
3612 * Simple loop: displays a "> " prompt and processes any input as a
3613 * cxgbetool command. You're supposed to enter only the part after
3614 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
3617 fprintf(stdout, "> ");
3619 buf = fgets(buffer, sizeof(buffer), stdin);
3621 if (ferror(stdin)) {
3622 warn("stdin error");
3623 rc = errno; /* errno from fgets */
3629 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
3630 if (args[i][0] != 0 && ++i == MAX_ARGS)
3636 continue; /* skip empty line */
3638 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
3641 rc = run_cmd(i, args);
3644 /* rc normally comes from the last command (not including quit/exit) */
3649 parse_nexus_name(const char *s)
3653 if (sscanf(s, "t%unex%u%c", &chip_id, &inst, &junk) != 2)
3654 errx(EINVAL, "invalid nexus \"%s\"", s);
3659 main(int argc, const char *argv[])
3666 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
3677 parse_nexus_name(argv[1]);
3679 /* progname and nexus */
3683 if (argc == 1 && !strcmp(argv[0], "stdio"))
3684 rc = run_cmd_loop();
3686 rc = run_cmd(argc, argv);