2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/ioctl.h>
34 #include <sys/socket.h>
37 #include <arpa/inet.h>
38 #include <net/ethernet.h>
39 #include <net/sff8472.h>
40 #include <netinet/in.h>
55 #include "tcb_common.h"
57 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
58 #define max(x, y) ((x) > (y) ? (x) : (y))
60 static const char *progname, *nexus;
61 static int chip_id; /* 4 for T4, 5 for T5 */
71 const struct reg_info *ri;
75 const char *name; /* Field name */
76 unsigned short start; /* Start bit position */
77 unsigned short end; /* End bit position */
78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
79 unsigned char hex; /* Print field in hex instead of decimal */
80 unsigned char islog2; /* Field contains the base-2 log of the value */
83 #include "reg_defs_t4.c"
84 #include "reg_defs_t5.c"
85 #include "reg_defs_t6.c"
86 #include "reg_defs_t4vf.c"
91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
93 "\tclearstats <port> clear port statistics\n"
94 "\tcontext <type> <id> show an SGE context\n"
95 "\tdumpstate <dump.bin> dump chip state\n"
96 "\tfilter <idx> [<param> <val>] ... set a filter\n"
97 "\tfilter <idx> delete|clear [prio 1] delete a filter\n"
98 "\tfilter list list all filters\n"
99 "\tfilter mode [<match>] ... get/set global filter mode\n"
100 "\thashfilter [<param> <val>] ... set a hashfilter\n"
101 "\thashfilter <idx> delete|clear delete a hashfilter\n"
102 "\thashfilter list list all hashfilters\n"
103 "\thashfilter mode get global hashfilter mode\n"
104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n"
106 "\tloadboot clear [pf|offset <val>] remove boot image\n"
107 "\tloadboot-cfg <bc.bin> install boot config\n"
108 "\tloadboot-cfg clear remove boot config\n"
109 "\tloadcfg <fw-config.txt> install configuration file\n"
110 "\tloadcfg clear remove configuration file\n"
111 "\tloadfw <fw-image.bin> install firmware\n"
112 "\tmemdump <addr> <len> dump a memory range\n"
113 "\tmodinfo <port> [raw] optics/cable information\n"
114 "\tpolicy <policy.txt> install offload policy\n"
115 "\tpolicy clear remove offload policy\n"
116 "\treg <address>[=<val>] read/write register\n"
117 "\treg64 <address>[=<val>] read/write 64 bit register\n"
118 "\tregdump [<module>] ... dump registers\n"
119 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
121 "\tstdio interactive mode\n"
122 "\ttcb <tid> read TCB\n"
123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n"
124 "\ttracer <idx> disable|enable disable or enable a tracer\n"
125 "\ttracer list list all tracers\n"
129 static inline unsigned int
130 get_card_vers(unsigned int version)
132 return (version & 0x3ff);
136 real_doit(unsigned long cmd, void *data, const char *cmdstr)
144 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
145 if ((fd = open(buf, O_RDWR)) < 0) {
146 warn("open(%s)", nexus);
152 rc = ioctl(fd, cmd, data);
160 #define doit(x, y) real_doit(x, y, #x)
163 str_to_number(const char *s, long *val, long long *vall)
168 *vall = strtoll(s, &p, 0);
170 *val = strtol(s, &p, 0);
178 read_reg(long addr, int size, long long *val)
183 reg.addr = (uint32_t) addr;
184 reg.size = (uint32_t) size;
187 rc = doit(CHELSIO_T4_GETREG, ®);
195 write_reg(long addr, int size, long long val)
199 reg.addr = (uint32_t) addr;
200 reg.size = (uint32_t) size;
201 reg.val = (uint64_t) val;
203 return doit(CHELSIO_T4_SETREG, ®);
207 register_io(int argc, const char *argv[], int size)
215 /* <reg> OR <reg>=<value> */
217 p = str_to_number(argv[0], &addr, NULL);
220 warnx("invalid register \"%s\"", argv[0]);
226 p = str_to_number(v, NULL, &val);
229 warnx("invalid value \"%s\"", v);
234 } else if (argc == 2) {
239 p = str_to_number(argv[0], &addr, NULL);
241 warnx("invalid register \"%s\"", argv[0]);
245 p = str_to_number(argv[1], NULL, &val);
247 warnx("invalid value \"%s\"", argv[1]);
251 warnx("reg: invalid number of arguments (%d)", argc);
256 rc = write_reg(addr, size, val);
258 rc = read_reg(addr, size, &val);
260 printf("0x%llx [%llu]\n", val, val);
266 static inline uint32_t
267 xtract(uint32_t val, int shift, int len)
269 return (val >> shift) & ((1 << len) - 1);
273 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
275 uint32_t reg_val = 0;
277 for ( ; reg_array->name; ++reg_array)
278 if (!reg_array->len) {
279 reg_val = regs[reg_array->addr / 4];
280 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
281 reg_array->name, reg_val, reg_val);
283 uint32_t v = xtract(reg_val, reg_array->addr,
286 printf(" %*u:%u %-47s %#-10x %u\n",
287 reg_array->addr < 10 ? 3 : 2,
288 reg_array->addr + reg_array->len - 1,
289 reg_array->addr, reg_array->name, v, v);
296 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
297 const struct mod_regs *modtab, int nmodules)
301 for (i = 0; i < argc; i++) {
302 for (j = 0; j < nmodules; j++) {
303 if (!strcmp(argv[i], modtab[j].name))
308 warnx("invalid register block \"%s\"", argv[i]);
309 fprintf(stderr, "\nAvailable blocks:");
310 for ( ; nmodules; nmodules--, modtab++)
311 fprintf(stderr, " %s", modtab->name);
312 fprintf(stderr, "\n");
317 for ( ; nmodules; nmodules--, modtab++) {
319 match = argc == 0 ? 1 : 0;
320 for (i = 0; !match && i < argc; i++) {
321 if (!strcmp(argv[i], modtab->name))
326 dump_block_regs(modtab->ri, regs);
332 #define T4_MODREGS(name) { #name, t4_##name##_regs }
334 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
336 static struct mod_regs t4_mod[] = {
338 { "pci", t4_pcie_regs },
342 { "edc0", t4_edc_0_regs },
343 { "edc1", t4_edc_1_regs },
348 { "pmrx", t4_pm_rx_regs },
349 { "pmtx", t4_pm_tx_regs },
351 { "cplsw", t4_cpl_switch_regs },
353 { "i2c", t4_i2cm_regs },
364 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
368 #define T5_MODREGS(name) { #name, t5_##name##_regs }
370 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
372 static struct mod_regs t5_mod[] = {
374 { "pci", t5_pcie_regs },
376 { "mc0", t5_mc_0_regs },
377 { "mc1", t5_mc_1_regs },
379 { "edc0", t5_edc_t50_regs },
380 { "edc1", t5_edc_t51_regs },
383 { "ulprx", t5_ulp_rx_regs },
384 { "ulptx", t5_ulp_tx_regs },
385 { "pmrx", t5_pm_rx_regs },
386 { "pmtx", t5_pm_tx_regs },
388 { "cplsw", t5_cpl_switch_regs },
390 { "i2c", t5_i2cm_regs },
399 { "hma", t5_hma_t5_regs }
402 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
406 #define T6_MODREGS(name) { #name, t6_##name##_regs }
408 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
410 static struct mod_regs t6_mod[] = {
412 { "pci", t6_pcie_regs },
414 { "mc0", t6_mc_0_regs },
416 { "edc0", t6_edc_t60_regs },
417 { "edc1", t6_edc_t61_regs },
420 { "ulprx", t6_ulp_rx_regs },
421 { "ulptx", t6_ulp_tx_regs },
422 { "pmrx", t6_pm_rx_regs },
423 { "pmtx", t6_pm_tx_regs },
425 { "cplsw", t6_cpl_switch_regs },
427 { "i2c", t6_i2cm_regs },
436 { "hma", t6_hma_t6_regs }
439 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
444 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
446 static struct mod_regs t4vf_mod[] = {
447 { "sge", t4vf_sge_regs },
448 { "mps", t4vf_mps_regs },
449 { "pl", t4vf_pl_regs },
450 { "mbdata", t4vf_mbdata_regs },
451 { "cim", t4vf_cim_regs },
454 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
458 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
460 static struct mod_regs t5vf_mod[] = {
461 { "sge", t5vf_sge_regs },
462 { "mps", t4vf_mps_regs },
463 { "pl", t5vf_pl_regs },
464 { "mbdata", t4vf_mbdata_regs },
465 { "cim", t4vf_cim_regs },
468 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
472 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
474 static struct mod_regs t6vf_mod[] = {
475 { "sge", t5vf_sge_regs },
476 { "mps", t4vf_mps_regs },
477 { "pl", t6vf_pl_regs },
478 { "mbdata", t4vf_mbdata_regs },
479 { "cim", t4vf_cim_regs },
482 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
486 dump_regs(int argc, const char *argv[])
488 int vers, revision, rc;
489 struct t4_regdump regs;
492 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
493 regs.data = calloc(1, len);
494 if (regs.data == NULL) {
495 warnc(ENOMEM, "regdump");
500 rc = doit(CHELSIO_T4_REGDUMP, ®s);
504 vers = get_card_vers(regs.version);
505 revision = (regs.version >> 10) & 0x3f;
508 if (revision == 0x3f)
509 rc = dump_regs_t4vf(argc, argv, regs.data);
511 rc = dump_regs_t4(argc, argv, regs.data);
512 } else if (vers == 5) {
513 if (revision == 0x3f)
514 rc = dump_regs_t5vf(argc, argv, regs.data);
516 rc = dump_regs_t5(argc, argv, regs.data);
517 } else if (vers == 6) {
518 if (revision == 0x3f)
519 rc = dump_regs_t6vf(argc, argv, regs.data);
521 rc = dump_regs_t6(argc, argv, regs.data);
523 warnx("%s (type %d, rev %d) is not a known card.",
524 nexus, vers, revision);
533 do_show_info_header(uint32_t mode)
537 printf("%4s %8s", "Idx", "Hits");
538 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
549 if (mode & T4_FILTER_IC_VNIC)
550 printf(" VFvld:PF:VF");
552 printf(" vld:oVLAN");
559 case T4_FILTER_IP_TOS:
563 case T4_FILTER_IP_PROTO:
567 case T4_FILTER_ETH_TYPE:
571 case T4_FILTER_MAC_IDX:
575 case T4_FILTER_MPS_HIT_TYPE:
579 case T4_FILTER_IP_FRAGMENT:
584 /* compressed filter field not enabled */
588 printf(" %20s %20s %9s %9s %s\n",
589 "DIP", "SIP", "DPORT", "SPORT", "Action");
593 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
594 * ordered tuple. If the parameter name in the argument sub-vector does not
595 * match the passed in parameter name, then a zero is returned for the
596 * function and no parsing is performed. If there is a match, then the value
597 * and optional mask are parsed and returned in the provided return value
598 * pointers. If no optional mask is specified, then a default mask of all 1s
601 * An error in parsing the value[:mask] will result in an error message and
602 * program termination.
605 parse_val_mask(const char *param, const char *args[], uint32_t *val,
606 uint32_t *mask, int hashfilter)
611 if (strcmp(param, args[0]) != 0)
614 p = str_to_number(args[1], &l, NULL);
615 if (l >= 0 && l <= UINT32_MAX) {
623 if (p[0] == ':' && p[1] != 0) {
625 warnx("param %s: mask not allowed for "
626 "hashfilter or nat params", param);
629 p = str_to_number(p + 1, &l, NULL);
630 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) {
638 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
645 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
646 * ordered tuple. If the parameter name in the argument sub-vector does not
647 * match the passed in parameter name, then a zero is returned for the
648 * function and no parsing is performed. If there is a match, then the value
649 * and optional mask are parsed and returned in the provided return value
650 * pointers. If no optional mask is specified, then a default mask of all 1s
653 * The value return parameter "afp" is used to specify the expected address
654 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
655 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
656 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
657 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
658 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
659 * returned in the first four bytes of the address and mask return values with
660 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
661 * 1, 2, 3}, respectively.
663 * An error in parsing the value[:mask] will result in an error message and
664 * program termination.
667 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
668 uint8_t mask[], int maskless)
670 const char *colon, *afn;
674 unsigned int masksize;
677 * Is this our parameter?
679 if (strcmp(param, args[0]) != 0)
683 * Fundamental IPv4 versus IPv6 selection.
685 colon = strchr(args[1], ':');
695 if (*afp == AF_UNSPEC)
697 else if (*afp != af) {
698 warnx("address %s is not of expected family %s",
699 args[1], *afp == AF_INET ? "IP" : "IPv6");
704 * Parse address (temporarily stripping off any "/mask"
707 slash = strchr(args[1], '/');
710 ret = inet_pton(af, args[1], addr);
714 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
719 * Parse optional mask specification.
723 unsigned int prefix = strtoul(slash + 1, &p, 10);
726 warnx("mask cannot be provided for maskless specification");
730 if (p == slash + 1) {
731 warnx("missing address prefix for %s", param);
735 warnx("%s is not a valid address prefix", slash + 1);
738 if (prefix > masksize) {
739 warnx("prefix %u is too long for an %s address",
743 memset(mask, 0, masksize / 8);
751 for (m = mask; masksize >= 8; m++, masksize -= 8)
754 *m = ~0 << (8 - masksize);
761 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
762 * tuple. If the parameter name in the argument sub-vector does not match the
763 * passed in parameter name, then a zero is returned for the function and no
764 * parsing is performed. If there is a match, then the value is parsed and
765 * returned in the provided return value pointer.
768 parse_val(const char *param, const char *args[], uint32_t *val)
773 if (strcmp(param, args[0]) != 0)
776 p = str_to_number(args[1], &l, NULL);
777 if (*p || l < 0 || l > UINT32_MAX) {
778 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
787 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
798 for (octet = 0; octet < noctets; octet++)
799 printf("%02x", addr[octet]);
801 for (octet = 0; octet < noctets; octet++)
802 printf("%02x", addrm[octet]);
806 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
810 printf("%4d", t->idx);
811 if (t->hits == UINT64_MAX)
814 printf(" %8ju", t->hits);
817 * Compressed header portion of filter.
819 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
822 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
826 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
830 if (mode & T4_FILTER_IC_VNIC) {
831 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
833 (t->fs.val.vnic >> 13) & 0x7,
834 t->fs.val.vnic & 0x1fff,
836 (t->fs.mask.vnic >> 13) & 0x7,
837 t->fs.mask.vnic & 0x1fff);
839 printf(" %1d:%04x/%1d:%04x",
840 t->fs.val.ovlan_vld, t->fs.val.vnic,
841 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
846 printf(" %1d:%04x/%1d:%04x",
847 t->fs.val.vlan_vld, t->fs.val.vlan,
848 t->fs.mask.vlan_vld, t->fs.mask.vlan);
851 case T4_FILTER_IP_TOS:
852 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
855 case T4_FILTER_IP_PROTO:
856 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
859 case T4_FILTER_ETH_TYPE:
860 printf(" %04x/%04x", t->fs.val.ethtype,
864 case T4_FILTER_MAC_IDX:
865 printf(" %03x/%03x", t->fs.val.macidx,
869 case T4_FILTER_MPS_HIT_TYPE:
870 printf(" %1x/%1x", t->fs.val.matchtype,
871 t->fs.mask.matchtype);
874 case T4_FILTER_IP_FRAGMENT:
875 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
879 /* compressed filter field not enabled */
885 * Fixed portion of filter.
887 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
888 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
889 printf(" %04x/%04x %04x/%04x",
890 t->fs.val.dport, t->fs.mask.dport,
891 t->fs.val.sport, t->fs.mask.sport);
894 * Variable length filter action.
896 if (t->fs.action == FILTER_DROP)
898 else if (t->fs.action == FILTER_SWITCH) {
899 printf(" Switch: port=%d", t->fs.eport);
902 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
904 t->fs.dmac[0], t->fs.dmac[1],
905 t->fs.dmac[2], t->fs.dmac[3],
906 t->fs.dmac[4], t->fs.dmac[5],
910 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
912 t->fs.smac[0], t->fs.smac[1],
913 t->fs.smac[2], t->fs.smac[3],
914 t->fs.smac[4], t->fs.smac[5],
916 if (t->fs.newvlan == VLAN_REMOVE)
917 printf(", vlan=none");
918 else if (t->fs.newvlan == VLAN_INSERT)
919 printf(", vlan=insert(%x)", t->fs.vlan);
920 else if (t->fs.newvlan == VLAN_REWRITE)
921 printf(", vlan=rewrite(%x)", t->fs.vlan);
924 if (t->fs.dirsteer == 0) {
927 printf("(TCB=hash)");
929 printf("%d", t->fs.iq);
930 if (t->fs.dirsteerhash == 0)
936 if (chip_id <= 5 && t->fs.prio)
944 show_filters(int hash)
946 uint32_t mode = 0, header, hpfilter = 0;
950 /* Get the global filter mode first */
951 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
955 if (!hash && chip_id >= 6) {
957 bzero(&t, sizeof (t));
961 for (t.idx = 0; ; t.idx++) {
962 rc = doit(CHELSIO_T4_GET_FILTER, &t);
963 if (rc != 0 || t.idx == 0xffffffff)
967 printf("High Priority TCAM Region:\n");
968 do_show_info_header(mode);
972 do_show_one_filter_info(&t, mode);
977 bzero(&t, sizeof (t));
980 for (t.idx = 0; ; t.idx++) {
981 rc = doit(CHELSIO_T4_GET_FILTER, &t);
982 if (rc != 0 || t.idx == 0xffffffff)
987 printf("\nNormal Priority TCAM Region:\n");
988 do_show_info_header(mode);
991 do_show_one_filter_info(&t, mode);
998 get_filter_mode(int hashfilter)
1000 uint32_t mode = hashfilter;
1003 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
1007 if (mode & T4_FILTER_IPv4)
1010 if (mode & T4_FILTER_IPv6)
1013 if (mode & T4_FILTER_IP_SADDR)
1016 if (mode & T4_FILTER_IP_DADDR)
1019 if (mode & T4_FILTER_IP_SPORT)
1022 if (mode & T4_FILTER_IP_DPORT)
1025 if (mode & T4_FILTER_IP_FRAGMENT)
1028 if (mode & T4_FILTER_MPS_HIT_TYPE)
1029 printf("matchtype ");
1031 if (mode & T4_FILTER_MAC_IDX)
1034 if (mode & T4_FILTER_ETH_TYPE)
1037 if (mode & T4_FILTER_IP_PROTO)
1040 if (mode & T4_FILTER_IP_TOS)
1043 if (mode & T4_FILTER_VLAN)
1046 if (mode & T4_FILTER_VNIC) {
1047 if (mode & T4_FILTER_IC_VNIC)
1053 if (mode & T4_FILTER_PORT)
1056 if (mode & T4_FILTER_FCoE)
1065 set_filter_mode(int argc, const char *argv[])
1068 int vnic = 0, ovlan = 0;
1070 for (; argc; argc--, argv++) {
1071 if (!strcmp(argv[0], "frag"))
1072 mode |= T4_FILTER_IP_FRAGMENT;
1074 if (!strcmp(argv[0], "matchtype"))
1075 mode |= T4_FILTER_MPS_HIT_TYPE;
1077 if (!strcmp(argv[0], "macidx"))
1078 mode |= T4_FILTER_MAC_IDX;
1080 if (!strcmp(argv[0], "ethtype"))
1081 mode |= T4_FILTER_ETH_TYPE;
1083 if (!strcmp(argv[0], "proto"))
1084 mode |= T4_FILTER_IP_PROTO;
1086 if (!strcmp(argv[0], "tos"))
1087 mode |= T4_FILTER_IP_TOS;
1089 if (!strcmp(argv[0], "vlan"))
1090 mode |= T4_FILTER_VLAN;
1092 if (!strcmp(argv[0], "ovlan")) {
1093 mode |= T4_FILTER_VNIC;
1097 if (!strcmp(argv[0], "vnic_id")) {
1098 mode |= T4_FILTER_VNIC;
1099 mode |= T4_FILTER_IC_VNIC;
1103 if (!strcmp(argv[0], "iport"))
1104 mode |= T4_FILTER_PORT;
1106 if (!strcmp(argv[0], "fcoe"))
1107 mode |= T4_FILTER_FCoE;
1110 if (vnic > 0 && ovlan > 0) {
1111 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1115 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1119 del_filter(uint32_t idx, int prio, int hashfilter)
1124 t.fs.hash = hashfilter;
1127 return doit(CHELSIO_T4_DEL_FILTER, &t);
1130 #define MAX_VLANID (4095)
1133 set_filter(uint32_t idx, int argc, const char *argv[], int hash)
1135 int rc, af = AF_UNSPEC, start_arg = 0;
1139 warnc(EINVAL, "%s", __func__);
1142 bzero(&t, sizeof (t));
1147 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1148 const char **args = &argv[start_arg];
1151 if (!strcmp(argv[start_arg], "type")) {
1153 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1155 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1158 warnx("invalid type \"%s\"; "
1159 "must be one of \"ipv4\" or \"ipv6\"",
1160 argv[start_arg + 1]);
1164 if (af != AF_UNSPEC && af != newaf) {
1165 warnx("conflicting IPv4/IPv6 specifications.");
1169 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) {
1170 t.fs.val.fcoe = val;
1171 t.fs.mask.fcoe = mask;
1172 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) {
1173 t.fs.val.iport = val;
1174 t.fs.mask.iport = mask;
1175 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) {
1176 t.fs.val.vnic = val;
1177 t.fs.mask.vnic = mask;
1178 t.fs.val.ovlan_vld = 1;
1179 t.fs.mask.ovlan_vld = 1;
1180 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) {
1181 t.fs.val.vlan = val;
1182 t.fs.mask.vlan = mask;
1183 t.fs.val.vlan_vld = 1;
1184 t.fs.mask.vlan_vld = 1;
1185 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) {
1186 t.fs.val.vnic &= 0x1fff;
1187 t.fs.val.vnic |= (val & 0x7) << 13;
1188 t.fs.mask.vnic &= 0x1fff;
1189 t.fs.mask.vnic |= (mask & 0x7) << 13;
1190 t.fs.val.pfvf_vld = 1;
1191 t.fs.mask.pfvf_vld = 1;
1192 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) {
1193 t.fs.val.vnic &= 0xe000;
1194 t.fs.val.vnic |= val & 0x1fff;
1195 t.fs.mask.vnic &= 0xe000;
1196 t.fs.mask.vnic |= mask & 0x1fff;
1197 t.fs.val.pfvf_vld = 1;
1198 t.fs.mask.pfvf_vld = 1;
1199 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) {
1201 t.fs.mask.tos = mask;
1202 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) {
1203 t.fs.val.proto = val;
1204 t.fs.mask.proto = mask;
1205 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) {
1206 t.fs.val.ethtype = val;
1207 t.fs.mask.ethtype = mask;
1208 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) {
1209 t.fs.val.macidx = val;
1210 t.fs.mask.macidx = mask;
1211 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) {
1212 t.fs.val.matchtype = val;
1213 t.fs.mask.matchtype = mask;
1214 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) {
1215 t.fs.val.frag = val;
1216 t.fs.mask.frag = mask;
1217 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) {
1218 t.fs.val.dport = val;
1219 t.fs.mask.dport = mask;
1220 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) {
1221 t.fs.val.sport = val;
1222 t.fs.mask.sport = mask;
1223 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1224 t.fs.mask.dip, hash)) {
1226 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1227 t.fs.mask.sip, hash)) {
1229 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) {
1231 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) {
1233 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) {
1234 t.fs.nat_dport = val;
1235 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) {
1236 t.fs.nat_sport = val;
1237 } else if (!strcmp(argv[start_arg], "action")) {
1238 if (!strcmp(argv[start_arg + 1], "pass"))
1239 t.fs.action = FILTER_PASS;
1240 else if (!strcmp(argv[start_arg + 1], "drop"))
1241 t.fs.action = FILTER_DROP;
1242 else if (!strcmp(argv[start_arg + 1], "switch"))
1243 t.fs.action = FILTER_SWITCH;
1245 warnx("invalid action \"%s\"; must be one of"
1246 " \"pass\", \"drop\" or \"switch\"",
1247 argv[start_arg + 1]);
1250 } else if (!parse_val("hitcnts", args, &val)) {
1252 } else if (!parse_val("prio", args, &val)) {
1254 warnx("Hashfilters doesn't support \"prio\"\n");
1257 if (val != 0 && val != 1) {
1258 warnx("invalid priority \"%s\"; must be"
1259 " \"0\" or \"1\"", argv[start_arg + 1]);
1263 } else if (!parse_val("rpttid", args, &val)) {
1265 } else if (!parse_val("queue", args, &val)) {
1268 } else if (!parse_val("tcbhash", args, &val)) {
1270 t.fs.dirsteerhash = 1;
1271 } else if (!parse_val("eport", args, &val)) {
1273 } else if (!parse_val("swapmac", args, &val)) {
1275 } else if (!strcmp(argv[start_arg], "nat")) {
1276 if (!strcmp(argv[start_arg + 1], "dip"))
1277 t.fs.nat_mode = NAT_MODE_DIP;
1278 else if (!strcmp(argv[start_arg + 1], "dip-dp"))
1279 t.fs.nat_mode = NAT_MODE_DIP_DP;
1280 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip"))
1281 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP;
1282 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp"))
1283 t.fs.nat_mode = NAT_MODE_DIP_DP_SP;
1284 else if (!strcmp(argv[start_arg + 1], "sip-sp"))
1285 t.fs.nat_mode = NAT_MODE_SIP_SP;
1286 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp"))
1287 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP;
1288 else if (!strcmp(argv[start_arg + 1], "all"))
1289 t.fs.nat_mode = NAT_MODE_ALL;
1291 warnx("unknown nat type \"%s\"; known types are dip, "
1292 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, "
1293 "dip-sip-sp, and all", argv[start_arg + 1]);
1296 } else if (!parse_val("natseq", args, &val)) {
1297 t.fs.nat_seq_chk = val;
1298 } else if (!parse_val("natflag", args, &val)) {
1299 t.fs.nat_flag_chk = 1;
1300 } else if (!strcmp(argv[start_arg], "dmac")) {
1301 struct ether_addr *daddr;
1303 daddr = ether_aton(argv[start_arg + 1]);
1304 if (daddr == NULL) {
1305 warnx("invalid dmac address \"%s\"",
1306 argv[start_arg + 1]);
1309 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1311 } else if (!strcmp(argv[start_arg], "smac")) {
1312 struct ether_addr *saddr;
1314 saddr = ether_aton(argv[start_arg + 1]);
1315 if (saddr == NULL) {
1316 warnx("invalid smac address \"%s\"",
1317 argv[start_arg + 1]);
1320 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1322 } else if (!strcmp(argv[start_arg], "vlan")) {
1324 if (!strcmp(argv[start_arg + 1], "none")) {
1325 t.fs.newvlan = VLAN_REMOVE;
1326 } else if (argv[start_arg + 1][0] == '=') {
1327 t.fs.newvlan = VLAN_REWRITE;
1328 } else if (argv[start_arg + 1][0] == '+') {
1329 t.fs.newvlan = VLAN_INSERT;
1331 warnx("unknown vlan parameter \"%s\"; must"
1332 " be one of \"none\", \"=<vlan>\", "
1333 " \"+<vlan>\"", argv[start_arg + 1]);
1336 if (t.fs.newvlan == VLAN_REWRITE ||
1337 t.fs.newvlan == VLAN_INSERT) {
1338 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1340 if (p == argv[start_arg + 1] + 1 || p[0] != 0 ||
1341 t.fs.vlan > MAX_VLANID) {
1342 warnx("invalid vlan \"%s\"",
1343 argv[start_arg + 1]);
1348 warnx("invalid parameter \"%s\"", argv[start_arg]);
1352 if (start_arg != argc) {
1353 warnx("no value for \"%s\"", argv[start_arg]);
1358 * Check basic sanity of option combinations.
1360 if (t.fs.action != FILTER_SWITCH &&
1361 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan ||
1362 t.fs.swapmac || t.fs.nat_mode)) {
1363 warnx("port, dmac, smac, vlan, and nat only make sense with"
1364 " \"action switch\"");
1367 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk ||
1368 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) {
1369 warnx("nat params only make sense with valid nat mode");
1372 if (t.fs.action != FILTER_PASS &&
1373 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1374 warnx("rpttid, queue and tcbhash don't make sense with"
1375 " action \"drop\" or \"switch\"");
1378 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1379 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1383 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1384 rc = doit(CHELSIO_T4_SET_FILTER, &t);
1385 if (hash && rc == 0)
1386 printf("%d\n", t.idx);
1391 filter_cmd(int argc, const char *argv[], int hashfilter)
1398 warnx("%sfilter: no arguments.", hashfilter ? "hash" : "");
1403 if (strcmp(argv[0], "list") == 0) {
1405 warnx("trailing arguments after \"list\" ignored.");
1407 return show_filters(hashfilter);
1411 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1412 return get_filter_mode(hashfilter);
1415 if (!hashfilter && strcmp(argv[0], "mode") == 0)
1416 return set_filter_mode(argc - 1, argv + 1);
1419 s = str_to_number(argv[0], NULL, &val);
1420 if (*s || val < 0 || val > 0xffffffffU) {
1423 * No numeric index means this must be a request to
1424 * create a new hashfilter and we are already at the
1425 * paramter/value list.
1427 idx = (uint32_t) -1;
1430 warnx("\"%s\" is neither an index nor a filter subcommand.",
1434 idx = (uint32_t) val;
1436 /* <idx> delete|clear [prio 0|1] */
1437 if ((argc == 2 || argc == 4) &&
1438 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1443 warnx("stray arguments after \"%s\".", argv[1]);
1447 if (strcmp(argv[2], "prio") != 0) {
1448 warnx("\"prio\" is the only valid keyword "
1449 "after \"%s\", found \"%s\" instead.",
1454 s = str_to_number(argv[3], NULL, &val);
1455 if (*s || val < 0 || val > 1) {
1456 warnx("%s \"%s\"; must be \"0\" or \"1\".",
1462 return del_filter(idx, prio, hashfilter);
1470 /* [<param> <val>] ... */
1471 return set_filter(idx, argc, argv, hashfilter);
1475 * Shows the fields of a multi-word structure. The structure is considered to
1476 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1477 * whose fields are described by @fd. The 32-bit words are given in @words
1478 * starting with the least significant 32-bit word.
1481 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1484 const struct field_desc *p;
1486 for (p = fd; p->name; p++)
1487 w = max(w, strlen(p->name));
1490 unsigned long long data;
1491 int first_word = fd->start / 32;
1492 int shift = fd->start % 32;
1493 int width = fd->end - fd->start + 1;
1494 unsigned long long mask = (1ULL << width) - 1;
1496 data = (words[first_word] >> shift) |
1497 ((uint64_t)words[first_word + 1] << (32 - shift));
1499 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1503 printf("%-*s ", w, fd->name);
1504 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1509 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1510 #define FIELD1(name, start) FIELD(name, start, start)
1513 show_t5t6_ctxt(const struct t4_sge_context *p, int vers)
1515 static struct field_desc egress_t5[] = {
1516 FIELD("DCA_ST:", 181, 191),
1517 FIELD1("StatusPgNS:", 180),
1518 FIELD1("StatusPgRO:", 179),
1519 FIELD1("FetchNS:", 178),
1520 FIELD1("FetchRO:", 177),
1521 FIELD1("Valid:", 176),
1522 FIELD("PCIeDataChannel:", 174, 175),
1523 FIELD1("StatusPgTPHintEn:", 173),
1524 FIELD("StatusPgTPHint:", 171, 172),
1525 FIELD1("FetchTPHintEn:", 170),
1526 FIELD("FetchTPHint:", 168, 169),
1527 FIELD1("FCThreshOverride:", 167),
1528 { "WRLength:", 162, 166, 9, 0, 1 },
1529 FIELD1("WRLengthKnown:", 161),
1530 FIELD1("ReschedulePending:", 160),
1531 FIELD1("OnChipQueue:", 159),
1532 FIELD1("FetchSizeMode:", 158),
1533 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1534 FIELD1("FLMPacking:", 155),
1535 FIELD("FetchBurstMax:", 153, 154),
1536 FIELD("uPToken:", 133, 152),
1537 FIELD1("uPTokenEn:", 132),
1538 FIELD1("UserModeIO:", 131),
1539 FIELD("uPFLCredits:", 123, 130),
1540 FIELD1("uPFLCreditEn:", 122),
1541 FIELD("FID:", 111, 121),
1542 FIELD("HostFCMode:", 109, 110),
1543 FIELD1("HostFCOwner:", 108),
1544 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1545 FIELD("CIDX:", 89, 104),
1546 FIELD("PIDX:", 73, 88),
1547 { "BaseAddress:", 18, 72, 9, 1 },
1548 FIELD("QueueSize:", 2, 17),
1549 FIELD1("QueueType:", 1),
1550 FIELD1("CachePriority:", 0),
1553 static struct field_desc egress_t6[] = {
1554 FIELD("DCA_ST:", 181, 191),
1555 FIELD1("StatusPgNS:", 180),
1556 FIELD1("StatusPgRO:", 179),
1557 FIELD1("FetchNS:", 178),
1558 FIELD1("FetchRO:", 177),
1559 FIELD1("Valid:", 176),
1560 FIELD1("ReschedulePending_1:", 175),
1561 FIELD1("PCIeDataChannel:", 174),
1562 FIELD1("StatusPgTPHintEn:", 173),
1563 FIELD("StatusPgTPHint:", 171, 172),
1564 FIELD1("FetchTPHintEn:", 170),
1565 FIELD("FetchTPHint:", 168, 169),
1566 FIELD1("FCThreshOverride:", 167),
1567 { "WRLength:", 162, 166, 9, 0, 1 },
1568 FIELD1("WRLengthKnown:", 161),
1569 FIELD1("ReschedulePending:", 160),
1570 FIELD("TimerIx:", 157, 159),
1571 FIELD1("FetchBurstMin:", 156),
1572 FIELD1("FLMPacking:", 155),
1573 FIELD("FetchBurstMax:", 153, 154),
1574 FIELD("uPToken:", 133, 152),
1575 FIELD1("uPTokenEn:", 132),
1576 FIELD1("UserModeIO:", 131),
1577 FIELD("uPFLCredits:", 123, 130),
1578 FIELD1("uPFLCreditEn:", 122),
1579 FIELD("FID:", 111, 121),
1580 FIELD("HostFCMode:", 109, 110),
1581 FIELD1("HostFCOwner:", 108),
1582 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1583 FIELD("CIDX:", 89, 104),
1584 FIELD("PIDX:", 73, 88),
1585 { "BaseAddress:", 18, 72, 9, 1 },
1586 FIELD("QueueSize:", 2, 17),
1587 FIELD1("QueueType:", 1),
1588 FIELD1("FetchSizeMode:", 0),
1591 static struct field_desc fl_t5[] = {
1592 FIELD("DCA_ST:", 181, 191),
1593 FIELD1("StatusPgNS:", 180),
1594 FIELD1("StatusPgRO:", 179),
1595 FIELD1("FetchNS:", 178),
1596 FIELD1("FetchRO:", 177),
1597 FIELD1("Valid:", 176),
1598 FIELD("PCIeDataChannel:", 174, 175),
1599 FIELD1("StatusPgTPHintEn:", 173),
1600 FIELD("StatusPgTPHint:", 171, 172),
1601 FIELD1("FetchTPHintEn:", 170),
1602 FIELD("FetchTPHint:", 168, 169),
1603 FIELD1("FCThreshOverride:", 167),
1604 FIELD1("ReschedulePending:", 160),
1605 FIELD1("OnChipQueue:", 159),
1606 FIELD1("FetchSizeMode:", 158),
1607 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1608 FIELD1("FLMPacking:", 155),
1609 FIELD("FetchBurstMax:", 153, 154),
1610 FIELD1("FLMcongMode:", 152),
1611 FIELD("MaxuPFLCredits:", 144, 151),
1612 FIELD("FLMcontextID:", 133, 143),
1613 FIELD1("uPTokenEn:", 132),
1614 FIELD1("UserModeIO:", 131),
1615 FIELD("uPFLCredits:", 123, 130),
1616 FIELD1("uPFLCreditEn:", 122),
1617 FIELD("FID:", 111, 121),
1618 FIELD("HostFCMode:", 109, 110),
1619 FIELD1("HostFCOwner:", 108),
1620 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1621 FIELD("CIDX:", 89, 104),
1622 FIELD("PIDX:", 73, 88),
1623 { "BaseAddress:", 18, 72, 9, 1 },
1624 FIELD("QueueSize:", 2, 17),
1625 FIELD1("QueueType:", 1),
1626 FIELD1("CachePriority:", 0),
1629 static struct field_desc ingress_t5[] = {
1630 FIELD("DCA_ST:", 143, 153),
1631 FIELD1("ISCSICoalescing:", 142),
1632 FIELD1("Queue_Valid:", 141),
1633 FIELD1("TimerPending:", 140),
1634 FIELD1("DropRSS:", 139),
1635 FIELD("PCIeChannel:", 137, 138),
1636 FIELD1("SEInterruptArmed:", 136),
1637 FIELD1("CongestionMgtEnable:", 135),
1638 FIELD1("NoSnoop:", 134),
1639 FIELD1("RelaxedOrdering:", 133),
1640 FIELD1("GTSmode:", 132),
1641 FIELD1("TPHintEn:", 131),
1642 FIELD("TPHint:", 129, 130),
1643 FIELD1("UpdateScheduling:", 128),
1644 FIELD("UpdateDelivery:", 126, 127),
1645 FIELD1("InterruptSent:", 125),
1646 FIELD("InterruptIDX:", 114, 124),
1647 FIELD1("InterruptDestination:", 113),
1648 FIELD1("InterruptArmed:", 112),
1649 FIELD("RxIntCounter:", 106, 111),
1650 FIELD("RxIntCounterThreshold:", 104, 105),
1651 FIELD1("Generation:", 103),
1652 { "BaseAddress:", 48, 102, 9, 1 },
1653 FIELD("PIDX:", 32, 47),
1654 FIELD("CIDX:", 16, 31),
1655 { "QueueSize:", 4, 15, 4, 0 },
1656 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1657 FIELD1("QueueEntryOverride:", 1),
1658 FIELD1("CachePriority:", 0),
1661 static struct field_desc ingress_t6[] = {
1662 FIELD1("SP_NS:", 158),
1663 FIELD1("SP_RO:", 157),
1664 FIELD1("SP_TPHintEn:", 156),
1665 FIELD("SP_TPHint:", 154, 155),
1666 FIELD("DCA_ST:", 143, 153),
1667 FIELD1("ISCSICoalescing:", 142),
1668 FIELD1("Queue_Valid:", 141),
1669 FIELD1("TimerPending:", 140),
1670 FIELD1("DropRSS:", 139),
1671 FIELD("PCIeChannel:", 137, 138),
1672 FIELD1("SEInterruptArmed:", 136),
1673 FIELD1("CongestionMgtEnable:", 135),
1674 FIELD1("NoSnoop:", 134),
1675 FIELD1("RelaxedOrdering:", 133),
1676 FIELD1("GTSmode:", 132),
1677 FIELD1("TPHintEn:", 131),
1678 FIELD("TPHint:", 129, 130),
1679 FIELD1("UpdateScheduling:", 128),
1680 FIELD("UpdateDelivery:", 126, 127),
1681 FIELD1("InterruptSent:", 125),
1682 FIELD("InterruptIDX:", 114, 124),
1683 FIELD1("InterruptDestination:", 113),
1684 FIELD1("InterruptArmed:", 112),
1685 FIELD("RxIntCounter:", 106, 111),
1686 FIELD("RxIntCounterThreshold:", 104, 105),
1687 FIELD1("Generation:", 103),
1688 { "BaseAddress:", 48, 102, 9, 1 },
1689 FIELD("PIDX:", 32, 47),
1690 FIELD("CIDX:", 16, 31),
1691 { "QueueSize:", 4, 15, 4, 0 },
1692 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1693 FIELD1("QueueEntryOverride:", 1),
1694 FIELD1("CachePriority:", 0),
1697 static struct field_desc flm_t5[] = {
1698 FIELD1("Valid:", 89),
1699 FIELD("SplitLenMode:", 87, 88),
1700 FIELD1("TPHintEn:", 86),
1701 FIELD("TPHint:", 84, 85),
1702 FIELD1("NoSnoop:", 83),
1703 FIELD1("RelaxedOrdering:", 82),
1704 FIELD("DCA_ST:", 71, 81),
1705 FIELD("EQid:", 54, 70),
1706 FIELD("SplitEn:", 52, 53),
1707 FIELD1("PadEn:", 51),
1708 FIELD1("PackEn:", 50),
1709 FIELD1("Cache_Lock :", 49),
1710 FIELD1("CongDrop:", 48),
1711 FIELD("PackOffset:", 16, 47),
1712 FIELD("CIDX:", 8, 15),
1713 FIELD("PIDX:", 0, 7),
1716 static struct field_desc flm_t6[] = {
1717 FIELD1("Valid:", 89),
1718 FIELD("SplitLenMode:", 87, 88),
1719 FIELD1("TPHintEn:", 86),
1720 FIELD("TPHint:", 84, 85),
1721 FIELD1("NoSnoop:", 83),
1722 FIELD1("RelaxedOrdering:", 82),
1723 FIELD("DCA_ST:", 71, 81),
1724 FIELD("EQid:", 54, 70),
1725 FIELD("SplitEn:", 52, 53),
1726 FIELD1("PadEn:", 51),
1727 FIELD1("PackEn:", 50),
1728 FIELD1("Cache_Lock :", 49),
1729 FIELD1("CongDrop:", 48),
1730 FIELD1("Inflight:", 47),
1731 FIELD1("CongEn:", 46),
1732 FIELD1("CongMode:", 45),
1733 FIELD("PackOffset:", 20, 39),
1734 FIELD("CIDX:", 8, 15),
1735 FIELD("PIDX:", 0, 7),
1738 static struct field_desc conm_t5[] = {
1739 FIELD1("CngMPSEnable:", 21),
1740 FIELD("CngTPMode:", 19, 20),
1741 FIELD1("CngDBPHdr:", 18),
1742 FIELD1("CngDBPData:", 17),
1743 FIELD1("CngIMSG:", 16),
1744 { "CngChMap:", 0, 15, 0, 1, 0 },
1748 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1750 show_struct(p->data, 6, fl_t5);
1752 show_struct(p->data, 6, egress_t5);
1754 show_struct(p->data, 6, egress_t6);
1755 } else if (p->mem_id == SGE_CONTEXT_FLM)
1756 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1757 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1758 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1759 else if (p->mem_id == SGE_CONTEXT_CNM)
1760 show_struct(p->data, 1, conm_t5);
1764 show_t4_ctxt(const struct t4_sge_context *p)
1766 static struct field_desc egress_t4[] = {
1767 FIELD1("StatusPgNS:", 180),
1768 FIELD1("StatusPgRO:", 179),
1769 FIELD1("FetchNS:", 178),
1770 FIELD1("FetchRO:", 177),
1771 FIELD1("Valid:", 176),
1772 FIELD("PCIeDataChannel:", 174, 175),
1773 FIELD1("DCAEgrQEn:", 173),
1774 FIELD("DCACPUID:", 168, 172),
1775 FIELD1("FCThreshOverride:", 167),
1776 FIELD("WRLength:", 162, 166),
1777 FIELD1("WRLengthKnown:", 161),
1778 FIELD1("ReschedulePending:", 160),
1779 FIELD1("OnChipQueue:", 159),
1780 FIELD1("FetchSizeMode", 158),
1781 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1782 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1783 FIELD("uPToken:", 133, 152),
1784 FIELD1("uPTokenEn:", 132),
1785 FIELD1("UserModeIO:", 131),
1786 FIELD("uPFLCredits:", 123, 130),
1787 FIELD1("uPFLCreditEn:", 122),
1788 FIELD("FID:", 111, 121),
1789 FIELD("HostFCMode:", 109, 110),
1790 FIELD1("HostFCOwner:", 108),
1791 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1792 FIELD("CIDX:", 89, 104),
1793 FIELD("PIDX:", 73, 88),
1794 { "BaseAddress:", 18, 72, 9, 1 },
1795 FIELD("QueueSize:", 2, 17),
1796 FIELD1("QueueType:", 1),
1797 FIELD1("CachePriority:", 0),
1800 static struct field_desc fl_t4[] = {
1801 FIELD1("StatusPgNS:", 180),
1802 FIELD1("StatusPgRO:", 179),
1803 FIELD1("FetchNS:", 178),
1804 FIELD1("FetchRO:", 177),
1805 FIELD1("Valid:", 176),
1806 FIELD("PCIeDataChannel:", 174, 175),
1807 FIELD1("DCAEgrQEn:", 173),
1808 FIELD("DCACPUID:", 168, 172),
1809 FIELD1("FCThreshOverride:", 167),
1810 FIELD1("ReschedulePending:", 160),
1811 FIELD1("OnChipQueue:", 159),
1812 FIELD1("FetchSizeMode", 158),
1813 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1814 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1815 FIELD1("FLMcongMode:", 152),
1816 FIELD("MaxuPFLCredits:", 144, 151),
1817 FIELD("FLMcontextID:", 133, 143),
1818 FIELD1("uPTokenEn:", 132),
1819 FIELD1("UserModeIO:", 131),
1820 FIELD("uPFLCredits:", 123, 130),
1821 FIELD1("uPFLCreditEn:", 122),
1822 FIELD("FID:", 111, 121),
1823 FIELD("HostFCMode:", 109, 110),
1824 FIELD1("HostFCOwner:", 108),
1825 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1826 FIELD("CIDX:", 89, 104),
1827 FIELD("PIDX:", 73, 88),
1828 { "BaseAddress:", 18, 72, 9, 1 },
1829 FIELD("QueueSize:", 2, 17),
1830 FIELD1("QueueType:", 1),
1831 FIELD1("CachePriority:", 0),
1834 static struct field_desc ingress_t4[] = {
1835 FIELD1("NoSnoop:", 145),
1836 FIELD1("RelaxedOrdering:", 144),
1837 FIELD1("GTSmode:", 143),
1838 FIELD1("ISCSICoalescing:", 142),
1839 FIELD1("Valid:", 141),
1840 FIELD1("TimerPending:", 140),
1841 FIELD1("DropRSS:", 139),
1842 FIELD("PCIeChannel:", 137, 138),
1843 FIELD1("SEInterruptArmed:", 136),
1844 FIELD1("CongestionMgtEnable:", 135),
1845 FIELD1("DCAIngQEnable:", 134),
1846 FIELD("DCACPUID:", 129, 133),
1847 FIELD1("UpdateScheduling:", 128),
1848 FIELD("UpdateDelivery:", 126, 127),
1849 FIELD1("InterruptSent:", 125),
1850 FIELD("InterruptIDX:", 114, 124),
1851 FIELD1("InterruptDestination:", 113),
1852 FIELD1("InterruptArmed:", 112),
1853 FIELD("RxIntCounter:", 106, 111),
1854 FIELD("RxIntCounterThreshold:", 104, 105),
1855 FIELD1("Generation:", 103),
1856 { "BaseAddress:", 48, 102, 9, 1 },
1857 FIELD("PIDX:", 32, 47),
1858 FIELD("CIDX:", 16, 31),
1859 { "QueueSize:", 4, 15, 4, 0 },
1860 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1861 FIELD1("QueueEntryOverride:", 1),
1862 FIELD1("CachePriority:", 0),
1865 static struct field_desc flm_t4[] = {
1866 FIELD1("NoSnoop:", 79),
1867 FIELD1("RelaxedOrdering:", 78),
1868 FIELD1("Valid:", 77),
1869 FIELD("DCACPUID:", 72, 76),
1870 FIELD1("DCAFLEn:", 71),
1871 FIELD("EQid:", 54, 70),
1872 FIELD("SplitEn:", 52, 53),
1873 FIELD1("PadEn:", 51),
1874 FIELD1("PackEn:", 50),
1875 FIELD1("DBpriority:", 48),
1876 FIELD("PackOffset:", 16, 47),
1877 FIELD("CIDX:", 8, 15),
1878 FIELD("PIDX:", 0, 7),
1881 static struct field_desc conm_t4[] = {
1882 FIELD1("CngDBPHdr:", 6),
1883 FIELD1("CngDBPData:", 5),
1884 FIELD1("CngIMSG:", 4),
1885 { "CngChMap:", 0, 3, 0, 1, 0},
1889 if (p->mem_id == SGE_CONTEXT_EGRESS)
1890 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
1891 else if (p->mem_id == SGE_CONTEXT_FLM)
1892 show_struct(p->data, 3, flm_t4);
1893 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1894 show_struct(p->data, 5, ingress_t4);
1895 else if (p->mem_id == SGE_CONTEXT_CNM)
1896 show_struct(p->data, 1, conm_t4);
1903 get_sge_context(int argc, const char *argv[])
1908 struct t4_sge_context cntxt = {0};
1911 warnx("sge_context: incorrect number of arguments.");
1915 if (!strcmp(argv[0], "egress"))
1916 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1917 else if (!strcmp(argv[0], "ingress"))
1918 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1919 else if (!strcmp(argv[0], "fl"))
1920 cntxt.mem_id = SGE_CONTEXT_FLM;
1921 else if (!strcmp(argv[0], "cong"))
1922 cntxt.mem_id = SGE_CONTEXT_CNM;
1924 warnx("unknown context type \"%s\"; known types are egress, "
1925 "ingress, fl, and cong.", argv[0]);
1929 p = str_to_number(argv[1], &cid, NULL);
1931 warnx("invalid context id \"%s\"", argv[1]);
1936 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1941 show_t4_ctxt(&cntxt);
1943 show_t5t6_ctxt(&cntxt, chip_id);
1949 loadfw(int argc, const char *argv[])
1952 struct t4_data data = {0};
1953 const char *fname = argv[0];
1954 struct stat st = {0};
1957 warnx("loadfw: incorrect number of arguments.");
1961 fd = open(fname, O_RDONLY);
1963 warn("open(%s)", fname);
1967 if (fstat(fd, &st) < 0) {
1973 data.len = st.st_size;
1974 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
1975 if (data.data == MAP_FAILED) {
1981 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1982 munmap(data.data, data.len);
1988 loadcfg(int argc, const char *argv[])
1991 struct t4_data data = {0};
1992 const char *fname = argv[0];
1993 struct stat st = {0};
1996 warnx("loadcfg: incorrect number of arguments.");
2000 if (strcmp(fname, "clear") == 0)
2001 return (doit(CHELSIO_T4_LOAD_CFG, &data));
2003 fd = open(fname, O_RDONLY);
2005 warn("open(%s)", fname);
2009 if (fstat(fd, &st) < 0) {
2015 data.len = st.st_size;
2016 data.len &= ~3; /* Clip off to make it a multiple of 4 */
2017 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
2018 if (data.data == MAP_FAILED) {
2024 rc = doit(CHELSIO_T4_LOAD_CFG, &data);
2025 munmap(data.data, data.len);
2031 dumpstate(int argc, const char *argv[])
2034 struct t4_cudbg_dump dump = {0};
2035 const char *fname = argv[0];
2038 warnx("dumpstate: incorrect number of arguments.");
2043 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap));
2044 dump.len = 8 * 1024 * 1024;
2045 dump.data = malloc(dump.len);
2046 if (dump.data == NULL) {
2050 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump);
2054 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY,
2055 S_IRUSR | S_IRGRP | S_IROTH);
2057 warn("open(%s)", fname);
2061 write(fd, dump.data, dump.len);
2069 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
2072 struct t4_mem_range mr;
2076 mr.data = malloc(mr.len);
2079 warn("read_mem: malloc");
2083 rc = doit(CHELSIO_T4_GET_MEM, &mr);
2088 (*output)(mr.data, mr.len);
2095 loadboot(int argc, const char *argv[])
2100 struct t4_bootrom br = {0};
2101 const char *fname = argv[0];
2102 struct stat st = {0};
2107 } else if (argc == 3) {
2108 if (!strcmp(argv[1], "pf"))
2110 else if (!strcmp(argv[1], "offset"))
2115 p = str_to_number(argv[2], &l, NULL);
2120 warnx("loadboot: incorrect number of arguments.");
2124 if (strcmp(fname, "clear") == 0)
2125 return (doit(CHELSIO_T4_LOAD_BOOT, &br));
2127 fd = open(fname, O_RDONLY);
2129 warn("open(%s)", fname);
2133 if (fstat(fd, &st) < 0) {
2139 br.len = st.st_size;
2140 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0);
2141 if (br.data == MAP_FAILED) {
2147 rc = doit(CHELSIO_T4_LOAD_BOOT, &br);
2148 munmap(br.data, br.len);
2154 loadbootcfg(int argc, const char *argv[])
2157 struct t4_data bc = {0};
2158 const char *fname = argv[0];
2159 struct stat st = {0};
2162 warnx("loadbootcfg: incorrect number of arguments.");
2166 if (strcmp(fname, "clear") == 0)
2167 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc));
2169 fd = open(fname, O_RDONLY);
2171 warn("open(%s)", fname);
2175 if (fstat(fd, &st) < 0) {
2181 bc.len = st.st_size;
2182 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0);
2183 if (bc.data == MAP_FAILED) {
2189 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc);
2190 munmap(bc.data, bc.len);
2196 * Display memory as list of 'n' 4-byte values per line.
2199 show_mem(uint32_t *buf, uint32_t len)
2205 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2207 printf("%s%08x", s, htonl(*buf));
2214 memdump(int argc, const char *argv[])
2221 warnx("incorrect number of arguments.");
2225 p = str_to_number(argv[0], &l, NULL);
2227 warnx("invalid address \"%s\"", argv[0]);
2232 p = str_to_number(argv[1], &l, NULL);
2234 warnx("memdump: invalid length \"%s\"", argv[1]);
2239 return (read_mem(addr, len, show_mem));
2243 * Display TCB as list of 'n' 4-byte values per line.
2246 show_tcb(uint32_t *buf, uint32_t len)
2248 unsigned char *tcb = (unsigned char *)buf;
2253 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2255 printf("%s%08x", s, htonl(*buf));
2259 set_tcb_info(TIDTYPE_TCB, chip_id);
2260 set_print_style(PRNTSTYL_COMP);
2262 parse_n_display_xcb(tcb);
2265 #define A_TP_CMM_TCB_BASE 0x7d10
2266 #define TCB_SIZE 128
2268 read_tcb(int argc, const char *argv[])
2278 warnx("incorrect number of arguments.");
2282 p = str_to_number(argv[0], &l, NULL);
2284 warnx("invalid tid \"%s\"", argv[0]);
2289 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
2293 addr = val + tid * TCB_SIZE;
2295 return (read_mem(addr, TCB_SIZE, show_tcb));
2299 read_i2c(int argc, const char *argv[])
2303 struct t4_i2c_data i2cd;
2306 if (argc < 3 || argc > 4) {
2307 warnx("incorrect number of arguments.");
2311 p = str_to_number(argv[0], &l, NULL);
2312 if (*p || l > UCHAR_MAX) {
2313 warnx("invalid port id \"%s\"", argv[0]);
2318 p = str_to_number(argv[1], &l, NULL);
2319 if (*p || l > UCHAR_MAX) {
2320 warnx("invalid i2c device address \"%s\"", argv[1]);
2325 p = str_to_number(argv[2], &l, NULL);
2326 if (*p || l > UCHAR_MAX) {
2327 warnx("invalid byte offset \"%s\"", argv[2]);
2333 p = str_to_number(argv[3], &l, NULL);
2334 if (*p || l > sizeof(i2cd.data)) {
2335 warnx("invalid number of bytes \"%s\"", argv[3]);
2342 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2346 for (i = 0; i < i2cd.len; i++)
2347 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2353 clearstats(int argc, const char *argv[])
2360 warnx("incorrect number of arguments.");
2364 p = str_to_number(argv[0], &l, NULL);
2366 warnx("invalid port id \"%s\"", argv[0]);
2371 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2379 int rc, port_idx, i;
2382 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2383 rc = read_reg(0x9800, 4, &val);
2386 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2389 for (t.idx = 0; ; t.idx++) {
2390 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2391 if (rc != 0 || t.idx == 0xff)
2394 if (t.tp.port < 4) {
2396 port_idx = t.tp.port;
2397 } else if (t.tp.port < 8) {
2399 port_idx = t.tp.port - 4;
2400 } else if (t.tp.port < 12) {
2402 port_idx = t.tp.port - 8;
2403 } else if (t.tp.port < 16) {
2405 port_idx = t.tp.port - 12;
2406 } else if (t.tp.port < 20) {
2408 port_idx = t.tp.port - 16;
2411 port_idx = t.tp.port;
2414 printf("\ntracer %u (currently %s) captures ", t.idx,
2415 t.enabled ? "ENABLED" : "DISABLED");
2417 printf("port %u %s, ", port_idx, s);
2419 printf("%s %u, ", s, port_idx);
2420 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2422 printf("packets captured %smatch filter\n",
2423 t.tp.invert ? "do not " : "");
2424 if (t.tp.skip_ofst) {
2425 printf("filter pattern: ");
2426 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2427 printf("%08x%08x", t.tp.data[i],
2430 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2431 printf("%08x%08x", t.tp.mask[i],
2435 printf("filter pattern: ");
2436 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2437 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2439 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2440 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2441 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2448 tracer_onoff(uint8_t idx, int enabled)
2453 t.enabled = enabled;
2456 return doit(CHELSIO_T4_SET_TRACER, &t);
2460 create_tracing_ifnet()
2463 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL
2465 char *env[] = {NULL};
2468 close(STDERR_FILENO);
2469 execve(cmd[0], cmd, env);
2475 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2476 * matching). Right now this is a quick-n-dirty implementation that traces the
2477 * first 128B of all tx or rx on a port
2480 set_tracer(uint8_t idx, int argc, const char *argv[])
2485 bzero(&t, sizeof (t));
2491 warnx("must specify tx<n> or rx<n>.");
2495 len = strlen(argv[0]);
2497 warnx("argument must be 3 characters (tx<n> or rx<n>)");
2501 if (strncmp(argv[0], "tx", 2) == 0) {
2502 port = argv[0][2] - '0';
2503 if (port < 0 || port > 3) {
2504 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2508 } else if (strncmp(argv[0], "rx", 2) == 0) {
2509 port = argv[0][2] - '0';
2510 if (port < 0 || port > 3) {
2511 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2515 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2519 t.tp.snap_len = 128;
2526 create_tracing_ifnet();
2527 return doit(CHELSIO_T4_SET_TRACER, &t);
2531 tracer_cmd(int argc, const char *argv[])
2538 warnx("tracer: no arguments.");
2543 if (strcmp(argv[0], "list") == 0) {
2545 warnx("trailing arguments after \"list\" ignored.");
2547 return show_tracers();
2551 s = str_to_number(argv[0], NULL, &val);
2552 if (*s || val > 0xff) {
2553 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2560 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2561 return tracer_onoff(idx, 0);
2564 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2565 return tracer_onoff(idx, 1);
2568 return set_tracer(idx, argc - 1, argv + 1);
2572 modinfo_raw(int port_id)
2575 struct t4_i2c_data i2cd;
2578 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2579 bzero(&i2cd, sizeof(i2cd));
2580 i2cd.port_id = port_id;
2581 i2cd.dev_addr = 0xa0;
2582 i2cd.offset = offset;
2583 i2cd.len = sizeof(i2cd.data);
2584 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2587 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2588 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2589 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2592 printf(" %c%c%c%c %c%c%c%c\n",
2593 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2594 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2595 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2596 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2597 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2598 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2599 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2600 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2607 modinfo(int argc, const char *argv[])
2610 char string[16], *p;
2611 struct t4_i2c_data i2cd;
2613 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2616 warnx("must supply a port");
2621 warnx("too many arguments");
2625 p = str_to_number(argv[0], &port, NULL);
2626 if (*p || port > UCHAR_MAX) {
2627 warnx("invalid port id \"%s\"", argv[0]);
2632 if (!strcmp(argv[1], "raw"))
2633 return (modinfo_raw(port));
2635 warnx("second argument can only be \"raw\"");
2640 bzero(&i2cd, sizeof(i2cd));
2642 i2cd.port_id = port;
2643 i2cd.dev_addr = SFF_8472_BASE;
2645 i2cd.offset = SFF_8472_ID;
2646 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2649 if (i2cd.data[0] > SFF_8472_ID_LAST)
2650 printf("Unknown ID\n");
2652 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2654 bzero(&string, sizeof(string));
2655 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2657 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2659 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2661 printf("Vendor %s\n", string);
2663 bzero(&string, sizeof(string));
2664 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2666 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2668 string[i - SFF_8472_SN_START] = i2cd.data[0];
2670 printf("SN %s\n", string);
2672 bzero(&string, sizeof(string));
2673 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2675 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2677 string[i - SFF_8472_PN_START] = i2cd.data[0];
2679 printf("PN %s\n", string);
2681 bzero(&string, sizeof(string));
2682 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2684 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2686 string[i - SFF_8472_REV_START] = i2cd.data[0];
2688 printf("Rev %s\n", string);
2690 i2cd.offset = SFF_8472_DIAG_TYPE;
2691 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2694 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2695 SFF_8472_DIAG_INTERNAL)) {
2697 /* Switch to reading from the Diagnostic address. */
2698 i2cd.dev_addr = SFF_8472_DIAG;
2701 i2cd.offset = SFF_8472_TEMP;
2702 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2704 temp = i2cd.data[0] << 8;
2706 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2710 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2711 SFF_8472_TEMP_SHIFT);
2713 i2cd.offset = SFF_8472_VCC;
2714 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2716 vcc = i2cd.data[0] << 8;
2717 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2719 i2cd.offset = SFF_8472_TX_BIAS;
2720 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2722 tx_bias = i2cd.data[0] << 8;
2723 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2725 i2cd.offset = SFF_8472_TX_POWER;
2726 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2728 tx_power = i2cd.data[0] << 8;
2729 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2731 i2cd.offset = SFF_8472_RX_POWER;
2732 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2734 rx_power = i2cd.data[0] << 8;
2735 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2738 printf("Diagnostics not supported.\n");
2744 warnx("No module/cable in port %ld", port);
2749 /* XXX: pass in a low/high and do range checks as well */
2751 get_sched_param(const char *param, const char *args[], long *val)
2755 if (strcmp(param, args[0]) != 0)
2758 p = str_to_number(args[1], val, NULL);
2760 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2769 sched_class(int argc, const char *argv[])
2771 struct t4_sched_params op;
2774 memset(&op, 0xff, sizeof(op));
2778 warnx("missing scheduling sub-command");
2781 if (!strcmp(argv[0], "config")) {
2782 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2783 op.u.config.minmax = -1;
2784 } else if (!strcmp(argv[0], "params")) {
2785 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2786 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2787 op.u.params.ratemode = op.u.params.channel =
2788 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2789 op.u.params.weight = op.u.params.pktsize = -1;
2791 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2795 /* Decode remaining arguments ... */
2797 for (i = 1; i < argc; i += 2) {
2798 const char **args = &argv[i];
2801 if (i + 1 == argc) {
2802 warnx("missing argument for \"%s\"", args[0]);
2807 if (!strcmp(args[0], "type")) {
2808 if (!strcmp(args[1], "packet"))
2809 op.type = SCHED_CLASS_TYPE_PACKET;
2811 warnx("invalid type parameter \"%s\"", args[1]);
2818 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2819 if(!get_sched_param("minmax", args, &l))
2820 op.u.config.minmax = (int8_t)l;
2822 warnx("unknown scheduler config parameter "
2830 /* Rest applies only to SUBCMD_PARAMS */
2831 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
2834 if (!strcmp(args[0], "level")) {
2835 if (!strcmp(args[1], "cl-rl"))
2836 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
2837 else if (!strcmp(args[1], "cl-wrr"))
2838 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
2839 else if (!strcmp(args[1], "ch-rl"))
2840 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
2842 warnx("invalid level parameter \"%s\"",
2846 } else if (!strcmp(args[0], "mode")) {
2847 if (!strcmp(args[1], "class"))
2848 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
2849 else if (!strcmp(args[1], "flow"))
2850 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
2852 warnx("invalid mode parameter \"%s\"", args[1]);
2855 } else if (!strcmp(args[0], "rate-unit")) {
2856 if (!strcmp(args[1], "bits"))
2857 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
2858 else if (!strcmp(args[1], "pkts"))
2859 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
2861 warnx("invalid rate-unit parameter \"%s\"",
2865 } else if (!strcmp(args[0], "rate-mode")) {
2866 if (!strcmp(args[1], "relative"))
2867 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
2868 else if (!strcmp(args[1], "absolute"))
2869 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
2871 warnx("invalid rate-mode parameter \"%s\"",
2875 } else if (!get_sched_param("channel", args, &l))
2876 op.u.params.channel = (int8_t)l;
2877 else if (!get_sched_param("class", args, &l))
2878 op.u.params.cl = (int8_t)l;
2879 else if (!get_sched_param("min-rate", args, &l))
2880 op.u.params.minrate = (int32_t)l;
2881 else if (!get_sched_param("max-rate", args, &l))
2882 op.u.params.maxrate = (int32_t)l;
2883 else if (!get_sched_param("weight", args, &l))
2884 op.u.params.weight = (int16_t)l;
2885 else if (!get_sched_param("pkt-size", args, &l))
2886 op.u.params.pktsize = (int16_t)l;
2888 warnx("unknown scheduler parameter \"%s\"", args[0]);
2894 * Catch some logical fallacies in terms of argument combinations here
2895 * so we can offer more than just the EINVAL return from the driver.
2896 * The driver will be able to catch a lot more issues since it knows
2897 * the specifics of the device hardware capabilities like how many
2898 * channels, classes, etc. the device supports.
2901 warnx("sched \"type\" parameter missing");
2904 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
2905 if (op.u.config.minmax < 0) {
2906 warnx("sched config \"minmax\" parameter missing");
2910 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
2911 if (op.u.params.level < 0) {
2912 warnx("sched params \"level\" parameter missing");
2915 if (op.u.params.mode < 0 &&
2916 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2917 warnx("sched params \"mode\" parameter missing");
2920 if (op.u.params.rateunit < 0 &&
2921 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2922 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2923 warnx("sched params \"rate-unit\" parameter missing");
2926 if (op.u.params.ratemode < 0 &&
2927 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2928 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2929 warnx("sched params \"rate-mode\" parameter missing");
2932 if (op.u.params.channel < 0) {
2933 warnx("sched params \"channel\" missing");
2936 if (op.u.params.cl < 0 &&
2937 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2938 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) {
2939 warnx("sched params \"class\" missing");
2942 if (op.u.params.maxrate < 0 &&
2943 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2944 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2945 warnx("sched params \"max-rate\" missing for "
2946 "rate-limit level");
2949 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR &&
2950 (op.u.params.weight < 1 || op.u.params.weight > 99)) {
2951 warnx("sched params \"weight\" missing or invalid "
2952 "(not 1-99) for weighted-round-robin level");
2955 if (op.u.params.pktsize < 0 &&
2956 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
2957 warnx("sched params \"pkt-size\" missing for "
2958 "rate-limit level");
2961 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2962 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2963 warnx("sched params mode flow needs rate-mode absolute");
2966 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2967 !in_range(op.u.params.maxrate, 1, 100)) {
2968 warnx("sched params \"max-rate\" takes "
2969 "percentage value(1-100) for rate-mode relative");
2972 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2973 !in_range(op.u.params.maxrate, 1, 100000000)) {
2974 warnx("sched params \"max-rate\" takes "
2975 "value(1-100000000) for rate-mode absolute");
2978 if (op.u.params.maxrate > 0 &&
2979 op.u.params.maxrate < op.u.params.minrate) {
2980 warnx("sched params \"max-rate\" is less than "
2987 warnx("%d error%s in sched-class command", errs,
2988 errs == 1 ? "" : "s");
2992 return doit(CHELSIO_T4_SCHED_CLASS, &op);
2996 sched_queue(int argc, const char *argv[])
2998 struct t4_sched_queue op = {0};
3003 /* need "<port> <queue> <class> */
3004 warnx("incorrect number of arguments.");
3008 p = str_to_number(argv[0], &val, NULL);
3009 if (*p || val > UCHAR_MAX) {
3010 warnx("invalid port id \"%s\"", argv[0]);
3013 op.port = (uint8_t)val;
3015 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
3018 p = str_to_number(argv[1], &val, NULL);
3019 if (*p || val < -1) {
3020 warnx("invalid queue \"%s\"", argv[1]);
3023 op.queue = (int8_t)val;
3026 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
3029 p = str_to_number(argv[2], &val, NULL);
3030 if (*p || val < -1) {
3031 warnx("invalid class \"%s\"", argv[2]);
3034 op.cl = (int8_t)val;
3037 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
3041 parse_offload_settings_word(const char *s, char **pnext, const char *ws,
3042 int *pneg, struct offload_settings *os)
3050 if (!strcmp(s, "not")) {
3055 if (!strcmp(s, "offload")) {
3056 os->offload = (*pneg + 1) & 1;
3058 } else if (!strcmp(s , "coalesce")) {
3059 os->rx_coalesce = (*pneg + 1) & 1;
3061 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) {
3062 os->tstamp = (*pneg + 1) & 1;
3064 } else if (!strcmp(s, "sack")) {
3065 os->sack = (*pneg + 1) & 1;
3067 } else if (!strcmp(s, "nagle")) {
3068 os->nagle = (*pneg + 1) & 1;
3070 } else if (!strcmp(s, "ecn")) {
3071 os->ecn = (*pneg + 1) & 1;
3073 } else if (!strcmp(s, "ddp")) {
3074 os->ddp = (*pneg + 1) & 1;
3076 } else if (!strcmp(s, "tls")) {
3077 os->tls = (*pneg + 1) & 1;
3083 /* Settings with additional parameter handled here. */
3086 warnx("\"%s\" is not a valid keyword, or it does not "
3087 "support negation.", s);
3091 while ((param = strsep(pnext, ws)) != NULL) {
3095 if (param == NULL) {
3096 warnx("\"%s\" is not a valid keyword, or it requires a "
3097 "parameter that has not been provided.", s);
3101 if (!strcmp(s, "cong")) {
3102 if (!strcmp(param, "reno"))
3104 else if (!strcmp(param, "tahoe"))
3106 else if (!strcmp(param, "newreno"))
3108 else if (!strcmp(param, "highspeed"))
3111 warnx("unknown congestion algorithm \"%s\".", s);
3114 } else if (!strcmp(s, "class")) {
3116 p = str_to_number(param, &val, NULL);
3117 /* (nsched_cls - 1) is spelled 15 here. */
3118 if (*p || val < 0 || val > 15) {
3119 warnx("invalid scheduling class \"%s\". "
3120 "\"class\" needs an integer value where "
3121 "0 <= value <= 15", param);
3124 os->sched_class = val;
3125 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") ||
3126 !strcmp(s, "rxq")) {
3128 if (strcmp(param, "random")) {
3129 p = str_to_number(param, &val, NULL);
3130 if (*p || val < 0 || val > 0xffff) {
3131 warnx("invalid queue specification "
3132 "\"%s\". \"%s\" needs an integer"
3133 " value, or \"random\".",
3138 if (!strcmp(s, "bind")) {
3141 } else if (!strcmp(s, "txq")) {
3143 } else if (!strcmp(s, "rxq")) {
3148 } else if (!strcmp(s, "mss")) {
3150 p = str_to_number(param, &val, NULL);
3151 if (*p || val <= 0) {
3152 warnx("invalid MSS specification \"%s\". "
3153 "\"mss\" needs a positive integer value",
3159 warnx("unknown settings keyword: \"%s\"", s);
3168 parse_offload_settings(const char *settings_ro, struct offload_settings *os)
3170 const char *ws = " \f\n\r\v\t";
3171 char *settings, *s, *next;
3172 int rc, nsettings, neg;
3173 static const struct offload_settings default_settings = {
3174 .offload = 0, /* No settings imply !offload */
3189 *os = default_settings;
3191 next = settings = strdup(settings_ro);
3192 if (settings == NULL) {
3200 while ((s = strsep(&next, ws)) != NULL) {
3204 rc = parse_offload_settings_word(s, &next, ws, &neg, os);
3208 if (nsettings == 0) {
3209 warnx("no settings provided");
3214 warnx("%d stray negation(s) at end of offload settings", neg);
3224 isempty_line(char *line, size_t llen)
3227 /* skip leading whitespace */
3228 while (isspace(*line)) {
3232 if (llen == 0 || *line == '#' || *line == '\n')
3239 special_offload_rule(char *str)
3242 /* skip leading whitespaces */
3243 while (isspace(*str))
3246 /* check for special strings: "-", "all", "any" */
3249 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) {
3255 /* skip trailing whitespaces */
3256 while (isspace(*str))
3259 return (*str == '\0');
3263 * A rule has 3 parts: an open-type, a match expression, and offload settings.
3265 * [<open-type>] <expr> => <settings>
3268 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd,
3269 struct offload_rule *r)
3271 char *expr, *settings, *s;
3273 bzero(r, sizeof(*r));
3275 /* Skip leading whitespace. */
3276 while (isspace(*line))
3278 /* Trim trailing whitespace */
3279 s = &line[llen - 1];
3280 while (isspace(*s)) {
3286 * First part of the rule: '[X]' where X = A/D/L/P
3288 if (*line++ != '[') {
3289 warnx("missing \"[\" on line %zd", lno);
3297 r->open_type = *line;
3300 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno);
3304 if (*line++ != ']') {
3305 warnx("missing \"]\" after \"[%c\" on line %zd",
3310 /* Skip whitespace. */
3311 while (isspace(*line))
3315 * Rest of the rule: <expr> => <settings>
3318 s = strstr(line, "=>");
3322 while (isspace(*settings))
3327 * <expr> is either a special name (all, any) or a pcap-filter(7).
3328 * In case of a special name the bpf_prog stays all-zero.
3330 if (!special_offload_rule(expr)) {
3331 if (pcap_compile(pd, &r->bpf_prog, expr, 1,
3332 PCAP_NETMASK_UNKNOWN) < 0) {
3333 warnx("failed to compile \"%s\" on line %zd: %s", expr,
3334 lno, pcap_geterr(pd));
3339 /* settings to apply on a match. */
3340 if (parse_offload_settings(settings, &r->settings) != 0) {
3341 warnx("failed to parse offload settings \"%s\" on line %zd",
3343 pcap_freecode(&r->bpf_prog);
3352 * Note that op itself is not dynamically allocated.
3355 free_offload_policy(struct t4_offload_policy *op)
3359 for (i = 0; i < op->nrules; i++) {
3361 * pcap_freecode can cope with empty bpf_prog, which is the case
3362 * for an rule that matches on 'any/all/-'.
3364 pcap_freecode(&op->rule[i].bpf_prog);
3371 #define REALLOC_STRIDE 32
3374 * Fills up op->nrules and op->rule.
3377 parse_offload_policy(const char *fname, struct t4_offload_policy *op)
3381 int lno, maxrules, rc;
3383 struct offload_rule *r;
3386 fp = fopen(fname, "r");
3388 warn("Unable to open file \"%s\"", fname);
3391 pd = pcap_open_dead(DLT_EN10MB, 128);
3393 warnx("Failed to open pcap device");
3406 while ((llen = getline(&line, &lcap, fp)) != -1) {
3409 /* Skip empty lines. */
3410 if (isempty_line(line, llen))
3413 if (op->nrules == maxrules) {
3414 maxrules += REALLOC_STRIDE;
3415 r = realloc(op->rule,
3416 maxrules * sizeof(struct offload_rule));
3418 warnx("failed to allocate memory for %d rules",
3426 r = &op->rule[op->nrules];
3427 rc = parse_offload_policy_line(lno, line, llen, pd, r);
3429 warnx("Error parsing line %d of \"%s\"", lno, fname);
3438 warn("Error while reading from file \"%s\" at line %d",
3444 if (op->nrules == 0) {
3445 warnx("No valid rules found in \"%s\"", fname);
3452 free_offload_policy(op);
3459 load_offload_policy(int argc, const char *argv[])
3462 const char *fname = argv[0];
3463 struct t4_offload_policy op = {0};
3466 warnx("incorrect number of arguments.");
3470 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) {
3471 /* op.nrules is 0 and that means clear policy */
3472 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op));
3475 rc = parse_offload_policy(fname, &op);
3477 /* Error message displayed already */
3481 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op);
3482 free_offload_policy(&op);
3488 run_cmd(int argc, const char *argv[])
3491 const char *cmd = argv[0];
3497 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
3498 rc = register_io(argc, argv, 4);
3499 else if (!strcmp(cmd, "reg64"))
3500 rc = register_io(argc, argv, 8);
3501 else if (!strcmp(cmd, "regdump"))
3502 rc = dump_regs(argc, argv);
3503 else if (!strcmp(cmd, "filter"))
3504 rc = filter_cmd(argc, argv, 0);
3505 else if (!strcmp(cmd, "context"))
3506 rc = get_sge_context(argc, argv);
3507 else if (!strcmp(cmd, "loadfw"))
3508 rc = loadfw(argc, argv);
3509 else if (!strcmp(cmd, "memdump"))
3510 rc = memdump(argc, argv);
3511 else if (!strcmp(cmd, "tcb"))
3512 rc = read_tcb(argc, argv);
3513 else if (!strcmp(cmd, "i2c"))
3514 rc = read_i2c(argc, argv);
3515 else if (!strcmp(cmd, "clearstats"))
3516 rc = clearstats(argc, argv);
3517 else if (!strcmp(cmd, "tracer"))
3518 rc = tracer_cmd(argc, argv);
3519 else if (!strcmp(cmd, "modinfo"))
3520 rc = modinfo(argc, argv);
3521 else if (!strcmp(cmd, "sched-class"))
3522 rc = sched_class(argc, argv);
3523 else if (!strcmp(cmd, "sched-queue"))
3524 rc = sched_queue(argc, argv);
3525 else if (!strcmp(cmd, "loadcfg"))
3526 rc = loadcfg(argc, argv);
3527 else if (!strcmp(cmd, "loadboot"))
3528 rc = loadboot(argc, argv);
3529 else if (!strcmp(cmd, "loadboot-cfg"))
3530 rc = loadbootcfg(argc, argv);
3531 else if (!strcmp(cmd, "dumpstate"))
3532 rc = dumpstate(argc, argv);
3533 else if (!strcmp(cmd, "policy"))
3534 rc = load_offload_policy(argc, argv);
3535 else if (!strcmp(cmd, "hashfilter"))
3536 rc = filter_cmd(argc, argv, 1);
3539 warnx("invalid command \"%s\"", cmd);
3550 char buffer[128], *buf;
3551 const char *args[MAX_ARGS + 1];
3554 * Simple loop: displays a "> " prompt and processes any input as a
3555 * cxgbetool command. You're supposed to enter only the part after
3556 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
3559 fprintf(stdout, "> ");
3561 buf = fgets(buffer, sizeof(buffer), stdin);
3563 if (ferror(stdin)) {
3564 warn("stdin error");
3565 rc = errno; /* errno from fgets */
3571 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
3572 if (args[i][0] != 0 && ++i == MAX_ARGS)
3578 continue; /* skip empty line */
3580 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
3583 rc = run_cmd(i, args);
3586 /* rc normally comes from the last command (not including quit/exit) */
3591 main(int argc, const char *argv[])
3598 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
3610 chip_id = nexus[1] - '0';
3612 /* progname and nexus */
3616 if (argc == 1 && !strcmp(argv[0], "stdio"))
3617 rc = run_cmd_loop();
3619 rc = run_cmd(argc, argv);