2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Chelsio Communications, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 /* Auto-generated file. Avoid direct editing. */
33 /* Edits will be lost when file regenerated. */
35 #include "tcb_common.h"
36 _TCBVAR g_tcb_info5[]={
37 {"ulp_type" , 0, 0, 3, /* name,aux,lo,hi */
38 NULL , 0, 0, /* faka,flo,fhi */
39 "ulp_type" , /* aka */
40 COMP_NONE , /* comp */
41 "ULP mode: 0 =toe, 2=iscsi, 4=rdma, 5=ddp, 6=fcoe, 7=user, remaining values reserved", /*desc*/
44 {"ulp_raw" , 0, 4, 11, /* name,aux,lo,hi */
45 NULL , 0, 0, /* faka,flo,fhi */
48 "ULP subtype", /*desc*/
51 {"l2t_ix" , 0, 12, 23, /* name,aux,lo,hi */
52 NULL , 0, 0, /* faka,flo,fhi */
54 COMP_NONE , /* comp */
55 "Destination MAC address index", /*desc*/
58 {"smac_sel" , 0, 24, 31, /* name,aux,lo,hi */
59 NULL , 0, 0, /* faka,flo,fhi */
60 "smac_sel" , /* aka */
61 COMP_NONE , /* comp */
62 "Source MAC address index", /*desc*/
65 {"TF_MIGRATING" , 0, 32, 32, /* name,aux,lo,hi */
66 "t_flags" , 0, 0, /* faka,flo,fhi */
67 "migrating" , /* aka */
68 COMP_NONE , /* comp */
72 {"TF_NON_OFFLOAD" , 0, 33, 33, /* name,aux,lo,hi */
73 "t_flags" , 1, 1, /* faka,flo,fhi */
74 "non_offload" , /* aka */
75 COMP_NONE , /* comp */
79 {"TF_LOCK_TID" , 0, 34, 34, /* name,aux,lo,hi */
80 "t_flags" , 2, 2, /* faka,flo,fhi */
81 "lock_tid" , /* aka */
82 COMP_NONE , /* comp */
86 {"TF_KEEPALIVE" , 0, 35, 35, /* name,aux,lo,hi */
87 "t_flags" , 3, 3, /* faka,flo,fhi */
88 "keepalive" , /* aka */
89 COMP_NONE , /* comp */
93 {"TF_DACK" , 0, 36, 36, /* name,aux,lo,hi */
94 "t_flags" , 4, 4, /* faka,flo,fhi */
96 COMP_NONE , /* comp */
100 {"TF_DACK_MSS" , 0, 37, 37, /* name,aux,lo,hi */
101 "t_flags" , 5, 5, /* faka,flo,fhi */
102 "dack_mss" , /* aka */
103 COMP_NONE , /* comp */
107 {"TF_DACK_NOT_ACKED" , 0, 38, 38, /* name,aux,lo,hi */
108 "t_flags" , 6, 6, /* faka,flo,fhi */
109 "dack_not_acked" , /* aka */
110 COMP_NONE , /* comp */
114 {"TF_NAGLE" , 0, 39, 39, /* name,aux,lo,hi */
115 "t_flags" , 7, 7, /* faka,flo,fhi */
117 COMP_NONE , /* comp */
121 {"TF_SSWS_DISABLED" , 0, 40, 40, /* name,aux,lo,hi */
122 "t_flags" , 8, 8, /* faka,flo,fhi */
123 "ssws_disabled" , /* aka */
124 COMP_NONE , /* comp */
128 {"TF_RX_FLOW_CONTROL_DDP" , 0, 41, 41, /* name,aux,lo,hi */
129 "t_flags" , 9, 9, /* faka,flo,fhi */
130 "rx_flow_control_ddp" , /* aka */
131 COMP_NONE , /* comp */
135 {"TF_RX_FLOW_CONTROL_DISABLE" , 0, 42, 42, /* name,aux,lo,hi */
136 "t_flags" , 10, 10, /* faka,flo,fhi */
137 "rx_flow_control_disable" , /* aka */
138 COMP_NONE , /* comp */
142 {"TF_RX_CHANNEL" , 0, 43, 43, /* name,aux,lo,hi */
143 "t_flags" , 11, 11, /* faka,flo,fhi */
144 "rx_channel" , /* aka */
145 COMP_NONE , /* comp */
149 {"TF_TX_CHANNEL" , 0, 44, 45, /* name,aux,lo,hi */
150 "t_flags" , 12, 13, /* faka,flo,fhi */
151 "tx_channel" , /* aka */
152 COMP_NONE , /* comp */
156 {"TF_TX_QUIESCE" , 0, 46, 46, /* name,aux,lo,hi */
157 "t_flags" , 14, 14, /* faka,flo,fhi */
158 "tx_quiesce" , /* aka */
159 COMP_NONE , /* comp */
163 {"TF_RX_QUIESCE" , 0, 47, 47, /* name,aux,lo,hi */
164 "t_flags" , 15, 15, /* faka,flo,fhi */
165 "rx_quiesce" , /* aka */
166 COMP_NONE , /* comp */
170 {"TF_TX_PACE_AUTO" , 0, 48, 48, /* name,aux,lo,hi */
171 "t_flags" , 16, 16, /* faka,flo,fhi */
172 "tx_pace_auto" , /* aka */
173 COMP_NONE , /* comp */
177 {"TF_TX_PACE_FIXED" , 0, 49, 49, /* name,aux,lo,hi */
178 "t_flags" , 17, 17, /* faka,flo,fhi */
179 "tx_pace_fixed" , /* aka */
180 COMP_NONE , /* comp */
184 {"TF_TX_QUEUE" , 0, 50, 52, /* name,aux,lo,hi */
185 "t_flags" , 18, 20, /* faka,flo,fhi */
186 "tx_queue" , /* aka */
187 COMP_NONE , /* comp */
191 {"TF_TURBO" , 0, 53, 53, /* name,aux,lo,hi */
192 "t_flags" , 21, 21, /* faka,flo,fhi */
194 COMP_NONE , /* comp */
198 {"TF_CCTRL_SEL0" , 0, 54, 54, /* name,aux,lo,hi */
199 "t_flags" , 22, 22, /* faka,flo,fhi */
200 "cctrl_sel0" , /* aka */
201 COMP_NONE , /* comp */
205 {"TF_CCTRL_SEL1" , 0, 55, 55, /* name,aux,lo,hi */
206 "t_flags" , 23, 23, /* faka,flo,fhi */
207 "cctrl_sel1" , /* aka */
208 COMP_NONE , /* comp */
212 {"TF_CORE_FIN" , 0, 56, 56, /* name,aux,lo,hi */
213 "t_flags" , 24, 24, /* faka,flo,fhi */
214 "core_fin" , /* aka */
215 COMP_NONE , /* comp */
219 {"TF_CORE_URG" , 0, 57, 57, /* name,aux,lo,hi */
220 "t_flags" , 25, 25, /* faka,flo,fhi */
221 "core_urg" , /* aka */
222 COMP_NONE , /* comp */
226 {"TF_CORE_MORE" , 0, 58, 58, /* name,aux,lo,hi */
227 "t_flags" , 26, 26, /* faka,flo,fhi */
228 "core_more" , /* aka */
229 COMP_NONE , /* comp */
233 {"TF_CORE_PUSH" , 0, 59, 59, /* name,aux,lo,hi */
234 "t_flags" , 27, 27, /* faka,flo,fhi */
235 "core_push" , /* aka */
236 COMP_NONE , /* comp */
240 {"TF_CORE_FLUSH" , 0, 60, 60, /* name,aux,lo,hi */
241 "t_flags" , 28, 28, /* faka,flo,fhi */
242 "core_flush" , /* aka */
243 COMP_NONE , /* comp */
247 {"TF_RCV_COALESCE_ENABLE" , 0, 61, 61, /* name,aux,lo,hi */
248 "t_flags" , 29, 29, /* faka,flo,fhi */
249 "rcv_coalesce_enable" , /* aka */
250 COMP_NONE , /* comp */
254 {"TF_RCV_COALESCE_PUSH" , 0, 62, 62, /* name,aux,lo,hi */
255 "t_flags" , 30, 30, /* faka,flo,fhi */
256 "rcv_coalesce_push" , /* aka */
257 COMP_NONE , /* comp */
261 {"TF_RCV_COALESCE_LAST_PSH" , 0, 63, 63, /* name,aux,lo,hi */
262 "t_flags" , 31, 31, /* faka,flo,fhi */
263 "rcv_coalesce_last_psh" , /* aka */
264 COMP_NONE , /* comp */
268 {"TF_RCV_COALESCE_HEARTBEAT" , 0, 64, 64, /* name,aux,lo,hi */
269 "t_flags" , 32, 32, /* faka,flo,fhi */
270 "rcv_coalesce_heartbeat" , /* aka */
271 COMP_NONE , /* comp */
275 {"TF_RSS_FW" , 0, 65, 65, /* name,aux,lo,hi */
276 "t_flags" , 33, 33, /* faka,flo,fhi */
278 COMP_NONE , /* comp */
282 {"TF_ACTIVE_OPEN" , 0, 66, 66, /* name,aux,lo,hi */
283 "t_flags" , 34, 34, /* faka,flo,fhi */
284 "active_open" , /* aka */
285 COMP_NONE , /* comp */
289 {"TF_ASK_MODE" , 0, 67, 67, /* name,aux,lo,hi */
290 "t_flags" , 35, 35, /* faka,flo,fhi */
291 "ask_mode" , /* aka */
292 COMP_NONE , /* comp */
296 {"TF_MOD_SCHD_REASON0" , 0, 68, 68, /* name,aux,lo,hi */
297 "t_flags" , 36, 36, /* faka,flo,fhi */
298 "mod_schd_reason0" , /* aka */
299 COMP_NONE , /* comp */
303 {"TF_MOD_SCHD_REASON1" , 0, 69, 69, /* name,aux,lo,hi */
304 "t_flags" , 37, 37, /* faka,flo,fhi */
305 "mod_schd_reason1" , /* aka */
306 COMP_NONE , /* comp */
310 {"TF_MOD_SCHD_REASON2" , 0, 70, 70, /* name,aux,lo,hi */
311 "t_flags" , 38, 38, /* faka,flo,fhi */
312 "mod_schd_reason2" , /* aka */
313 COMP_NONE , /* comp */
317 {"TF_MOD_SCHD_TX" , 0, 71, 71, /* name,aux,lo,hi */
318 "t_flags" , 39, 39, /* faka,flo,fhi */
319 "mod_schd_tx" , /* aka */
320 COMP_NONE , /* comp */
324 {"TF_MOD_SCHD_RX" , 0, 72, 72, /* name,aux,lo,hi */
325 "t_flags" , 40, 40, /* faka,flo,fhi */
326 "mod_schd_rx" , /* aka */
327 COMP_NONE , /* comp */
331 {"TF_TIMER" , 0, 73, 73, /* name,aux,lo,hi */
332 "t_flags" , 41, 41, /* faka,flo,fhi */
334 COMP_NONE , /* comp */
338 {"TF_DACK_TIMER" , 0, 74, 74, /* name,aux,lo,hi */
339 "t_flags" , 42, 42, /* faka,flo,fhi */
340 "dack_timer" , /* aka */
341 COMP_NONE , /* comp */
345 {"TF_PEER_FIN" , 0, 75, 75, /* name,aux,lo,hi */
346 "t_flags" , 43, 43, /* faka,flo,fhi */
347 "peer_fin" , /* aka */
348 COMP_NONE , /* comp */
352 {"TF_TX_COMPACT" , 0, 76, 76, /* name,aux,lo,hi */
353 "t_flags" , 44, 44, /* faka,flo,fhi */
354 "tx_compact" , /* aka */
355 COMP_NONE , /* comp */
359 {"TF_RX_COMPACT" , 0, 77, 77, /* name,aux,lo,hi */
360 "t_flags" , 45, 45, /* faka,flo,fhi */
361 "rx_compact" , /* aka */
362 COMP_NONE , /* comp */
366 {"TF_RDMA_ERROR" , 0, 78, 78, /* name,aux,lo,hi */
367 "t_flags" , 46, 46, /* faka,flo,fhi */
368 "rdma_error" , /* aka */
369 COMP_NONE , /* comp */
373 {"TF_RDMA_FLM_ERROR" , 0, 79, 79, /* name,aux,lo,hi */
374 "t_flags" , 47, 47, /* faka,flo,fhi */
375 "rdma_flm_error" , /* aka */
376 COMP_NONE , /* comp */
380 {"TF_TX_PDU_OUT" , 0, 80, 80, /* name,aux,lo,hi */
381 "t_flags" , 48, 48, /* faka,flo,fhi */
382 "tx_pdu_out" , /* aka */
383 COMP_NONE , /* comp */
387 {"TF_RX_PDU_OUT" , 0, 81, 81, /* name,aux,lo,hi */
388 "t_flags" , 49, 49, /* faka,flo,fhi */
389 "rx_pdu_out" , /* aka */
390 COMP_NONE , /* comp */
394 {"TF_DUPACK_COUNT_ODD" , 0, 82, 82, /* name,aux,lo,hi */
395 "t_flags" , 50, 50, /* faka,flo,fhi */
396 "dupack_count_odd" , /* aka */
397 COMP_NONE , /* comp */
401 {"TF_FAST_RECOVERY" , 0, 83, 83, /* name,aux,lo,hi */
402 "t_flags" , 51, 51, /* faka,flo,fhi */
403 "fast_recovery" , /* aka */
404 COMP_NONE , /* comp */
408 {"TF_RECV_SCALE" , 0, 84, 84, /* name,aux,lo,hi */
409 "t_flags" , 52, 52, /* faka,flo,fhi */
410 "recv_scale" , /* aka */
411 COMP_NONE , /* comp */
415 {"TF_RECV_TSTMP" , 0, 85, 85, /* name,aux,lo,hi */
416 "t_flags" , 53, 53, /* faka,flo,fhi */
417 "recv_tstmp" , /* aka */
418 COMP_NONE , /* comp */
422 {"TF_RECV_SACK" , 0, 86, 86, /* name,aux,lo,hi */
423 "t_flags" , 54, 54, /* faka,flo,fhi */
424 "recv_sack" , /* aka */
425 COMP_NONE , /* comp */
429 {"TF_PEND_CTL0" , 0, 87, 87, /* name,aux,lo,hi */
430 "t_flags" , 55, 55, /* faka,flo,fhi */
431 "pend_ctl0" , /* aka */
432 COMP_NONE , /* comp */
436 {"TF_PEND_CTL1" , 0, 88, 88, /* name,aux,lo,hi */
437 "t_flags" , 56, 56, /* faka,flo,fhi */
438 "pend_ctl1" , /* aka */
439 COMP_NONE , /* comp */
443 {"TF_PEND_CTL2" , 0, 89, 89, /* name,aux,lo,hi */
444 "t_flags" , 57, 57, /* faka,flo,fhi */
445 "pend_ctl2" , /* aka */
446 COMP_NONE , /* comp */
450 {"TF_IP_VERSION" , 0, 90, 90, /* name,aux,lo,hi */
451 "t_flags" , 58, 58, /* faka,flo,fhi */
452 "ip_version" , /* aka */
453 COMP_NONE , /* comp */
457 {"TF_CCTRL_ECN" , 0, 91, 91, /* name,aux,lo,hi */
458 "t_flags" , 59, 59, /* faka,flo,fhi */
459 "cctrl_ecn" , /* aka */
460 COMP_NONE , /* comp */
464 {"TF_CCTRL_ECE" , 0, 92, 92, /* name,aux,lo,hi */
465 "t_flags" , 60, 60, /* faka,flo,fhi */
466 "cctrl_ece" , /* aka */
467 COMP_NONE , /* comp */
471 {"TF_CCTRL_CWR" , 0, 93, 93, /* name,aux,lo,hi */
472 "t_flags" , 61, 61, /* faka,flo,fhi */
473 "cctrl_cwr" , /* aka */
474 COMP_NONE , /* comp */
478 {"TF_CCTRL_RFR" , 0, 94, 94, /* name,aux,lo,hi */
479 "t_flags" , 62, 62, /* faka,flo,fhi */
480 "cctrl_rfr" , /* aka */
481 COMP_NONE , /* comp */
485 {"TF_UNUSED" , 0, 95, 95, /* name,aux,lo,hi */
486 "t_flags" , 63, 63, /* faka,flo,fhi */
488 COMP_NONE , /* comp */
492 {"rss_info" , 0, 96, 105, /* name,aux,lo,hi */
493 NULL , 0, 0, /* faka,flo,fhi */
494 "rss_info" , /* aka */
495 COMP_NONE , /* comp */
496 "RSS field", /*desc*/
499 {"tos" , 0, 106, 111, /* name,aux,lo,hi */
500 NULL , 0, 0, /* faka,flo,fhi */
502 COMP_NONE , /* comp */
503 "TOS field for IP header", /*desc*/
506 {"t_state" , 0, 112, 115, /* name,aux,lo,hi */
507 NULL , 0, 0, /* faka,flo,fhi */
508 "t_state" , /* aka */
509 COMP_NONE , /* comp */
510 "Connection TCP state (see TCP state table)", /*desc*/
513 {"max_rt" , 0, 116, 119, /* name,aux,lo,hi */
514 NULL , 0, 0, /* faka,flo,fhi */
516 COMP_NONE , /* comp */
517 "Maximum re-transmissions", /*desc*/
520 {"t_maxseg" , 0, 120, 123, /* name,aux,lo,hi */
521 NULL , 0, 0, /* faka,flo,fhi */
522 "t_maxseg" , /* aka */
523 COMP_NONE , /* comp */
524 "MTU table index", /*desc*/
527 {"snd_scale" , 0, 124, 127, /* name,aux,lo,hi */
528 NULL , 0, 0, /* faka,flo,fhi */
529 "snd_scale" , /* aka */
530 COMP_NONE , /* comp */
531 "Scaling for receive window (0-14). Note: this is reverse of common definition.", /*desc*/
534 {"rcv_scale" , 0, 128, 131, /* name,aux,lo,hi */
535 NULL , 0, 0, /* faka,flo,fhi */
536 "rcv_scale" , /* aka */
537 COMP_NONE , /* comp */
538 "Scaling for send window (0-14). Note: this is reverse of common definition.", /*desc*/
541 {"t_rxtshift" , 0, 132, 135, /* name,aux,lo,hi */
542 NULL , 0, 0, /* faka,flo,fhi */
543 "t_rxtshift" , /* aka */
544 COMP_NONE , /* comp */
545 "Retransmit exponential backoff", /*desc*/
548 {"t_dupacks" , 0, 136, 139, /* name,aux,lo,hi */
549 NULL , 0, 0, /* faka,flo,fhi */
550 "t_dupacks" , /* aka */
551 COMP_NONE , /* comp */
552 "Number of duplicate ACKs received", /*desc*/
555 {"timestamp_offset" , 0, 140, 143, /* name,aux,lo,hi */
556 NULL , 0, 0, /* faka,flo,fhi */
557 "timestamp_offset" , /* aka */
558 COMP_NONE , /* comp */
559 "Timestamp offset from running clock", /*desc*/
562 {"rcv_adv" , 0, 144, 159, /* name,aux,lo,hi */
563 NULL , 0, 0, /* faka,flo,fhi */
564 "rcv_adv" , /* aka */
565 COMP_NONE , /* comp */
566 "Peer advertised window", /*desc*/
569 {"timestamp" , 0, 160, 191, /* name,aux,lo,hi */
570 NULL , 0, 0, /* faka,flo,fhi */
571 "timestamp" , /* aka */
572 COMP_NONE , /* comp */
573 "Timer accounting field", /*desc*/
576 {"t_rtt_ts_recent_age" , 0, 192, 223, /* name,aux,lo,hi */
577 NULL , 0, 0, /* faka,flo,fhi */
578 "t_rtt_ts_recent_age" , /* aka */
579 COMP_NONE , /* comp */
580 "Round-trip time; timestamps: ts_recent_age", /*desc*/
583 {"t_rtseq_recent" , 0, 224, 255, /* name,aux,lo,hi */
584 NULL , 0, 0, /* faka,flo,fhi */
585 "t_rtseq_recent" , /* aka */
586 COMP_NONE , /* comp */
587 "Sequence number being timed t_rtseq; timestamps t_recent", /*desc*/
590 {"t_srtt" , 0, 256, 271, /* name,aux,lo,hi */
591 NULL , 0, 0, /* faka,flo,fhi */
593 COMP_NONE , /* comp */
594 "Smoothed round-trip time", /*desc*/
597 {"t_rttvar" , 0, 272, 287, /* name,aux,lo,hi */
598 NULL , 0, 0, /* faka,flo,fhi */
599 "t_rttvar" , /* aka */
600 COMP_NONE , /* comp */
601 "Variance in round-trip time", /*desc*/
604 {"tx_max" , 0, 288, 319, /* name,aux,lo,hi */
605 NULL , 0, 0, /* faka,flo,fhi */
607 COMP_NONE , /* comp */
608 "Highest sequence number in transmit buffer", /*desc*/
611 {"snd_una_raw" , 0, 320, 347, /* name,aux,lo,hi */
612 NULL , 0, 0, /* faka,flo,fhi */
613 "snd_una" , /* aka */
614 COMP_TX_MAX , /* comp */
615 "Offset of snd_una from tx_max", /*desc*/
616 "Send unacknowledged", /*akadesc */
618 {"snd_nxt_raw" , 0, 348, 375, /* name,aux,lo,hi */
619 NULL , 0, 0, /* faka,flo,fhi */
620 "snd_nxt" , /* aka */
621 COMP_TX_MAX , /* comp */
622 "Offset of snd_nxt from tx_max", /*desc*/
623 "Send next", /*akadesc */
625 {"snd_max_raw" , 0, 376, 403, /* name,aux,lo,hi */
626 NULL , 0, 0, /* faka,flo,fhi */
627 "snd_max" , /* aka */
628 COMP_TX_MAX , /* comp */
629 "Offset of snd_max from tx_max", /*desc*/
630 "Highest sequence number sent", /*akadesc */
632 {"snd_rec_raw" , 0, 404, 431, /* name,aux,lo,hi */
633 NULL , 0, 0, /* faka,flo,fhi */
634 "snd_rec" , /* aka */
635 COMP_TX_MAX , /* comp */
636 "Offset of NewReno fast recovery end sequence from tx_max", /*desc*/
637 "NewReno fast recovery end sequence number", /*akadesc */
639 {"snd_cwnd" , 0, 432, 459, /* name,aux,lo,hi */
640 NULL , 0, 0, /* faka,flo,fhi */
641 "snd_cwnd" , /* aka */
642 COMP_NONE , /* comp */
643 "Congestion-control window", /*desc*/
646 {"snd_ssthresh" , 0, 460, 487, /* name,aux,lo,hi */
647 NULL , 0, 0, /* faka,flo,fhi */
648 "snd_ssthresh" , /* aka */
649 COMP_NONE , /* comp */
650 "Slow Start threshold", /*desc*/
653 {"tx_hdr_ptr_raw" , 0, 488, 504, /* name,aux,lo,hi */
654 NULL , 0, 0, /* faka,flo,fhi */
655 "tx_hdr_ptr" , /* aka */
656 COMP_PTR , /* comp */
657 "Page pointer for first byte in send buffer", /*desc*/
660 {"tx_last_ptr_raw" , 0, 505, 521, /* name,aux,lo,hi */
661 NULL , 0, 0, /* faka,flo,fhi */
662 "tx_last_ptr" , /* aka */
663 COMP_PTR , /* comp */
664 "Page pointer for last byte in send buffer", /*desc*/
667 {"rcv_nxt" , 0, 522, 553, /* name,aux,lo,hi */
668 NULL , 0, 0, /* faka,flo,fhi */
669 "rcv_nxt" , /* aka */
670 COMP_NONE , /* comp */
671 "TCP receive next", /*desc*/
674 {"rcv_wnd" , 0, 554, 581, /* name,aux,lo,hi */
675 NULL , 0, 0, /* faka,flo,fhi */
676 "rcv_wnd" , /* aka */
677 COMP_NONE , /* comp */
678 "Receive credits (advertised to peer in receive window)", /*desc*/
681 {"rx_hdr_offset" , 0, 582, 609, /* name,aux,lo,hi */
682 NULL , 0, 0, /* faka,flo,fhi */
683 "rx_hdr_offset" , /* aka */
684 COMP_NONE , /* comp */
685 "Receive in-order buffered data", /*desc*/
688 {"ts_last_ack_sent_raw" , 0, 610, 637, /* name,aux,lo,hi */
689 NULL , 0, 0, /* faka,flo,fhi */
690 "ts_last_ack_sent" , /* aka */
691 COMP_RCV_NXT , /* comp */
692 "Offset of highest sequence acked from rcv_nxt", /*desc*/
693 "Highest sequence number acked", /*akadesc */
695 {"rx_frag0_start_idx_raw" , 0, 638, 665, /* name,aux,lo,hi */
696 NULL , 0, 0, /* faka,flo,fhi */
697 "rx_frag0_start_idx" , /* aka */
698 COMP_RCV_NXT , /* comp */
699 "Offset of receive fragment 0 start sequence from rcv_nxt", /*desc*/
702 {"rx_frag1_start_idx_offset" , 0, 666, 693, /* name,aux,lo,hi */
703 NULL , 0, 0, /* faka,flo,fhi */
704 "rx_frag1_start_idx_offset" , /* aka */
705 COMP_RCV_NXT , /* comp */
706 "Offset of receive fragment 1 start sequence from rcv_nxt", /*desc*/
709 {"rx_frag0_len" , 0, 694, 721, /* name,aux,lo,hi */
710 NULL , 0, 0, /* faka,flo,fhi */
711 "rx_frag0_len" , /* aka */
712 COMP_NONE , /* comp */
713 "Receive re-order fragment 0 length", /*desc*/
716 {"rx_frag1_len" , 0, 722, 749, /* name,aux,lo,hi */
717 NULL , 0, 0, /* faka,flo,fhi */
718 "rx_frag1_len" , /* aka */
719 COMP_NONE , /* comp */
720 "Receive re-order fragment 1 length", /*desc*/
723 {"pdu_len" , 0, 750, 765, /* name,aux,lo,hi */
724 NULL , 0, 0, /* faka,flo,fhi */
725 "pdu_len" , /* aka */
726 COMP_NONE , /* comp */
727 "Receive recovered PDU length", /*desc*/
730 {"rx_ptr_raw" , 0, 766, 782, /* name,aux,lo,hi */
731 NULL , 0, 0, /* faka,flo,fhi */
733 COMP_PTR , /* comp */
734 "Page pointer for in-order receive buffer", /*desc*/
737 {"rx_frag1_ptr_raw" , 0, 783, 799, /* name,aux,lo,hi */
738 NULL , 0, 0, /* faka,flo,fhi */
739 "rx_frag1_ptr" , /* aka */
740 COMP_PTR , /* comp */
741 "Page pointer for out-of-order receive buffer", /*desc*/
744 {"main_slush" , 0, 800, 831, /* name,aux,lo,hi */
745 NULL , 0, 0, /* faka,flo,fhi */
746 "main_slush" , /* aka */
747 COMP_NONE , /* comp */
751 {"aux1_slush0" , 1, 832, 846, /* name,aux,lo,hi */
752 NULL , 0, 0, /* faka,flo,fhi */
753 "aux1_slush0" , /* aka */
754 COMP_NONE , /* comp */
758 {"rx_frag2_start_idx_offset_raw", 1, 847, 874, /* name,aux,lo,hi */
759 NULL , 0, 0, /* faka,flo,fhi */
760 "rx_frag2_start_idx_offset" , /* aka */
761 COMP_RCV_NXT , /* comp */
762 "Offset of receive fragment 2 start sequence from rcv_nxt", /*desc*/
765 {"rx_frag2_ptr_raw" , 1, 875, 891, /* name,aux,lo,hi */
766 NULL , 0, 0, /* faka,flo,fhi */
767 "rx_frag2_ptr" , /* aka */
768 COMP_PTR , /* comp */
769 "Page pointer for out-of-order receive buffer", /*desc*/
772 {"rx_frag2_len_raw" , 1, 892, 919, /* name,aux,lo,hi */
773 NULL , 0, 0, /* faka,flo,fhi */
774 "rx_frag2_len" , /* aka */
775 COMP_LEN , /* comp */
776 "Receive re-order fragment 2 length", /*desc*/
779 {"rx_frag3_ptr_raw" , 1, 920, 936, /* name,aux,lo,hi */
780 NULL , 0, 0, /* faka,flo,fhi */
781 "rx_frag3_ptr" , /* aka */
782 COMP_PTR , /* comp */
783 "Page pointer for out-of-order receive buffer", /*desc*/
786 {"rx_frag3_len_raw" , 1, 937, 964, /* name,aux,lo,hi */
787 NULL , 0, 0, /* faka,flo,fhi */
788 "rx_frag3_len" , /* aka */
789 COMP_LEN , /* comp */
790 "Receive re-order fragment 3 length", /*desc*/
793 {"rx_frag3_start_idx_offset_raw", 1, 965, 992, /* name,aux,lo,hi */
794 NULL , 0, 0, /* faka,flo,fhi */
795 "rx_frag3_start_idx_offset" , /* aka */
796 COMP_RCV_NXT , /* comp */
797 "Offset of receive fragment 3 start sequence from rcv_nxt", /*desc*/
800 {"pdu_hdr_len" , 1, 993, 1000, /* name,aux,lo,hi */
801 NULL , 0, 0, /* faka,flo,fhi */
802 "pdu_hdr_len" , /* aka */
803 COMP_NONE , /* comp */
804 "Receive recovered PDU header length", /*desc*/
807 {"aux1_slush1" , 1, 1001, 1019, /* name,aux,lo,hi */
808 NULL , 0, 0, /* faka,flo,fhi */
809 "aux1_slush1" , /* aka */
810 COMP_NONE , /* comp */
814 {"ulp_ext" , 1, 1020, 1023, /* name,aux,lo,hi */
815 NULL , 0, 0, /* faka,flo,fhi */
816 "ulp_ext" , /* aka */
817 COMP_NONE , /* comp */
818 "Extension of ulp_raw for PI configuration", /*desc*/
822 {"irs_ulp" , 2, 832, 840, /* name,aux,lo,hi */
823 NULL , 0, 0, /* faka,flo,fhi */
824 "irs_ulp" , /* aka */
825 COMP_NONE , /* comp */
826 "IRS modulo marker_interval when enterring iWARP mode", /*desc*/
829 {"iss_ulp" , 2, 841, 849, /* name,aux,lo,hi */
830 NULL , 0, 0, /* faka,flo,fhi */
831 "iss_ulp" , /* aka */
832 COMP_NONE , /* comp */
833 "ISS modulo marker_interval when entering iWARP mode", /*desc*/
836 {"tx_pdu_len" , 2, 850, 863, /* name,aux,lo,hi */
837 NULL , 0, 0, /* faka,flo,fhi */
838 "tx_pdu_len" , /* aka */
839 COMP_NONE , /* comp */
840 "Length of Tx FPDU", /*desc*/
843 {"cq_idx_sq" , 2, 864, 879, /* name,aux,lo,hi */
844 NULL , 0, 0, /* faka,flo,fhi */
845 "cq_idx_sq" , /* aka */
846 COMP_NONE , /* comp */
847 "CQ index of CQ for SQ", /*desc*/
850 {"cq_idx_rq" , 2, 880, 895, /* name,aux,lo,hi */
851 NULL , 0, 0, /* faka,flo,fhi */
852 "cq_idx_rq" , /* aka */
853 COMP_NONE , /* comp */
854 "CQ index of CQ for RQ", /*desc*/
857 {"qp_id" , 2, 896, 911, /* name,aux,lo,hi */
858 NULL , 0, 0, /* faka,flo,fhi */
860 COMP_NONE , /* comp */
864 {"pd_id" , 2, 912, 927, /* name,aux,lo,hi */
865 NULL , 0, 0, /* faka,flo,fhi */
867 COMP_NONE , /* comp */
871 {"STAG" , 2, 928, 959, /* name,aux,lo,hi */
872 NULL , 0, 0, /* faka,flo,fhi */
874 COMP_NONE , /* comp */
875 "PDU response STAG", /*desc*/
878 {"rq_start" , 2, 960, 985, /* name,aux,lo,hi */
879 NULL , 0, 0, /* faka,flo,fhi */
880 "rq_start" , /* aka */
881 COMP_NONE , /* comp */
882 "DW aligned starting addres of RQ", /*desc*/
885 {"rq_MSN" , 2, 986, 998, /* name,aux,lo,hi */
886 NULL , 0, 0, /* faka,flo,fhi */
888 COMP_NONE , /* comp */
889 "Current MSN (modulo 8K, further check in ULP_RX)", /*desc*/
892 {"rq_max_offset" , 2, 999, 1002, /* name,aux,lo,hi */
893 NULL , 0, 0, /* faka,flo,fhi */
894 "rq_max_offset" , /* aka */
895 COMP_NONE , /* comp */
896 "Log size RQ (the size in hardware is rounded up to a power of 2)", /*desc*/
899 {"rq_write_ptr" , 2, 1003, 1015, /* name,aux,lo,hi */
900 NULL , 0, 0, /* faka,flo,fhi */
901 "rq_write_ptr" , /* aka */
902 COMP_NONE , /* comp */
903 "Host RQ write pointer", /*desc*/
906 {"RDMAP_opcode" , 2, 1016, 1019, /* name,aux,lo,hi */
907 NULL , 0, 0, /* faka,flo,fhi */
908 "rdmap_opcode" , /* aka */
909 COMP_NONE , /* comp */
910 "Current FPDU command", /*desc*/
913 {"ord_L_bit_vld" , 2, 1020, 1020, /* name,aux,lo,hi */
914 NULL , 0, 0, /* faka,flo,fhi */
915 "ord_l_bit_vld" , /* aka */
916 COMP_NONE , /* comp */
917 "Current FPDU has L-bit set", /*desc*/
920 {"tx_flush" , 2, 1021, 1021, /* name,aux,lo,hi */
921 NULL , 0, 0, /* faka,flo,fhi */
922 "tx_flush" , /* aka */
923 COMP_NONE , /* comp */
924 "1 = flush CPL_TX_DATA", /*desc*/
927 {"tx_oos_rxmt" , 2, 1022, 1022, /* name,aux,lo,hi */
928 NULL , 0, 0, /* faka,flo,fhi */
929 "tx_oos_rxmt" , /* aka */
930 COMP_NONE , /* comp */
931 "Retransmit is out of FPDU sync", /*desc*/
934 {"tx_oos_txmt" , 2, 1023, 1023, /* name,aux,lo,hi */
935 NULL , 0, 0, /* faka,flo,fhi */
936 "tx_oos_txmt" , /* aka */
937 COMP_NONE , /* comp */
938 "Transmit is out of FPDU sync, or disable aligned transmission", /*desc*/
942 {"rx_ddp_buf0_offset" , 3, 832, 855, /* name,aux,lo,hi */
943 NULL , 0, 0, /* faka,flo,fhi */
944 "rx_ddp_buf0_offset" , /* aka */
945 COMP_NONE , /* comp */
946 "Current offset into DDP buffer 0", /*desc*/
949 {"rx_ddp_buf0_len" , 3, 856, 879, /* name,aux,lo,hi */
950 NULL , 0, 0, /* faka,flo,fhi */
951 "rx_ddp_buf0_len" , /* aka */
952 COMP_NONE , /* comp */
953 "Length of DDP buffer 0", /*desc*/
956 {"TF_DDP_INDICATE_OUT" , 3, 880, 880, /* name,aux,lo,hi */
957 "rx_ddp_flags" , 0, 0, /* faka,flo,fhi */
958 "ddp_indicate_out" , /* aka */
959 COMP_NONE , /* comp */
963 {"TF_DDP_ACTIVE_BUF" , 3, 881, 881, /* name,aux,lo,hi */
964 "rx_ddp_flags" , 1, 1, /* faka,flo,fhi */
965 "ddp_active_buf" , /* aka */
966 COMP_NONE , /* comp */
970 {"TF_DDP_OFF" , 3, 882, 882, /* name,aux,lo,hi */
971 "rx_ddp_flags" , 2, 2, /* faka,flo,fhi */
972 "ddp_off" , /* aka */
973 COMP_NONE , /* comp */
977 {"TF_DDP_WAIT_FRAG" , 3, 883, 883, /* name,aux,lo,hi */
978 "rx_ddp_flags" , 3, 3, /* faka,flo,fhi */
979 "ddp_wait_frag" , /* aka */
980 COMP_NONE , /* comp */
984 {"TF_DDP_BUF_INF" , 3, 884, 884, /* name,aux,lo,hi */
985 "rx_ddp_flags" , 4, 4, /* faka,flo,fhi */
986 "ddp_buf_inf" , /* aka */
987 COMP_NONE , /* comp */
991 {"TF_DDP_RX2TX" , 3, 885, 885, /* name,aux,lo,hi */
992 "rx_ddp_flags" , 5, 5, /* faka,flo,fhi */
993 "ddp_rx2tx" , /* aka */
994 COMP_NONE , /* comp */
998 {"TF_DDP_MAIN_UNUSED" , 3, 886, 887, /* name,aux,lo,hi */
999 "rx_ddp_flags" , 6, 7, /* faka,flo,fhi */
1000 "ddp_main_unused" , /* aka */
1001 COMP_NONE , /* comp */
1005 {"TF_DDP_BUF0_VALID" , 3, 888, 888, /* name,aux,lo,hi */
1006 "rx_ddp_flags" , 8, 8, /* faka,flo,fhi */
1007 "ddp_buf0_valid" , /* aka */
1008 COMP_NONE , /* comp */
1012 {"TF_DDP_BUF0_INDICATE" , 3, 889, 889, /* name,aux,lo,hi */
1013 "rx_ddp_flags" , 9, 9, /* faka,flo,fhi */
1014 "ddp_buf0_indicate" , /* aka */
1015 COMP_NONE , /* comp */
1019 {"TF_DDP_BUF0_FLUSH" , 3, 890, 890, /* name,aux,lo,hi */
1020 "rx_ddp_flags" , 10, 10, /* faka,flo,fhi */
1021 "ddp_buf0_flush" , /* aka */
1022 COMP_NONE , /* comp */
1026 {"TF_DDP_PSHF_ENABLE_0" , 3, 891, 891, /* name,aux,lo,hi */
1027 "rx_ddp_flags" , 11, 11, /* faka,flo,fhi */
1028 "ddp_pshf_enable_0" , /* aka */
1029 COMP_NONE , /* comp */
1033 {"TF_DDP_PUSH_DISABLE_0" , 3, 892, 892, /* name,aux,lo,hi */
1034 "rx_ddp_flags" , 12, 12, /* faka,flo,fhi */
1035 "ddp_push_disable_0" , /* aka */
1036 COMP_NONE , /* comp */
1040 {"TF_DDP_PSH_NO_INVALIDATE0" , 3, 893, 893, /* name,aux,lo,hi */
1041 "rx_ddp_flags" , 13, 13, /* faka,flo,fhi */
1042 "ddp_psh_no_invalidate0" , /* aka */
1043 COMP_NONE , /* comp */
1047 {"TF_DDP_BUF0_UNUSED" , 3, 894, 895, /* name,aux,lo,hi */
1048 "rx_ddp_flags" , 14, 15, /* faka,flo,fhi */
1049 "ddp_buf0_unused" , /* aka */
1050 COMP_NONE , /* comp */
1054 {"TF_DDP_BUF1_VALID" , 3, 896, 896, /* name,aux,lo,hi */
1055 "rx_ddp_flags" , 16, 16, /* faka,flo,fhi */
1056 "ddp_buf1_valid" , /* aka */
1057 COMP_NONE , /* comp */
1061 {"TF_DDP_BUF1_INDICATE" , 3, 897, 897, /* name,aux,lo,hi */
1062 "rx_ddp_flags" , 17, 17, /* faka,flo,fhi */
1063 "ddp_buf1_indicate" , /* aka */
1064 COMP_NONE , /* comp */
1068 {"TF_DDP_BUF1_FLUSH" , 3, 898, 898, /* name,aux,lo,hi */
1069 "rx_ddp_flags" , 18, 18, /* faka,flo,fhi */
1070 "ddp_buf1_flush" , /* aka */
1071 COMP_NONE , /* comp */
1075 {"TF_DDP_PSHF_ENABLE_1" , 3, 899, 899, /* name,aux,lo,hi */
1076 "rx_ddp_flags" , 19, 19, /* faka,flo,fhi */
1077 "ddp_pshf_enable_1" , /* aka */
1078 COMP_NONE , /* comp */
1082 {"TF_DDP_PUSH_DISABLE_1" , 3, 900, 900, /* name,aux,lo,hi */
1083 "rx_ddp_flags" , 20, 20, /* faka,flo,fhi */
1084 "ddp_push_disable_1" , /* aka */
1085 COMP_NONE , /* comp */
1089 {"TF_DDP_PSH_NO_INVALIDATE1" , 3, 901, 901, /* name,aux,lo,hi */
1090 "rx_ddp_flags" , 21, 21, /* faka,flo,fhi */
1091 "ddp_psh_no_invalidate1" , /* aka */
1092 COMP_NONE , /* comp */
1096 {"TF_DDP_BUF1_UNUSED" , 3, 902, 903, /* name,aux,lo,hi */
1097 "rx_ddp_flags" , 22, 23, /* faka,flo,fhi */
1098 "ddp_buf1_unused" , /* aka */
1099 COMP_NONE , /* comp */
1103 {"rx_ddp_buf1_offset" , 3, 904, 927, /* name,aux,lo,hi */
1104 NULL , 0, 0, /* faka,flo,fhi */
1105 "rx_ddp_buf1_offset" , /* aka */
1106 COMP_NONE , /* comp */
1107 "Current offset into DDP buffer 1", /*desc*/
1110 {"rx_ddp_buf1_len" , 3, 928, 951, /* name,aux,lo,hi */
1111 NULL , 0, 0, /* faka,flo,fhi */
1112 "rx_ddp_buf1_len" , /* aka */
1113 COMP_NONE , /* comp */
1114 "Length of DDP buffer 1", /*desc*/
1117 {"aux3_slush" , 3, 952, 959, /* name,aux,lo,hi */
1118 NULL , 0, 0, /* faka,flo,fhi */
1119 "aux3_slush" , /* aka */
1120 COMP_NONE , /* comp */
1121 "Reserved", /*desc*/
1124 {"rx_ddp_buf0_tag" , 3, 960, 991, /* name,aux,lo,hi */
1125 NULL , 0, 0, /* faka,flo,fhi */
1126 "rx_ddp_buf0_tag" , /* aka */
1127 COMP_NONE , /* comp */
1128 "Tag for DDP buffer 0", /*desc*/
1131 {"rx_ddp_buf1_tag" , 3, 992, 1023, /* name,aux,lo,hi */
1132 NULL , 0, 0, /* faka,flo,fhi */
1133 "rx_ddp_buf1_tag" , /* aka */
1134 COMP_NONE , /* comp */
1135 "Tag for DDP buffer 1", /*desc*/
1138 {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/
1141 /* ====================================================== */
1142 _TCBVAR g_scb_info5[]={
1143 {"OPT_1_RSS_INFO" , 0, 0, 11, /* name,aux,lo,hi */
1144 NULL , 0, 0, /* faka,flo,fhi */
1145 "OPT_1_RSS_INFO" , /* aka */
1146 COMP_NONE , /* comp */
1150 {"OPT_1_LISTEN_INTERFACE" , 0, 12, 19, /* name,aux,lo,hi */
1151 NULL , 0, 0, /* faka,flo,fhi */
1152 "OPT_1_LISTEN_INTERFACE" , /* aka */
1153 COMP_NONE , /* comp */
1157 {"OPT_1_LISTEN_FILTER" , 0, 20, 20, /* name,aux,lo,hi */
1158 NULL , 0, 0, /* faka,flo,fhi */
1159 "OPT_1_LISTEN_FILTER" , /* aka */
1160 COMP_NONE , /* comp */
1164 {"OPT_1_SYN_DEFENSE" , 0, 21, 21, /* name,aux,lo,hi */
1165 NULL , 0, 0, /* faka,flo,fhi */
1166 "OPT_1_SYN_DEFENSE" , /* aka */
1167 COMP_NONE , /* comp */
1171 {"OPT_1_CONNECTION_POLICY" , 0, 22, 23, /* name,aux,lo,hi */
1172 NULL , 0, 0, /* faka,flo,fhi */
1173 "OPT_1_CONNECTION_POLICY" , /* aka */
1174 COMP_NONE , /* comp */
1178 {"OPT_1_FLT_INFO" , 0, 24, 63, /* name,aux,lo,hi */
1179 NULL , 0, 0, /* faka,flo,fhi */
1180 "OPT_1_FLT_INFO" , /* aka */
1181 COMP_NONE , /* comp */
1185 {"OPT_0_ACCEPT_MODE" , 0, 64, 65, /* name,aux,lo,hi */
1186 NULL , 0, 0, /* faka,flo,fhi */
1187 "OPT_0_ACCEPT_MODE" , /* aka */
1188 COMP_NONE , /* comp */
1192 {"OPT_0_TX_CHANNEL" , 0, 66, 67, /* name,aux,lo,hi */
1193 NULL , 0, 0, /* faka,flo,fhi */
1194 "OPT_0_TX_CHANNEL" , /* aka */
1195 COMP_NONE , /* comp */
1199 {"OPT_0_NO_CONGESTION_CONTROL" , 0, 68, 68, /* name,aux,lo,hi */
1200 NULL , 0, 0, /* faka,flo,fhi */
1201 "OPT_0_NO_CONGESTION_CONTROL" , /* aka */
1202 COMP_NONE , /* comp */
1206 {"OPT_0_DELAYED_ACK" , 0, 69, 69, /* name,aux,lo,hi */
1207 NULL , 0, 0, /* faka,flo,fhi */
1208 "OPT_0_DELAYED_ACK" , /* aka */
1209 COMP_NONE , /* comp */
1213 {"OPT_0_INJECT_TIMER" , 0, 70, 70, /* name,aux,lo,hi */
1214 NULL , 0, 0, /* faka,flo,fhi */
1215 "OPT_0_INJECT_TIMER" , /* aka */
1216 COMP_NONE , /* comp */
1220 {"OPT_0_NON_OFFLOAD" , 0, 71, 71, /* name,aux,lo,hi */
1221 NULL , 0, 0, /* faka,flo,fhi */
1222 "OPT_0_NON_OFFLOAD" , /* aka */
1223 COMP_NONE , /* comp */
1227 {"OPT_0_ULP_MODE" , 0, 72, 75, /* name,aux,lo,hi */
1228 NULL , 0, 0, /* faka,flo,fhi */
1229 "OPT_0_ULP_MODE" , /* aka */
1230 COMP_NONE , /* comp */
1234 {"OPT_0_MAX_RCV_BUFFER" , 0, 76, 85, /* name,aux,lo,hi */
1235 NULL , 0, 0, /* faka,flo,fhi */
1236 "OPT_0_MAX_RCV_BUFFER" , /* aka */
1237 COMP_NONE , /* comp */
1241 {"OPT_0_TOS" , 0, 86, 91, /* name,aux,lo,hi */
1242 NULL , 0, 0, /* faka,flo,fhi */
1243 "OPT_0_TOS" , /* aka */
1244 COMP_NONE , /* comp */
1248 {"OPT_0_SM_SEL" , 0, 92, 99, /* name,aux,lo,hi */
1249 NULL , 0, 0, /* faka,flo,fhi */
1250 "OPT_0_SM_SEL" , /* aka */
1251 COMP_NONE , /* comp */
1255 {"OPT_0_L2T_IX" , 0, 100, 111, /* name,aux,lo,hi */
1256 NULL , 0, 0, /* faka,flo,fhi */
1257 "OPT_0_L2T_IX" , /* aka */
1258 COMP_NONE , /* comp */
1262 {"OPT_0_TCAM_BYPASS" , 0, 112, 112, /* name,aux,lo,hi */
1263 NULL , 0, 0, /* faka,flo,fhi */
1264 "OPT_0_TCAM_BYPASS" , /* aka */
1265 COMP_NONE , /* comp */
1269 {"OPT_0_NAGLE" , 0, 113, 113, /* name,aux,lo,hi */
1270 NULL , 0, 0, /* faka,flo,fhi */
1271 "OPT_0_NAGLE" , /* aka */
1272 COMP_NONE , /* comp */
1276 {"OPT_0_WSF" , 0, 114, 117, /* name,aux,lo,hi */
1277 NULL , 0, 0, /* faka,flo,fhi */
1278 "OPT_0_WSF" , /* aka */
1279 COMP_NONE , /* comp */
1283 {"OPT_0_KEEPALIVE" , 0, 118, 118, /* name,aux,lo,hi */
1284 NULL , 0, 0, /* faka,flo,fhi */
1285 "OPT_0_KEEPALIVE" , /* aka */
1286 COMP_NONE , /* comp */
1290 {"OPT_0_CONN_MAXRT" , 0, 119, 122, /* name,aux,lo,hi */
1291 NULL , 0, 0, /* faka,flo,fhi */
1292 "OPT_0_CONN_MAXRT" , /* aka */
1293 COMP_NONE , /* comp */
1297 {"OPT_0_MAXRT_OVERRIDE" , 0, 123, 123, /* name,aux,lo,hi */
1298 NULL , 0, 0, /* faka,flo,fhi */
1299 "OPT_0_MAXRT_OVERRIDE" , /* aka */
1300 COMP_NONE , /* comp */
1304 {"OPT_0_MAX_SEG" , 0, 124, 127, /* name,aux,lo,hi */
1305 NULL , 0, 0, /* faka,flo,fhi */
1306 "OPT_0_MAX_SEG" , /* aka */
1307 COMP_NONE , /* comp */
1311 {"scb_slush" , 0, 128, 1023, /* name,aux,lo,hi */
1312 NULL , 0, 0, /* faka,flo,fhi */
1313 "scb_slush" , /* aka */
1314 COMP_NONE , /* comp */
1318 {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/
1321 /* ====================================================== */
1322 _TCBVAR g_fcb_info5[]={
1323 {"filter" , 0, 33, 33, /* name,aux,lo,hi */
1324 NULL , 0, 0, /* faka,flo,fhi */
1325 "filter" , /* aka */
1326 COMP_NONE , /* comp */
1330 {"Report_TID" , 0, 53, 53, /* name,aux,lo,hi */
1331 NULL , 0, 0, /* faka,flo,fhi */
1332 "Report_TID" , /* aka */
1333 COMP_NONE , /* comp */
1337 {"Drop" , 0, 54, 54, /* name,aux,lo,hi */
1338 NULL , 0, 0, /* faka,flo,fhi */
1340 COMP_NONE , /* comp */
1344 {"Direct_Steer" , 0, 55, 55, /* name,aux,lo,hi */
1345 NULL , 0, 0, /* faka,flo,fhi */
1346 "Direct_Steer" , /* aka */
1347 COMP_NONE , /* comp */
1351 {"Mask_Hash" , 0, 48, 48, /* name,aux,lo,hi */
1352 NULL , 0, 0, /* faka,flo,fhi */
1353 "Mask_Hash" , /* aka */
1354 COMP_NONE , /* comp */
1358 {"Direct_Steer_Hash" , 0, 49, 49, /* name,aux,lo,hi */
1359 NULL , 0, 0, /* faka,flo,fhi */
1360 "Direct_Steer_Hash" , /* aka */
1361 COMP_NONE , /* comp */
1365 {"Loopback" , 0, 91, 91, /* name,aux,lo,hi */
1366 NULL , 0, 0, /* faka,flo,fhi */
1367 "Loopback" , /* aka */
1368 COMP_NONE , /* comp */
1372 {"Loopback_TX_Channel" , 0, 44, 45, /* name,aux,lo,hi */
1373 NULL , 0, 0, /* faka,flo,fhi */
1374 "Loopback_TX_Channel" , /* aka */
1375 COMP_NONE , /* comp */
1379 {"Swap_MAC_addresses" , 0, 86, 86, /* name,aux,lo,hi */
1380 NULL , 0, 0, /* faka,flo,fhi */
1381 "Swap_MAC_addresses" , /* aka */
1382 COMP_NONE , /* comp */
1386 {"Rewrite_DMAC" , 0, 92, 92, /* name,aux,lo,hi */
1387 NULL , 0, 0, /* faka,flo,fhi */
1388 "Rewrite_DMAC" , /* aka */
1389 COMP_NONE , /* comp */
1393 {"Rewrite_SMAC" , 0, 93, 93, /* name,aux,lo,hi */
1394 NULL , 0, 0, /* faka,flo,fhi */
1395 "Rewrite_SMAC" , /* aka */
1396 COMP_NONE , /* comp */
1400 {"Insert_VLAN" , 0, 94, 94, /* name,aux,lo,hi */
1401 NULL , 0, 0, /* faka,flo,fhi */
1402 "Insert_VLAN" , /* aka */
1403 COMP_NONE , /* comp */
1407 {"Remove_VLAN" , 0, 39, 39, /* name,aux,lo,hi */
1408 NULL , 0, 0, /* faka,flo,fhi */
1409 "Remove_VLAN" , /* aka */
1410 COMP_NONE , /* comp */
1414 {"NAT_Mode" , 0, 50, 52, /* name,aux,lo,hi */
1415 NULL , 0, 0, /* faka,flo,fhi */
1416 "NAT_Mode" , /* aka */
1417 COMP_NONE , /* comp */
1421 {"NAT_seq_check" , 0, 42, 42, /* name,aux,lo,hi */
1422 NULL , 0, 0, /* faka,flo,fhi */
1423 "NAT_seq_check" , /* aka */
1424 COMP_NONE , /* comp */
1428 {"NAT_flag_check" , 0, 84, 84, /* name,aux,lo,hi */
1429 NULL , 0, 0, /* faka,flo,fhi */
1430 "NAT_flag_check" , /* aka */
1431 COMP_NONE , /* comp */
1435 {"Count_Hits" , 0, 36, 36, /* name,aux,lo,hi */
1436 NULL , 0, 0, /* faka,flo,fhi */
1437 "Count_Hits" , /* aka */
1438 COMP_NONE , /* comp */
1442 {"Hit_frame_cnt" , 0, 160, 191, /* name,aux,lo,hi */
1443 NULL , 0, 0, /* faka,flo,fhi */
1444 "Hit_frame_cnt" , /* aka */
1445 COMP_NONE , /* comp */
1449 {"Hit_byte_cnt_high" , 0, 224, 255, /* name,aux,lo,hi */
1450 NULL , 0, 0, /* faka,flo,fhi */
1451 "Hit_byte_cnt_high" , /* aka */
1452 COMP_NONE , /* comp */
1456 {"Hit_byte_cnt_low" , 0, 192, 223, /* name,aux,lo,hi */
1457 NULL , 0, 0, /* faka,flo,fhi */
1458 "Hit_byte_cnt_low" , /* aka */
1459 COMP_NONE , /* comp */
1463 {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/