2 * Copyright 1996 Massachusetts Institute of Technology
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 static const char rcsid[] =
35 #include <sys/types.h>
36 #include <sys/fcntl.h>
38 #include <sys/pciio.h>
39 #include <sys/queue.h>
43 #include <dev/pci/pcireg.h>
55 #include "pathnames.h"
58 struct pci_device_info
60 TAILQ_ENTRY(pci_device_info) link;
65 struct pci_vendor_info
67 TAILQ_ENTRY(pci_vendor_info) link;
68 TAILQ_HEAD(,pci_device_info) devs;
73 static TAILQ_HEAD(,pci_vendor_info) pci_vendors;
75 static struct pcisel getsel(const char *str);
76 static void list_bridge(int fd, struct pci_conf *p);
77 static void list_bars(int fd, struct pci_conf *p);
78 static void list_devs(const char *name, int verbose, int bars, int bridge,
79 int caps, int errors, int vpd);
80 static void list_verbose(struct pci_conf *p);
81 static void list_vpd(int fd, struct pci_conf *p);
82 static const char *guess_class(struct pci_conf *p);
83 static const char *guess_subclass(struct pci_conf *p);
84 static int load_vendors(void);
85 static void readit(const char *, const char *, int);
86 static void writeit(const char *, const char *, const char *, int);
87 static void chkattached(const char *);
88 static void dump_bar(const char *name, const char *reg, const char *bar_start,
89 const char *bar_count, int width, int verbose);
91 static int exitstatus = 0;
98 "usage: pciconf -l [-BbcevV] [device]\n"
99 " pciconf -a device\n"
100 " pciconf -r [-b | -h] device addr[:addr2]\n"
101 " pciconf -w [-b | -h] device addr value\n"
102 " pciconf -D [-b | -h | -x] device bar [start [count]]"
108 main(int argc, char **argv)
111 int listmode, readmode, writemode, attachedmode, dumpbarmode;
112 int bars, bridge, caps, errors, verbose, vpd;
114 listmode = readmode = writemode = attachedmode = dumpbarmode = 0;
115 bars = bridge = caps = errors = verbose = vpd= 0;
118 while ((c = getopt(argc, argv, "aBbcDehlrwVv")) != -1) {
178 if ((listmode && optind >= argc + 1)
179 || (writemode && optind + 3 != argc)
180 || (readmode && optind + 2 != argc)
181 || (attachedmode && optind + 1 != argc)
182 || (dumpbarmode && (optind + 2 > argc || optind + 4 < argc))
183 || (width == 8 && !dumpbarmode))
187 list_devs(optind + 1 == argc ? argv[optind] : NULL, verbose,
188 bars, bridge, caps, errors, vpd);
189 } else if (attachedmode) {
190 chkattached(argv[optind]);
191 } else if (readmode) {
192 readit(argv[optind], argv[optind + 1], width);
193 } else if (writemode) {
194 writeit(argv[optind], argv[optind + 1], argv[optind + 2],
196 } else if (dumpbarmode) {
197 dump_bar(argv[optind], argv[optind + 1],
198 optind + 2 < argc ? argv[optind + 2] : NULL,
199 optind + 3 < argc ? argv[optind + 3] : NULL,
209 list_devs(const char *name, int verbose, int bars, int bridge, int caps,
213 struct pci_conf_io pc;
214 struct pci_conf conf[255], *p;
215 struct pci_match_conf patterns[1];
221 fd = open(_PATH_DEVPCI, (bridge || caps || errors) ? O_RDWR : O_RDONLY,
224 err(1, "%s", _PATH_DEVPCI);
226 bzero(&pc, sizeof(struct pci_conf_io));
227 pc.match_buf_len = sizeof(conf);
230 bzero(&patterns, sizeof(patterns));
231 patterns[0].pc_sel = getsel(name);
232 patterns[0].flags = PCI_GETCONF_MATCH_DOMAIN |
233 PCI_GETCONF_MATCH_BUS | PCI_GETCONF_MATCH_DEV |
234 PCI_GETCONF_MATCH_FUNC;
236 pc.pat_buf_len = sizeof(patterns);
237 pc.patterns = patterns;
241 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
242 err(1, "ioctl(PCIOCGETCONF)");
245 * 255 entries should be more than enough for most people,
246 * but if someone has more devices, and then changes things
247 * around between ioctls, we'll do the cheesy thing and
248 * just bail. The alternative would be to go back to the
249 * beginning of the list, and print things twice, which may
252 if (pc.status == PCI_GETCONF_LIST_CHANGED) {
253 warnx("PCI device list changed, please try again");
257 } else if (pc.status == PCI_GETCONF_ERROR) {
258 warnx("error returned from PCIOCGETCONF ioctl");
263 for (p = conf; p < &conf[pc.num_matches]; p++) {
264 printf("%s%d@pci%d:%d:%d:%d:"
265 "\tclass=0x%06x rev=0x%02x hdr=0x%02x "
266 "vendor=0x%04x device=0x%04x "
267 "subvendor=0x%04x subdevice=0x%04x\n",
268 *p->pd_name ? p->pd_name :
270 *p->pd_name ? (int)p->pd_unit :
271 none_count++, p->pc_sel.pc_domain,
272 p->pc_sel.pc_bus, p->pc_sel.pc_dev,
273 p->pc_sel.pc_func, (p->pc_class << 16) |
274 (p->pc_subclass << 8) | p->pc_progif,
275 p->pc_revid, p->pc_hdr,
276 p->pc_vendor, p->pc_device,
277 p->pc_subvendor, p->pc_subdevice);
291 } while (pc.status == PCI_GETCONF_MORE_DEVS);
297 print_bus_range(int fd, struct pci_conf *p, int secreg, int subreg)
299 uint8_t secbus, subbus;
301 secbus = read_config(fd, &p->pc_sel, secreg, 1);
302 subbus = read_config(fd, &p->pc_sel, subreg, 1);
303 printf(" bus range = %u-%u\n", secbus, subbus);
307 print_window(int reg, const char *type, int range, uint64_t base,
311 printf(" window[%02x] = type %s, range %2d, addr %#jx-%#jx, %s\n",
312 reg, type, range, (uintmax_t)base, (uintmax_t)limit,
313 base < limit ? "enabled" : "disabled");
317 print_special_decode(bool isa, bool vga, bool subtractive)
321 if (isa || vga || subtractive) {
323 printf(" decode = ");
329 printf("%sVGA", comma ? ", " : "");
333 printf("%ssubtractive", comma ? ", " : "");
339 print_bridge_windows(int fd, struct pci_conf *p)
341 uint64_t base, limit;
348 * XXX: This assumes that a window with a base and limit of 0
349 * is not implemented. In theory a window might be programmed
350 * at the smallest size with a base of 0, but those do not seem
351 * common in practice.
353 val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1);
354 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) {
355 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
356 base = PCI_PPBIOBASE(
357 read_config(fd, &p->pc_sel, PCIR_IOBASEH_1, 2),
359 limit = PCI_PPBIOLIMIT(
360 read_config(fd, &p->pc_sel, PCIR_IOLIMITH_1, 2),
361 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
364 base = PCI_PPBIOBASE(0, val);
365 limit = PCI_PPBIOLIMIT(0,
366 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
369 print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit);
372 base = PCI_PPBMEMBASE(0,
373 read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2));
374 limit = PCI_PPBMEMLIMIT(0,
375 read_config(fd, &p->pc_sel, PCIR_MEMLIMIT_1, 2));
376 print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit);
378 val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);
379 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) {
380 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
381 base = PCI_PPBMEMBASE(
382 read_config(fd, &p->pc_sel, PCIR_PMBASEH_1, 4),
384 limit = PCI_PPBMEMLIMIT(
385 read_config(fd, &p->pc_sel, PCIR_PMLIMITH_1, 4),
386 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
389 base = PCI_PPBMEMBASE(0, val);
390 limit = PCI_PPBMEMLIMIT(0,
391 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
394 print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base,
399 * XXX: This list of bridges that are subtractive but do not set
400 * progif to indicate it is copied from pci_pci.c.
402 subtractive = p->pc_progif == PCIP_BRIDGE_PCI_SUBTRACTIVE;
403 switch (p->pc_device << 16 | p->pc_vendor) {
404 case 0xa002177d: /* Cavium ThunderX */
405 case 0x124b8086: /* Intel 82380FB Mobile */
406 case 0x060513d7: /* Toshiba ???? */
409 if (p->pc_vendor == 0x8086 && (p->pc_device & 0xff00) == 0x2400)
412 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_1, 2);
413 print_special_decode(bctl & PCIB_BCR_ISA_ENABLE,
414 bctl & PCIB_BCR_VGA_ENABLE, subtractive);
418 print_cardbus_mem_window(int fd, struct pci_conf *p, int basereg, int limitreg,
422 print_window(basereg, prefetch ? "Prefetchable Memory" : "Memory", 32,
423 PCI_CBBMEMBASE(read_config(fd, &p->pc_sel, basereg, 4)),
424 PCI_CBBMEMLIMIT(read_config(fd, &p->pc_sel, limitreg, 4)));
428 print_cardbus_io_window(int fd, struct pci_conf *p, int basereg, int limitreg)
430 uint32_t base, limit;
434 val = read_config(fd, &p->pc_sel, basereg, 2);
435 if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) {
436 base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4));
437 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 4));
440 base = PCI_CBBIOBASE(val);
441 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 2));
444 print_window(basereg, "I/O Port", range, base, limit);
448 print_cardbus_windows(int fd, struct pci_conf *p)
452 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_2, 2);
453 print_cardbus_mem_window(fd, p, PCIR_MEMBASE0_2, PCIR_MEMLIMIT0_2,
454 bctl & CBB_BCR_PREFETCH_0_ENABLE);
455 print_cardbus_mem_window(fd, p, PCIR_MEMBASE1_2, PCIR_MEMLIMIT1_2,
456 bctl & CBB_BCR_PREFETCH_1_ENABLE);
457 print_cardbus_io_window(fd, p, PCIR_IOBASE0_2, PCIR_IOLIMIT0_2);
458 print_cardbus_io_window(fd, p, PCIR_IOBASE1_2, PCIR_IOLIMIT1_2);
459 print_special_decode(bctl & CBB_BCR_ISA_ENABLE,
460 bctl & CBB_BCR_VGA_ENABLE, false);
464 list_bridge(int fd, struct pci_conf *p)
467 switch (p->pc_hdr & PCIM_HDRTYPE) {
468 case PCIM_HDRTYPE_BRIDGE:
469 print_bus_range(fd, p, PCIR_SECBUS_1, PCIR_SUBBUS_1);
470 print_bridge_windows(fd, p);
472 case PCIM_HDRTYPE_CARDBUS:
473 print_bus_range(fd, p, PCIR_SECBUS_2, PCIR_SUBBUS_2);
474 print_cardbus_windows(fd, p);
480 list_bars(int fd, struct pci_conf *p)
484 switch (p->pc_hdr & PCIM_HDRTYPE) {
485 case PCIM_HDRTYPE_NORMAL:
486 max = PCIR_MAX_BAR_0;
488 case PCIM_HDRTYPE_BRIDGE:
489 max = PCIR_MAX_BAR_1;
491 case PCIM_HDRTYPE_CARDBUS:
492 max = PCIR_MAX_BAR_2;
498 for (i = 0; i <= max; i++)
499 print_bar(fd, p, "bar ", PCIR_BAR(i));
503 print_bar(int fd, struct pci_conf *p, const char *label, uint16_t bar_offset)
507 struct pci_bar_io bar;
510 bar.pbi_sel = p->pc_sel;
511 bar.pbi_reg = bar_offset;
512 if (ioctl(fd, PCIOCGETBAR, &bar) < 0)
514 if (PCI_BAR_IO(bar.pbi_base)) {
517 base = bar.pbi_base & PCIM_BAR_IO_BASE;
519 if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH)
520 type = "Prefetchable Memory";
523 switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) {
524 case PCIM_BAR_MEM_32:
527 case PCIM_BAR_MEM_1MB:
530 case PCIM_BAR_MEM_64:
536 base = bar.pbi_base & ~((uint64_t)0xf);
538 printf(" %s[%02x] = type %s, range %2d, base %#jx, ",
539 label, bar_offset, type, range, (uintmax_t)base);
540 printf("size %ju, %s\n", (uintmax_t)bar.pbi_length,
541 bar.pbi_enabled ? "enabled" : "disabled");
545 list_verbose(struct pci_conf *p)
547 struct pci_vendor_info *vi;
548 struct pci_device_info *di;
551 TAILQ_FOREACH(vi, &pci_vendors, link) {
552 if (vi->id == p->pc_vendor) {
553 printf(" vendor = '%s'\n", vi->desc);
560 TAILQ_FOREACH(di, &vi->devs, link) {
561 if (di->id == p->pc_device) {
562 printf(" device = '%s'\n", di->desc);
567 if ((dp = guess_class(p)) != NULL)
568 printf(" class = %s\n", dp);
569 if ((dp = guess_subclass(p)) != NULL)
570 printf(" subclass = %s\n", dp);
574 list_vpd(int fd, struct pci_conf *p)
576 struct pci_list_vpd_io list;
577 struct pci_vpd_element *vpd, *end;
579 list.plvi_sel = p->pc_sel;
581 list.plvi_data = NULL;
582 if (ioctl(fd, PCIOCLISTVPD, &list) < 0 || list.plvi_len == 0)
585 list.plvi_data = malloc(list.plvi_len);
586 if (ioctl(fd, PCIOCLISTVPD, &list) < 0) {
587 free(list.plvi_data);
591 vpd = list.plvi_data;
592 end = (struct pci_vpd_element *)((char *)vpd + list.plvi_len);
593 for (; vpd < end; vpd = PVE_NEXT(vpd)) {
594 if (vpd->pve_flags == PVE_FLAG_IDENT) {
595 printf(" VPD ident = '%.*s'\n",
596 (int)vpd->pve_datalen, vpd->pve_data);
600 /* Ignore the checksum keyword. */
601 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
602 memcmp(vpd->pve_keyword, "RV", 2) == 0)
605 /* Ignore remaining read-write space. */
606 if (vpd->pve_flags & PVE_FLAG_RW &&
607 memcmp(vpd->pve_keyword, "RW", 2) == 0)
610 /* Handle extended capability keyword. */
611 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
612 memcmp(vpd->pve_keyword, "CP", 2) == 0) {
613 printf(" VPD ro CP = ID %02x in map 0x%x[0x%x]\n",
614 (unsigned int)vpd->pve_data[0],
615 PCIR_BAR((unsigned int)vpd->pve_data[1]),
616 (unsigned int)vpd->pve_data[3] << 8 |
617 (unsigned int)vpd->pve_data[2]);
621 /* Remaining keywords should all have ASCII values. */
622 printf(" VPD %s %c%c = '%.*s'\n",
623 vpd->pve_flags & PVE_FLAG_RW ? "rw" : "ro",
624 vpd->pve_keyword[0], vpd->pve_keyword[1],
625 (int)vpd->pve_datalen, vpd->pve_data);
627 free(list.plvi_data);
631 * This is a direct cut-and-paste from the table in sys/dev/pci/pci.c.
638 } pci_nomatch_tab[] = {
639 {PCIC_OLD, -1, "old"},
640 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"},
641 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"},
642 {PCIC_STORAGE, -1, "mass storage"},
643 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"},
644 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"},
645 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"},
646 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"},
647 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"},
648 {PCIC_STORAGE, PCIS_STORAGE_ATA_ADMA, "ATA (ADMA)"},
649 {PCIC_STORAGE, PCIS_STORAGE_SATA, "SATA"},
650 {PCIC_STORAGE, PCIS_STORAGE_SAS, "SAS"},
651 {PCIC_STORAGE, PCIS_STORAGE_NVM, "NVM"},
652 {PCIC_NETWORK, -1, "network"},
653 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"},
654 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"},
655 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"},
656 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"},
657 {PCIC_NETWORK, PCIS_NETWORK_ISDN, "ISDN"},
658 {PCIC_DISPLAY, -1, "display"},
659 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"},
660 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"},
661 {PCIC_DISPLAY, PCIS_DISPLAY_3D, "3D"},
662 {PCIC_MULTIMEDIA, -1, "multimedia"},
663 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"},
664 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"},
665 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_TELE, "telephony"},
666 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_HDA, "HDA"},
667 {PCIC_MEMORY, -1, "memory"},
668 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"},
669 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"},
670 {PCIC_BRIDGE, -1, "bridge"},
671 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"},
672 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"},
673 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"},
674 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"},
675 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"},
676 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"},
677 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"},
678 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"},
679 {PCIC_BRIDGE, PCIS_BRIDGE_RACEWAY, "PCI-RACEway"},
680 {PCIC_SIMPLECOMM, -1, "simple comms"},
681 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */
682 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"},
683 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MULSER, "multiport serial"},
684 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MODEM, "generic modem"},
685 {PCIC_BASEPERIPH, -1, "base peripheral"},
686 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"},
687 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"},
688 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"},
689 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"},
690 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PCIHOT, "PCI hot-plug controller"},
691 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_SDHC, "SD host controller"},
692 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_IOMMU, "IOMMU"},
693 {PCIC_INPUTDEV, -1, "input device"},
694 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"},
695 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"},
696 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"},
697 {PCIC_INPUTDEV, PCIS_INPUTDEV_SCANNER, "scanner"},
698 {PCIC_INPUTDEV, PCIS_INPUTDEV_GAMEPORT, "gameport"},
699 {PCIC_DOCKING, -1, "docking station"},
700 {PCIC_PROCESSOR, -1, "processor"},
701 {PCIC_SERIALBUS, -1, "serial bus"},
702 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"},
703 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"},
704 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"},
705 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"},
706 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"},
707 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"},
708 {PCIC_WIRELESS, -1, "wireless controller"},
709 {PCIC_WIRELESS, PCIS_WIRELESS_IRDA, "iRDA"},
710 {PCIC_WIRELESS, PCIS_WIRELESS_IR, "IR"},
711 {PCIC_WIRELESS, PCIS_WIRELESS_RF, "RF"},
712 {PCIC_INTELLIIO, -1, "intelligent I/O controller"},
713 {PCIC_INTELLIIO, PCIS_INTELLIIO_I2O, "I2O"},
714 {PCIC_SATCOM, -1, "satellite communication"},
715 {PCIC_SATCOM, PCIS_SATCOM_TV, "sat TV"},
716 {PCIC_SATCOM, PCIS_SATCOM_AUDIO, "sat audio"},
717 {PCIC_SATCOM, PCIS_SATCOM_VOICE, "sat voice"},
718 {PCIC_SATCOM, PCIS_SATCOM_DATA, "sat data"},
719 {PCIC_CRYPTO, -1, "encrypt/decrypt"},
720 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "network/computer crypto"},
721 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "entertainment crypto"},
722 {PCIC_DASP, -1, "dasp"},
723 {PCIC_DASP, PCIS_DASP_DPIO, "DPIO module"},
724 {PCIC_DASP, PCIS_DASP_PERFCNTRS, "performance counters"},
725 {PCIC_DASP, PCIS_DASP_COMM_SYNC, "communication synchronizer"},
726 {PCIC_DASP, PCIS_DASP_MGMT_CARD, "signal processing management"},
727 {PCIC_ACCEL, -1, "processing accelerators"},
728 {PCIC_ACCEL, PCIS_ACCEL_PROCESSING, "processing accelerators"},
729 {PCIC_INSTRUMENT, -1, "non-essential instrumentation"},
734 guess_class(struct pci_conf *p)
738 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
739 if (pci_nomatch_tab[i].class == p->pc_class)
740 return(pci_nomatch_tab[i].desc);
746 guess_subclass(struct pci_conf *p)
750 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
751 if ((pci_nomatch_tab[i].class == p->pc_class) &&
752 (pci_nomatch_tab[i].subclass == p->pc_subclass))
753 return(pci_nomatch_tab[i].desc);
763 struct pci_vendor_info *cv;
764 struct pci_device_info *cd;
765 char buf[1024], str[1024];
770 * Locate the database and initialise.
772 TAILQ_INIT(&pci_vendors);
773 if ((dbf = getenv("PCICONF_VENDOR_DATABASE")) == NULL)
775 if ((db = fopen(dbf, "r")) == NULL) {
777 if ((db = fopen(dbf, "r")) == NULL)
785 * Scan input lines from the database
788 if (fgets(buf, sizeof(buf), db) == NULL)
791 if ((ch = strchr(buf, '#')) != NULL)
793 ch = strchr(buf, '\0') - 1;
794 while (ch > buf && isspace(*ch))
799 /* Can't handle subvendor / subdevice entries yet */
800 if (buf[0] == '\t' && buf[1] == '\t')
803 /* Check for vendor entry */
804 if (buf[0] != '\t' && sscanf(buf, "%04x %[^\n]", &id, str) == 2) {
805 if ((id == 0) || (strlen(str) < 1))
807 if ((cv = malloc(sizeof(struct pci_vendor_info))) == NULL) {
808 warn("allocating vendor entry");
812 if ((cv->desc = strdup(str)) == NULL) {
814 warn("allocating vendor description");
819 TAILQ_INIT(&cv->devs);
820 TAILQ_INSERT_TAIL(&pci_vendors, cv, link);
824 /* Check for device entry */
825 if (buf[0] == '\t' && sscanf(buf + 1, "%04x %[^\n]", &id, str) == 2) {
826 if ((id == 0) || (strlen(str) < 1))
829 warnx("device entry with no vendor!");
832 if ((cd = malloc(sizeof(struct pci_device_info))) == NULL) {
833 warn("allocating device entry");
837 if ((cd->desc = strdup(str)) == NULL) {
839 warn("allocating device description");
844 TAILQ_INSERT_TAIL(&cv->devs, cd, link);
848 /* It's a comment or junk, ignore it */
858 read_config(int fd, struct pcisel *sel, long reg, int width)
866 if (ioctl(fd, PCIOCREAD, &pi) < 0)
867 err(1, "ioctl(PCIOCREAD)");
873 getdevice(const char *name)
875 struct pci_conf_io pc;
876 struct pci_conf conf[1];
877 struct pci_match_conf patterns[1];
881 fd = open(_PATH_DEVPCI, O_RDONLY, 0);
883 err(1, "%s", _PATH_DEVPCI);
885 bzero(&pc, sizeof(struct pci_conf_io));
886 pc.match_buf_len = sizeof(conf);
889 bzero(&patterns, sizeof(patterns));
892 * The pattern structure requires the unit to be split out from
893 * the driver name. Walk backwards from the end of the name to
894 * find the start of the unit.
897 errx(1, "Empty device name");
898 cp = strchr(name, '\0');
899 assert(cp != NULL && cp != name);
901 while (cp != name && isdigit(cp[-1]))
903 if (cp == name || !isdigit(*cp))
904 errx(1, "Invalid device name");
905 if ((size_t)(cp - name) + 1 > sizeof(patterns[0].pd_name))
906 errx(1, "Device name is too long");
907 memcpy(patterns[0].pd_name, name, cp - name);
908 patterns[0].pd_unit = strtol(cp, &cp, 10);
910 errx(1, "Invalid device name");
911 patterns[0].flags = PCI_GETCONF_MATCH_NAME | PCI_GETCONF_MATCH_UNIT;
913 pc.pat_buf_len = sizeof(patterns);
914 pc.patterns = patterns;
916 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
917 err(1, "ioctl(PCIOCGETCONF)");
918 if (pc.status != PCI_GETCONF_LAST_DEVICE &&
919 pc.status != PCI_GETCONF_MORE_DEVS)
920 errx(1, "error returned from PCIOCGETCONF ioctl");
922 if (pc.num_matches == 0)
923 errx(1, "Device not found");
924 return (conf[0].pc_sel);
928 parsesel(const char *str)
933 unsigned long selarr[4];
936 ep = strchr(str, '@');
942 if (strncmp(ep, "pci", 3) == 0) {
945 while (isdigit(*ep) && i < 4) {
946 selarr[i++] = strtoul(ep, &eppos, 10);
951 if (i > 0 && *ep == '\0') {
952 sel.pc_func = (i > 2) ? selarr[--i] : 0;
953 sel.pc_dev = (i > 0) ? selarr[--i] : 0;
954 sel.pc_bus = (i > 0) ? selarr[--i] : 0;
955 sel.pc_domain = (i > 0) ? selarr[--i] : 0;
959 errx(1, "cannot parse selector %s", str);
963 getsel(const char *str)
967 * No device names contain colons and selectors always contain
968 * at least one colon.
970 if (strchr(str, ':') == NULL)
971 return (getdevice(str));
973 return (parsesel(str));
977 readone(int fd, struct pcisel *sel, long reg, int width)
980 printf("%0*x", width*2, read_config(fd, sel, reg, width));
984 readit(const char *name, const char *reg, int width)
994 fd = open(_PATH_DEVPCI, O_RDWR, 0);
996 err(1, "%s", _PATH_DEVPCI);
998 rend = rstart = strtol(reg, &end, 0);
999 if (end && *end == ':') {
1001 rend = strtol(end, (char **) 0, 0);
1004 for (i = 1, r = rstart; r <= rend; i++, r += width) {
1005 readone(fd, &sel, r, width);
1008 putchar(i % (16/width) ? ' ' : '\n');
1010 if (i % (16/width) != 1)
1016 writeit(const char *name, const char *reg, const char *data, int width)
1021 pi.pi_sel = getsel(name);
1022 pi.pi_reg = strtoul(reg, (char **)0, 0); /* XXX error check */
1023 pi.pi_width = width;
1024 pi.pi_data = strtoul(data, (char **)0, 0); /* XXX error check */
1026 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1028 err(1, "%s", _PATH_DEVPCI);
1030 if (ioctl(fd, PCIOCWRITE, &pi) < 0)
1031 err(1, "ioctl(PCIOCWRITE)");
1036 chkattached(const char *name)
1041 pi.pi_sel = getsel(name);
1043 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1045 err(1, "%s", _PATH_DEVPCI);
1047 if (ioctl(fd, PCIOCATTACHED, &pi) < 0)
1048 err(1, "ioctl(PCIOCATTACHED)");
1050 exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */
1051 printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached");
1056 dump_bar(const char *name, const char *reg, const char *bar_start,
1057 const char *bar_count, int width, int verbose)
1059 struct pci_bar_mmap pbm;
1063 uint64_t *dx, a, start, count;
1069 if (bar_start != NULL) {
1070 start = strtoul(bar_start, &el, 0);
1072 errx(1, "Invalid bar start specification %s",
1076 if (bar_count != NULL) {
1077 count = strtoul(bar_count, &el, 0);
1079 errx(1, "Invalid count specification %s",
1083 pbm.pbm_sel = getsel(name);
1084 pbm.pbm_reg = strtoul(reg, &el, 0);
1085 if (*reg == '\0' || *el != '\0')
1086 errx(1, "Invalid bar specification %s", reg);
1088 pbm.pbm_memattr = VM_MEMATTR_UNCACHEABLE; /* XXX */
1090 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1092 err(1, "%s", _PATH_DEVPCI);
1094 if (ioctl(fd, PCIOCBARMMAP, &pbm) < 0)
1095 err(1, "ioctl(PCIOCBARMMAP)");
1098 count = pbm.pbm_bar_length / width;
1099 if (start + count < start || (start + count) * width < (uint64_t)width)
1100 errx(1, "(start + count) x width overflow");
1101 if ((start + count) * width > pbm.pbm_bar_length) {
1102 if (start * width > pbm.pbm_bar_length)
1105 count = (pbm.pbm_bar_length - start * width) / width;
1109 "Dumping pci%d:%d:%d:%d BAR %x mapped base %p "
1110 "off %#x length %#jx from %#jx count %#jx in %d-bytes\n",
1111 pbm.pbm_sel.pc_domain, pbm.pbm_sel.pc_bus,
1112 pbm.pbm_sel.pc_dev, pbm.pbm_sel.pc_func,
1113 pbm.pbm_reg, pbm.pbm_map_base, pbm.pbm_bar_off,
1114 pbm.pbm_bar_length, start, count, width);
1118 db = (uint8_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1119 pbm.pbm_bar_off + start * width);
1120 for (a = 0; a < count; a += width, db++) {
1121 res = fwrite(db, width, 1, stdout);
1123 errx(1, "error writing to stdout");
1129 dh = (uint16_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1130 pbm.pbm_bar_off + start * width);
1131 for (a = 0; a < count; a += width, dh++) {
1132 res = fwrite(dh, width, 1, stdout);
1134 errx(1, "error writing to stdout");
1140 dd = (uint32_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1141 pbm.pbm_bar_off + start * width);
1142 for (a = 0; a < count; a += width, dd++) {
1143 res = fwrite(dd, width, 1, stdout);
1145 errx(1, "error writing to stdout");
1151 dx = (uint64_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1152 pbm.pbm_bar_off + start * width);
1153 for (a = 0; a < count; a += width, dx++) {
1154 res = fwrite(dx, width, 1, stdout);
1156 errx(1, "error writing to stdout");
1162 errx(1, "invalid access width");
1165 munmap((void *)pbm.pbm_map_base, pbm.pbm_map_length);