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(parent: e8a78f5) | patch
Implement some initial AR934x support routines.
authoradrian <adrian@FreeBSD.org>
Sun, 21 Jul 2013 03:56:57 +0000 (03:56 +0000)
committeradrian <adrian@FreeBSD.org>
Sun, 21 Jul 2013 03:56:57 +0000 (03:56 +0000)
commit2c2cf82dde08695b746f672712ca190a46a943ec
treeaefbd0af03e69bbd7536444181cd43bd5bb8f084tree | snapshot
parente8a78f5357312865101c33820e27b741ee833ffecommit | diff
Implement some initial AR934x support routines.

This code reads the PLL configuration registers and correctly programs
things so the UART and such can come up.

There's MIPS74k platform issues that need fixing; but this at least brings
things up enough to echo stuff out the serial port and allow for interactive
debugging with ddb.

Tested:

* AR71xx SoCs
* AR933x SoC
* AR9344 board (DB120)

Obtained from: Qualcomm Atheros; Linux/OpenWRT
sys/mips/atheros/ar71xx_setup.c diff | blob | history
sys/mips/atheros/ar934x_chip.c [new file with mode: 0644] blob
sys/mips/atheros/ar934x_chip.h [new file with mode: 0644] blob
sys/mips/atheros/files.ar71xx diff | blob | history
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