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(parent: 02ba95f) | patch
Add a new cache maintenance function, idcache_inv_all, to the table, and
authorIan Lepore <ian@FreeBSD.org>
Mon, 24 Feb 2014 01:41:58 +0000 (01:41 +0000)
committerIan Lepore <ian@FreeBSD.org>
Mon, 24 Feb 2014 01:41:58 +0000 (01:41 +0000)
commit4b7fcd31e11530ffdbd5dd7e2406fa716411a7b1
treede06da1bf5d4e05d012ca3c2c559f8f8938fbff3tree | snapshot
parent02ba95fe77f67aaa59a8a4265d2188430d6e616dcommit | diff
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.  Most chips up through
armv6 can use the armv4 implementation which has a single coprocessor
opcode for this operation.  The rather more complex armv7 implementation
comes from netbsd.
sys/arm/arm/cpufunc.c diff | blob | history
sys/arm/arm/cpufunc_asm_armv4.S diff | blob | history
sys/arm/arm/cpufunc_asm_armv6.S diff | blob | history
sys/arm/arm/cpufunc_asm_armv7.S diff | blob | history
sys/arm/include/cpufunc.h diff | blob | history
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