Use the same cache terminology as the ARM docs in comments. No
functional changes.
Use armv7 TLB flush code, not arm11, for cortex-a processors.
Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.