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jh7110: Add StarFive JH7110 clock/reset generator drivers
authorMitchell Horne <mhorne@FreeBSD.org>
Mon, 6 May 2024 17:10:01 +0000 (14:10 -0300)
committerMitchell Horne <mhorne@FreeBSD.org>
Tue, 7 May 2024 16:02:57 +0000 (13:02 -0300)
commit5d6d6278979b9eab598a23c804d23e930d2f7268
treeab9a5d995701a73b89ccd96b09d3668b83a414f4tree | snapshot
parentcf0876820717192b4900b56c027b01dad35bc837commit | diff
jh7110: Add StarFive JH7110 clock/reset generator drivers

Implement a core clknode driver for the JH7110 (StarFive VisionFive v2)
platform.

Add clock/reset generator drivers for the PLL, SYS, and AON clock
groupings.

Co-authored-by: mhorne
Reviewed by: mhorne
Sponsored by: The FreeBSD Foundation (mhorne's contributions)
Differential Revision: https://reviews.freebsd.org/D43037
sys/dev/clk/starfive/jh7110_clk.c [new file with mode: 0644] blob
sys/dev/clk/starfive/jh7110_clk.h [new file with mode: 0644] blob
sys/dev/clk/starfive/jh7110_clk_aon.c [new file with mode: 0644] blob
sys/dev/clk/starfive/jh7110_clk_pll.c [new file with mode: 0644] blob
sys/dev/clk/starfive/jh7110_clk_pll.h [new file with mode: 0644] blob
sys/dev/clk/starfive/jh7110_clk_sys.c [new file with mode: 0644] blob
sys/riscv/starfive/files.starfive diff | blob | history
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